FAIRCHILD FDD86113LZ

FDD86113LZ
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 5.5 A, 104 mΩ
Features
General Description
„ Shielded Gate MOSFET Technology
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced PowerTrench® process
that incorporates Shielded Gate technology. This process has
been optimized for the on-state resistance and yet maintain
superior switching performance. G-S zener has been added to
enhance ESD voltage level.
„ Max rDS(on) = 104 mΩ at VGS = 10 V, ID = 4.2 A
„ Max rDS(on) = 156 mΩ at VGS = 4.5 V, ID = 3.4 A
„ HBM ESD protection level > 6 kV typical (Note 4)
„ High performance trench technology for extremely low rDS(on)
Application
„ High power and current handling capability in a widely used
surface mount package
„ DC-DC conversion
„ 100% UIL Tested
„ RoHS Compliant
D
D
G
G
S
D
-P-2A52
K
TO
(T O -252)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
-Continuous
ID
TC = 25 °C
TA = 25 °C
-Continuous
TJ, TSTG
±20
V
(Note 1a)
4.2
A
15
Single Pulse Avalanche Energy
PD
Units
V
5.5
-Pulsed
EAS
Ratings
100
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
12
29
(Note 1a)
Operating and Storage Junction Temperature Range
3.1
-55 to +150
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
(Note 1)
4.3
(Note 1a)
96
°C/W
Package Marking and Ordering Information
Device Marking
FDD86113LZ
Device
FDD86113LZ
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
Package
D-PAK(TO-252)
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
June 2013
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 80 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±10
μA
3
V
100
V
72
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1
1.5
-5
mV/°C
VGS = 10 V, ID = 4.2 A
87
104
VGS = 4.5 V, ID = 3.4 A
116
156
VGS = 10 V, ID = 4.2 A,TJ = 125 °C
142
170
VDS = 5 V, ID = 4.2 A
9
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 50 V, VGS = 0 V,
f = 1MHz
213
285
pF
55
75
pF
2.4
5
pF
Ω
1.4
Switching Characteristics
3.6
10
1.3
10
ns
ns
9.7
20
ns
1.6
10
ns
3.7
6
nC
1.9
3
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
VGS = 0 V to 10 V
Qg(TOT)
Total Gate Charge
Qgs
Gate to Source Charge
VGS = 0 V to 4.5 V VDD = 50 V,
ID = 4.2 A
0.6
nC
Qgd
Gate to Drain “Miller” Charge
0.7
nC
VDD = 50 V, ID = 4.2 A,
VGS = 10 V, RGEN = 6 Ω
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 4.2 A
(Note 2)
0.88
1.3
VGS = 0 V, IS = 1.7 A
(Note 2)
0.80
1.2
31
49
ns
20
33
nC
IF = 4.2 A, di/dt = 100 A/μs
V
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b) 96 °C/W when mounted on a
minimum pad of 2 oz copper
a) 40 °C/W when mounted on a
1 in2 pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Starting TJ = 25 °C, L = 1 mH, IAS = 5 A, VDD = 90 V, VGS = 10 V.
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
2
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
4
ID, DRAIN CURRENT (A)
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
15
VGS = 4.5 V
12
VGS = 3.5 V
9
VGS = 3 V
6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
VGS = 2.5 V
0
0
1
2
3
4
5
VGS = 2.5 V
VGS = 3 V
3
VGS = 3.5 V
2
VGS = 4.5 V
1
0
0
3
VDS, DRAIN TO SOURCE VOLTAGE (V)
12
15
400
ID = 4.2 A
VGS = 10 V
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
9
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
2.0
IS, REVERSE DRAIN CURRENT (A)
12
VDS = 5 V
9
6
TJ = 25 oC
TJ = -55 oC
0
1
2
3
4
5
200
TJ = 125 oC
100
TJ = 25 oC
2
4
6
8
10
20
10 VGS = 0 V
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
6
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
300
Figure 4. On-Resistance vs Gate to
Source Voltage
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS, GATE TO SOURCE VOLTAGE (V)
15
TJ = 150 oC
ID = 4.2 A
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On-Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
6
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
0
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE (V)
10
1000
ID = 4.2 A
VDD = 25 V
Ciss
CAPACITANCE (pF)
8
VDD = 50 V
6
VDD = 75 V
4
100
10
2
0
Coss
Crss
f = 1 MHz
VGS = 0 V
0
1
2
3
1
0.1
4
Figure 7. Gate Charge Characteristics
10
12
o
RθJC = 4.3 C/W
ID, DRAIN CURRENT (A)
5
IAS, AVALANCHE CURRENT (A)
100
Figure 8. Capacitance vs Drain
to Source Voltage
6
4
TJ = 25 oC
3
TJ = 100 oC
2
TJ = 125 oC
10
VGS = 10 V
8
VGS = 4.5 V
6
4
Limited by Package
2
1
0.01
0.1
1
0
25
2
75
100
125
150
o
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
-1
10
20
VGS = 0 V
-2
10
10
-3
ID, DRAIN CURRENT (A)
10
-4
10
TJ = 125 oC
-5
10
-6
10
TJ = 25 oC
-7
10
-8
10
-9
100 μs
1
THIS AREA IS
LIMITED BY rDS(on)
0.1
10
-10
10
50
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
Ig, GATE LEAKAGE CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
0
5
10
15
20
25
30
0.05
0.1
35
1 ms
RθJC = 4.3 oC/W
10 ms
TC = 25 oC
1
DC
10
100
400
VDS, DRAIN to SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Gate Leakage Current vs
Gate to Source Voltage
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
SINGLE PULSE
TJ = MAX RATED
Figure 12. Forward Bias Safe
Operating Area
4
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
o
1000
RθJC = 4.3 C/W
o
TC = 25 C
100
10 -5
10
-4
-3
10
-2
10
-1
10
10
1
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJC
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
o
RθJC = 4.3 C/W
0.01
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Case Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
5
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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As used here in:
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I64
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
6
www.fairchildsemi.com
FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET
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