AMSCO AS1121

austriamicrosystems AG
is now
ams AG
The technical content of this austriamicrosystems datasheet is still valid.
Contact information:
Headquarters:
ams AG
Tobelbaderstrasse 30
8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
e-Mail: [email protected]
Please visit our website at www.ams.com
Data sheet
A S 112 1
16-C han ne l LED D river with D o t C o r r e c t i o n a n d G r e y s c a l e P W M
2 Key Features
Greyscale PWM Control: 12-Bit (4096 Steps)
The AS1121 is a 16-channel, constant current-sink LED driver. Each
of the 16 channels can be individually adjusted by 4096-step greyscale PWM brightness control and 64-step constant-current sink (dot
correction).
Dot Correction: 6-Bit (64 Steps)
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1 General Description
Drive Capability (Constant-Current Sink): 0 to 40mA
The dot correction circuitry adjusts the brightness variations between
the AS1121 channels and other LED drivers. Greyscale control and
dot correction circuitry are accessible via the SPI-compatible serial
interface. A single external resistor sets the maximum current value
of all 16 channels.
LED Power Supply Voltage: up to 30V
The open LED detection function indicates a broken or disconnected
LED at one or more of the outputs. The overtemperature protectionflag indicates that the device is in an overtemperature condition.
Output Delay for controlled Inrush Current (factory set, can be
turned off)
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Supply Voltage Range: 3.1V to 3.6V
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SPI-Compatible Serial Interface
Factory set rise- and fall-time for EMI improvement
An additional power-down pin puts the AS1121 into a 40nA standbymode.
PWM Clock Rate: up to 10 MHz
The AS1121 is available in a 32-pin TQFN 5x5 mm package.
Data Transfer Clock Rate: up to 30 MHz
CMOS Level I/O
Diagnostic Features
32-pin TQFN 5x5 mm Package
3 Applications
The device is ideal for mono-, multi-, and full-color LED displays,
LED signboards, and display backlights.
Figure 1. AS1121 - Block Diagram
1 CLK
IREF
Max OUTn
Current
24
OEN
Greyscale
Counter
Control
ch
3
Te
Overtemp
12-Bit Greyscale
PWM Control
Dot Correction
0 Register 5
6-Bit Dot
Correction
Open
LED
Detect
22
Control
12-Bit Greyscale
PWM Control
Dot Correction
6 Register 11
6-Bit Dot
Correction
4
OUT0
Constant Current
Driver
Delay
OUT1
.
.
.
Open&Short LED Detection
Control
Constant Current
Driver
21
Greyscale
180 Register191
12-Bit Greyscale
PWM Control
Dot Correction
90 Register 95
6-Bit Dot
Correction
XERR
30
GND
Delay
5
Greyscale
12 Register 23
.
.
Input
Shift
Register
Constant Current
Driver
Open&Short LED Detection
.
MODE
27
Greyscale
0 Register 11
Input
Shift
Register
Status
Open LED Detect,
Overtemperature,
Dot Correction
Data
VCC
29 PD
Control
ni
GSCLK
31
32 LD
VREF =
1.24V
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26
2 SDI
Delay
OUT15
Open&Short LED Detection
23
AS1121
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SDO
Revision 1.01
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AS1121
Datasheet - P i n o u t
4 Pinout
Pin Assignments
1
24 GSCLK
SDI
2
23 SDO
MODE
3
OUT0
4
OUT1
5
OUT2
6
OUT3
7
OUT4
8
22 XERR
AS1121
21 OUT15
Thermal
Pad
20 OUT14
19 OUT13
18 OUT12
33
22
XERR
23
24
26
25, 27
12,13,28
SDO
GSCLK
IREF
VCC
N/C
Description
Serial Data Shift Clock
Serial Data Input
Mode Select input with internal pulldown
MODE = GND: Selects greyscale mode (see Setting Greyscale Brightness on page 14)
MODE = VCC: Selects dor correction mode (see Setting Dot Correction on page 13)
Constant-Current Outputs 0:7
Constant-Current Outputs 8:15
Error Output
0 = LED open detection or overtemperature condition is detected.
1 = Normal operation.
Serial Data Output
Greyscale Clock. Reference clock for greyscale PWM control
Reference Current Terminal
Power Supply Voltage
This pins must not be connected
Power Down
0 = normal operation mode
1 = power down mode
Ground
Blank Outputs
0 = OUTn outputs are controlled by the greyscale PWM control.
1 = OUTn outputs are forced off; the greyscale counter is reset.
Data Latch. The internal connections are switched by pin MODE.
For LD (MODE = GND), the greyscale register receives new data.
For LD (MODE = VCC), the dot correction register receives new data.
Thermal Pad. This pin must be connected to GND to ensure normal operation.
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OUT0:OUT7
OUT8:OUT15
16 OUT10
4:11
14:21
15 OUT9
MODE
14 OUT8
3
13 N/C
Pin Name
CLK
SDI
11 OUT7
OUT5
Pin Number
1
2
12 N/C
9
Table 1. Pin Descriptions
10 OUT6
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17 OUT11
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VCC 25
IREF 26
N/C 28
VCC 27
PD 29
GND 30
LD 32
Pin Descriptions
PD
ch
29
OEN 31
CLK
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Figure 2. Pin Assignments (Top View)
GND
31
OEN
32
LD
33
Thermal Pad
Te
30
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Revision 1.01
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AS1121
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
Comments
-0.3
5
V
-0.3
VCC + 0.3
V
VSDO, VXERR to GND
-0.3
VCC + 0.3
V
VOUT0 : VOUT15 to GND
-0.3
30
V
50
mA
-100
100
mA
Output Current
Electrostatic Discharge
Electrostatic Discharge HBM
Thermal Information
Norm: JEDEC 78
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Input Current (latch-up immunity)
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VCC to GND
All other pins to GND
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Electrical Parameters
+/- 2
Junction to ambient thermal resistance
kV
Norm: MIL 883 E method 3015
37
°C/W
For more information about thermal metrics, see
application note AN01 Thermal Characteristics.
+150
ºC
+150
ºC
Temperature Ranges and Storage Conditions
Junction Temperature
Storage Temperature Range
-55
Package Body Temperature
Humidity non-condensing
5
ºC
85
%
3
Represents a max. floor life time of 168h
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Moisture Sensitive Level
+260
The reflow peak soldering temperature (body temperature)
specified is in accordance with IPC/JEDEC J-STD020“Moisture/Reflow Sensitivity Classification for NonHermetic Solid State Surface Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
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Revision 1.01
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AS1121
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VCC = +3.1V to +3.6V, Typical values are at TAMB = +25°C, VCC = 3.3V (unless otherwise specified). All limits are guaranteed. The parameters
with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods..
Table 3. Electrical Characteristics
Parameter
Condition
Min
TAMB
Operating Temperature Range
-40
TJ
Operating Junction Temperature
-40
Supply Voltage
3.1
Typ
Input Supply
Supply Current
ICC
All outputs off, RIREF = 1kΩ
8.5
All outputs on, RIREF = 1kΩ
15
All outputs off, RIREF = 10kΩ
+85
°C
+125
°C
3.6
V
15
20
2
4
3
5
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All outputs on, RIREF = 10kΩ
VIN = VCC or GND;
Pins OEN, GSCLK, CLK, SDI, LD, PD
Input Current
I
-1
50
-1
Power Down Current
IPD
Output
VOUT
Voltage Applied to Output
(OUT0:OUT15)
ICOC
Constant Output Current
ΔICOC
1.5
Line Regulation
ch
Load Regulation
V
44
mA
±1
VOUT = 1.5V, RIREF = 10kΩ, OUT0:OUT15
±1.5
Device to device, average current from
OUT0:OUT15, RIREF = 1kΩ
±1
Device to device, average current from
OUT0:OUT15, RIREF = 10kΩ
±1
All outputs off, VOUT = 30V,
RIREF = 1kΩ, OUT0:OUT15
20
VOUT = 1V, RIREF = 1kΩ OUT0:OUT15
±1
±2.5
VOUT = 1V, RIREF = 10kΩ OUT0:OUT15
±0.2
±2.5
VOUT = 1.5V to 4V, RIREF = 1kΩ,
OUT0:OUT15
±0.1
±0.4
VOUT = 1.5V to 4V, RIREF = 10kΩ,
OUT0:OUT15
±0.01
±0.4
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ΔILNR
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Leakage Output Current
40
nA
30
VOUT = 1.5V, RIREF = 1kΩ, OUT0:OUT15
Constant Output Current Error
ILEAK
36
µA
1
40
All outputs on, VOUT = 1.5V,
RIREF = 1kΩ
mA
1
VIN = VCC; pin MODE
VIN = GND; pin MODE
ΔILDR
Unit
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VCC
Max
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Symbol
%
nA
%/V
%/V
Logic Levels
High-Level Input Voltage
0.8 x
VCC
VCC
V
VIL
Low-Level Input Voltage
GND
0.2 x
VCC
V
VOH
High-Level Output Voltage
IOH = -1mA, SDO
VOL
Low-Level Output Voltage
IOL = 1mA, SDO, XERR
IOH
High-Level Output Current
VCC = 5 V at SDO
Te
VIH
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Revision 1.01
VCC -0.5
V
0.5
-1.0
V
mA
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AS1121
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics (Continued)
Symbol
Parameter
Condition
Min
IOL
Low-Level Output Current
VCC = 5 V at SDO, XERR
1.0
VLOD
LED Open Detection Threshold
VIREF
Reference Voltage Output
RIREF = 1kΩ
1.23
Typ
Max
Unit
mA
0.3
0.4
V
1.27
1.32
V
TTWF
Thermal Warn Flag Threshold
125
TTEF
Thermal Error Flag Threshold
150
ºC
ºC
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Timing Characteristics
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Thermal Protection
VCC = +3.1V to +3.6V, TAMB = -40°C to +85ºC. Typical values are at TAMB = +25°C, VCC = 3.3V (unless otherwise specified).
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Table 4. Output Tming Characteristics
Symbol
Parameter
tR0
Rise Time
1
tR1
tF0
tF1
Conditions
Fall Time
1
tPD0
Min
SDO
8
OUTn, DC = 3FHEX, RIREF = 1kΩ
25
SDO
8
OUTn, DC = 3FHEX, RIREF = 1kΩ
25
CLK, SDO
Max
Unit
ns
ns
2
2
tPD1
Propagation Delay Time
OUT0, OUT1, OUT2, OUT3 , RIREF = 1kΩ,
turn ON delay
15
ns
25
ns
2
OUT0, OUT1, OUT2, OUT3 , RIREF = 1kΩ,
turn OFF delay
tPD2
OUT4, OUT5, OUT6, OUT7
Average Output Delay Time
(can be turend off on request)
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tD
Typ
2
OUT8, OUT9, OUT10, OUT11
2
OUT12, OUT13, OUT14, OUT15
2
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1. Value can be factory trimmed for EMI improvement
2. See Figure 24 on page 16.
Interface Characteristics
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VCC = +3.1V to +3.6V, TAMB = -40°C to +85ºC. Typical values are at TAMB = +25°C, VCC = 3.3V (unless otherwise specified).
Table 5. Serial Interface Timing Characteristics
Parameter
Conditions
fCLK
Data Shift Clock Frequency
CLK
fGSCLK
Greyscale Clock Frequency
GSCLK
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Symbol
1
tWH0/tWL0
CLK Pulse Duration
CLK = 1/0
tWH1/tWL1
GSCLK Pulse Duration
GSCLK = 1/0
tWH2
LD Pulse Duration
LD = 1
tWH3
OEN Pulse Duration
OEN = 1
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Revision 1.01
Min
1
2
2
Typ
Max
Unit
30
MHz
5
MHz
16
ns
tbd
ns
20
ns
20
ns
5 - 21
AS1121
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 5. Serial Interface Timing Characteristics
tERR
Error Detection Duration
SDI, CLK
tSU1
CLK, LD
Setup Time
Min
LD = 1, OEN = 0
tSU0
tSU2
4
3
Typ
Max
1000
MODE, CLK
5
4
tSU4
OEN, GSCLK
tH0
CLK, SDI
tH1
LD, CLK
ns
12
12
2
12
3
12
1
12
CLK, MODE
4
12
ns
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tH3
LD, MODE
tH4
Unit
12
MODE, LD
Hold Time
3
12
tSU3
tH2
4
OEN, GSCLK
ns
12
2
12
See Figure 20 on page 13.
See Figure 24 on page 16.
See Figure 18 on page 11
See Figure 22 on page 14.
See Figure 17 on page 10.
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1.
2.
3.
4.
5.
Conditions
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Parameter
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Symbol
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Revision 1.01
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AS1121
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
TAMB = +25°C, VCC = 3.3V (unless otherwise specified)
Figure 3. Constant Output Current vs. Output Voltage
Figure 4. Constant Output Current vs. Output Voltage
40
35
Icoc = 30mA (1.33kΩ)
30
25
Icoc = 20mA (1.96kΩ)
20
15
Icoc = 10mA (4.02kΩ)
10
Icoc =4mA (10kΩ)
5
Icoc = 1mA (40.2kΩ)
0
45
Icoc = 40mA (1kΩ)
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Icoc = 40mA (1kΩ)
40
35
Icoc = 30mA (1.33kΩ)
30
25
Icoc = 20mA (1.96kΩ)
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45
Constant Output Current (mA)
50
20
15
Icoc = 10mA (4.02kΩ)
10
Icoc =4mA (10kΩ)
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Constant Output Current (mA)
50
5
Icoc = 1mA (40.2kΩ)
0
0
1
2
3
4
5
6
7
8
9
10
0
0.25
0.5 0.75
Output Voltage (V)
Figure 5. Constant Output Current vs. VOUT; RIREF = 1kΩ
1.5 1.75
2
Figure 6. Constant Output Current vs. VOUT; RIREF = 1kΩ
40
35
30
25
20
15
10
Constant Output Current (mA)
45
-40°C
+25°C
5
+85°C
0
0
1
2
3
4
5
6
7
8
45
40
35
30
25
20
15
10
-40°C
+25°C
5
+85°C
0
9
10
0
0.5
Output Voltage (V)
Constant Output Current (mA)
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40.5
40
39.5
39
-40
-15
10
35
60
85
4.15
4.1
4.05
4
3.95
3.9
-40
Ambient Temperature (°C)
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2
4.2
ch
41.5
1.5
Figure 8. ICOC vs. Temp.; RIREF = 10kΩ, VOUT = 1.5V
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42
1
Output Voltage (V)
Figure 7. ICOC vs. Temp.; RIREF = 1kΩ, VOUT = 1.5V
Constant Output Current (mA)
1.25
50
ca
Constant Output Current (mA)
50
1
Output Voltage (V)
-15
10
35
60
85
Ambient Temperature (°C)
Revision 1.01
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AS1121
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 10. ICOC vs. Dot Correction; VOUT = 1.5V
40
50
35
45
25
20
15
10
5
0
RIREF = 10kOhm
40
35
30
25
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30
RIREF = 1kOhm
20
15
10
5
0
0
5
10
15
20
25
30
35
40
0
9
18
Figure 11. Supply Current vs. Temp.; RIREF = 1kΩ, VOUT = 1.5V
25
27
36
45
54
63
Dot Correction
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R IREF (kOhm)
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Constant Output Current (mA)
Constant Output Current (mA)
Figure 9. ICOC vs. RIREF; VOUT = 1.5V
Figure 12. ΔICOC vs. Constant Output Current average
4
all channels on, DC=63, OEN=LOW
3.5
Vout = 1.5V
Vout = 3.0V
all channels off DC=0, OEN=HIGH
3
all channels off , DC=63 OEN=HIGH
delta Icoc (%)
Supply Current (mA)
all channels off , DC=0, OEN=LOW
20
15
10
2.5
2
1.5
1
5
0.5
0
-40
0
-15
10
35
60
85
0
Figure 13. ΔICOC vs. Temp.; RIREF = 1kΩ
1.75
delta Icoc (%)
delta Icoc (%)
25
30
35
40
1.5
1
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1.75
1.25
0.75
0.5
1.25
1
0.75
0.5
Vout = 1.5V
0.25
0
-40
15
2
ch
1.5
10
Figure 14. ΔICOC vs. Temp.; RIREF = 10kΩ
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2
5
Constant Output Current average (mA)
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Ambient Temperature (°C)
-15
10
35
60
85
0
-40
Ambient Temperature (°C)
www.austriamicrosystems.com/AS1121
Vout = 1.5V
0.25
Vout = 3.0V
Vout = 3.0V
-15
10
35
60
85
Ambient Temperature (°C)
Revision 1.01
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AS1121
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 15. LED Open Detection Threshold vs. Temperature
Figure 16. ICOC vs. Supply Voltage; RIREF = 1kΩ
41
36
34
32
30
-40
40.75
40.5
40.25
40
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38
39.75
39.5
39.25
39
-15
10
35
60
85
3.1
3.2
3.3
3.4
3.5
3.6
Supply Voltage (V)
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Ambient Temperature (°C)
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Constant Output Current (mA)
LED Open Detection Threshold
(mV)
40
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Revision 1.01
9 - 21
AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
Serial Interface
The AS1121 features a versatile 3-pin (CLK, SDI, and SDO) serial interface, which can be connected to microcontrollers or digital signal processors in various configurations.
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The rising edge of the CLK signal shifts data from pin SDI to the internal register. After all data is clocked in, the serial data is latched into the
internal registers at the rising edge of the LD signal.
Note: All data is clocked in with the MSB first.
Multiple AS1121 devices can be cascaded by connecting the SDO pin of one device with pin SDI of the next device (see Figure 25 on page 17).
The SDO pin can also be connected to the microcontroller to receive status information from the AS1121. The serial data format is 96-bit or 192bit wide, depending on mode of the device (see LD on page 2).
MODE
Greyscale Mode
Data Input Cycle
tH3
LD
SDI
DCn-1
LSB
DCn
MSB
SDO
1
DCn-1
MSB
DCn-1
MSB-1
tSU3
DCn
LSB
tH2
CLK
Dot Correction Mode
Data Input Cycle
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Dot Correction Mode
Data Input Cycle
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Figure 17. Serial Data Input Timing Diagram
96
DCn-1
LSB
tH3
GSn
MSB
GSn
LSB
tSU2
tSU2
1
DCn
MSB
DCn-1
MSB-1
DCn+1
MSB
192
X
X
1
SID
MSB
2
X
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Error Information Output
ni
The open-drain output pin XERR indicates if the device is in one of the two error conditions: overtemperature flag or open LED detect. During
normal operation, the internal transistor connected to pin XERR is turned off and the voltage on XERR is pulled up to VCC through an external
pullup resistor.
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If an overtemperature or open LED condition is detected, the internal transistor is switched on, and XERR is pulled to GND. Because XERR is an
open-drain output, multiple AS1121 devices can be ORed together and pulled up to VCC with a single pullup resistor (see Figure 25 on page 17).
This reduces the number of signals needed to report a system error.
Te
To differentiate the overtemperature flag from the open LED detect flag from pin XERR, the open LED detect flag can be masked out by setting
OEN = 1 (see Table 6).
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Revision 1.01
10 - 21
AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Table 6. XERR Truth Table
Error Condition
T
e
m
p
TJ < TTEF
TJ > TTEF
OEN
Mode
Status
XERR
OUTn > VLOD
0
Don't Care
0
0
0
1
normal
OUTn < VLOD
0
Don't Care
1
0
0
0
open error
OUTn > VLOD
1
Don't Care
0
0
0
0
temp. error
0
open & temp.
error
OUTn < VLOD
1
Don't Care
1
0
0
TJ > TTEF
Don't Care
0
Don't Care
Don't Care
1
0
1
normal
TJ < TTEF
Don't Care
1
Don't Care
Don't Care
1
0
0
temp error
TJ > TTWF
Don't Care
Don't Care
0
Don't Care
1
1
1
normal
TJ < TTWF
Don't Care
Don't Care
1
Don't Care
1
1
0
temp. warn
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Overtemperature Error/Warning Flags
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O
p
e
n
OUTn Voltage
Selected Mode
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Temp.
Error Information
Thermal
Thermal
Open LED
Warning
Error Flag
Detect
Flag
The AS1121 provides a overtemperature circuit to indicate that the device is in an overtemperature condition. If the device junction temperature
(TJ) exceeds the threshold temperature (150°C typ), the overtemperature circuit trips and pulls XERR to ground. The overtemperature flag status can be read out from the AS1121 status register.
To prevent an overtemperature condition the AS1121 offers an temperature warning flag at 125°C typical. This flag can be used to take precautions (e.g. start an external cooling) against a overtemperature condition.
Open LED Detection
The AS1121 integrated open LED detection circuit reports an error if any of the 16 LEDs is open or disconnected from the circuit. The open LED
detection circuit trips when the error detection is activated and the voltage at OUTn is less than VLOD.
Note: The voltage at each OUTn is sampled 1 µs after being switched on. Please refer to Figure 18 on page 11.
The open LED detection circuit also pulls XERR to GND when tripped. The open LED status of each channel can also be read out from the
AS1121 status information data (SID) during a greyscale data input cycle.
Figure 18. Error Detection Timing (GS=FFFFHEX, DC=3FHEX)
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LD
tERR
ni
OEN
ch
GSCLK
Te
SID
LODn
Error
Detection
Start
LODn+1
Error
Detection
End
Note: The rising edge of LD latches new data into the internal registers depending on the logic level of the pin MODE. If the pin MODE is tied
GND, the greyscale registers are updated. If the pin MODE is tied to VCC, the dot correction registers are updated.
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Revision 1.01
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
OUTn Enable
All OUTn channels can be collectively switched off with one signal. When OEN is set to 1, all OUTn channels are disabled, regardless of the
device logic operations. The greyscale counter is also reset when OEN is set to 1.
When OEN is set to 0, all OUTn channels are in normal operation.
OEN
OUT0:OUT15
0
Normal Operation
1
Disabled
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Table 7. Pin OEN Truth Table
Setting Maximum Channel Current
Where:
VIREF
RIREF
x 31.5
(EQ 1)
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IMAX =
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The maximum output current per channel is programmed by a single resistor, RIREF, which is placed between pin IREF and GND. The voltage
on pin IREF is set by an internal band gap VIREF (1.27V typ). The maximum channel current is equivalent to the current flowing through RIREF
multiplied by a factor of 31.5. The maximum output current is calculated as:
VIREF = 1.27V;
RIREF = User-selected external resistor.
Power Dissipation
To ensure proper operation of the device, the total power dissipation of the AS1121 must be below the power dissipation rating of the device
package. Total power dissipation is calculated as:
PD = (VCC x ICC) + (VOUT x IMAX x n x
Where:
DCn
dPWM)
63
(EQ 2)
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VCC is the device supply voltage;
ICC is the device supply current;
VOUT is the device OUTn voltage when driving LED current;
IMAX is the LED current adjusted by RIREF;
DCn is the maximum dot correction value for OUTn;
n is the number of OUTn driving LED at the same time;
dPWM is the duty cycle defined by pin OEN or the greyscale PWM value.
Operating Modes
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The AS1121 operates in two modes (see Table 8). Greyscale operating mode (see Figure 22 on page 14) and the shift registers are in reset state
at power-up.
Table 8. Operating Modes
Input Shift Register
Operating Mode
0
192-bit
Greyscale PWM Mode
1
96-bit
Dot Correction Data Input Mode
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Mode
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Setting Dot Correction
The AS1121 can perform independent fine-adjustments to the output current of each channel, i.e., dot correction. Dot correction is used to adjust
brightness deviations of LEDs connected to the output channels (OUT0:OUT15).
The device powers up with the following default seetings: DC = 63 and GS = 4095.
The 16 channels can be individually programmed with a 6-bit word. The channel output can be adjusted in 64 steps from 0 to 100% of the maximum output current (IMAX). The output current for each OUTn channel can be calculated as:
DCn
63
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IOUTn = IMAX x
(EQ 3)
Where:
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IMAX is the maximum programmable output current for each output;
DCn is the programmed dot correction value for output (DCn = 0 to 63);
n = 0 to 15
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Dot correction data are simultaneously entered for all channels. The complete dot correction data format consists of 16 x 6-bit words, which
forms a 96-bit serial data packet (see Figure 19). Channel data is put on one by one, and the data is clocked in with the MSB first.
Figure 19. Dot Correction Data Packet Format
MSB
95
DC15.5
...
90
89
DC15.0
DC14.5
DC OUT15
...
6
5
DC1.0
DC0.5
DC OUT14:DC OUT1
...
LSB
0
DC0.0
DC OUT0
Figure 20. Dot Correction Data Input Timing Diagram
Dot Correction Mode
Data Input Cycle n
VCC
MODE
GND
DCn-1
LSB
DCn
MSB
DCn
MSB-1
DCn
MSB-2
DCn
LSB+1
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SDI
Dot Correction Mode
Data Input Cycle n +1
tSU0
CLK
DCn
LSB
DCn+1
MSB
DCn+1
MSB-1
tWH0
2
1
ni
1
95
96
1
2
tWL0
DCn-1
MSB
DCn-1
MSB-1
ch
SDO
DCn-1
MSB-2
DCn-1
LSB+1
DCn-1
LSB
tSU1
DCn
MSB-1
DCn
MSB
tWH2
DCn
MSB-2
tH1
Te
LD
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Revision 1.01
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Setting Greyscale Brightness
The brightness of each channel output can be adjusted using a 12 bits-per-channel PWM control scheme which results in 4096 brightness steps,
from 0% to 100% brightness. The brightness level for each output is calculated as:
GSn
x 100
4095
%Brightness =
(EQ 4)
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Where:
GSn is the programmed greyscale value for OUTn (GSn = 0 to 4095);
n = 0 to 15 greyscale data for all outputs.
The device powers up with the following default seetings: GS = 4095 and DC = 63.
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The input shift register shifts greyscale data into the greyscale register for all channels simultaneously. The complete greyscale data format consists of 16 x 12 bit words, which forms a 192-bit wide data packet (see Figure 21).
Note: The data packet must be clocked in with the MSB first.
MSB
191
...
GS15.11
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Figure 21. Greyscale Data Packet Format
180
179
GS15.0
GS14.11
GS OUT15
...
12
11
GS1.0
GS0.11
GS OUT14:GS OUT1
...
LSB
0
GS0.0
GS OUT0
When pin MODE is tied to GND, the AS1121 enters greyscale data input mode. The device switches the input shift register to 192-bit width. After
all data is clocked in, the rising edge of the LD signal latches the data into the greyscale register (see Figure 22).
All greyscale data in the input shift register is replaced with status information data (SID) after latching into the greyscale register.
Figure 22. Greyscale Data Input Timing Diagram
Dot Correction Mode
Data Input Cycle
Following Greyscale Mode
Data Input Cycle
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MODE
1st Greyscale Mode
Data Input Cycle After Dot Correction Input
tH3
tSU3
tH3
GSn
MSB
DCn-1
LSB
ch
SDI
ni
LD
GSn
LSB
tH2
tSU2
CLK
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SDO
DCn-1
MSB-1
DCn-1
MSB
tSU1
tH0
96
1
x
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GSn+1
MSB
tPD0
192
x
x
GSn+1
LSB
1
SIDn
MSB
Revision 1.01
192
SIDn
MSB-1
SIDn
MSB-2
SIDn
LSB
SIDn
MSB
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Status Information Data (SID)
The AS1121 contains an integrated status information register, which can be accessed in greyscale mode (MODE = GND). Once the LD signal
latches the data into the greyscale register, the input shift register data is replaced with status information data (see Figure 23).
Figure 23. Status Information Data Packet Format
MSB
LSB
...
176
175
174
LOD0
TEF
TWF
Open LED
Detect Data
167
X
DC15.5
Overtemperature Flag
DC Values
Bit #
167:72
71:32
31:16
15:0
71
DC0.0
X
...
31:16
15:0
LOD
0
Description
Dot Correction Readback (16 x 6 Bit)
reserved
LED Open Detection (Optional, same as bits 176:191), LOD
reserved
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Description
reserved
Temperature Error Flag (TEF, 150ºC, typ)
Temperature Warning Flag (TWF, 125ºC, typ)
reserved
...
72
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Bit #
191:176
175
174
173:168
...
168
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191
LOD15
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Open LED and overtemperature flags as well as the dot-correction registers can be read out at pin SDO. The status information data packet is
192 bits wide. Bits 191:176 and 31:16 contain the open LED detection status of each channel (either 191:176 or 31:16 can be used for readout).
Bit 175 contains the thermal error flag status. Bits 167:72 contain the data of the dot-correction register. Bit 15:0 contains the LED shorted flags.
The remaining bits are reserved. The complete status information data packet is shown in Figure 23.
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Greyscale PWM Operation
The falling edge of the OEN signal initiates a greyscale PWM cycle. The first GSCLK pulse after the falling edge of OEN increments the greyscale counter by one and switches on any OUTn whose greyscale value does not equal zero. Each subsequent rising edge of GSCLK increments the greyscale counter by one.
The AS1121 compares the greyscale value of each OUTn channel with the greyscale counter value. All OUTn whose greyscale values equal the
counter values are switched off. A OEN = 1 signal after 4096 GSCLK pulses resets the greyscale counter to zero and completes a greyscale
PWM cycle (see Figure 24).
all LED’s ON
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Figure 24. Greyscale PWM Cycle Timing Diagram
Greyscale
PWM
Cycle n+1
Greyscale PWM
Cycle n
all LED’s OFF
tWL1
tWH1
GSCLK
tH4
2
4096
3
tW1
tPD1
tPD2
tPD2+td
OUT4:OUT7
Current
OUT8:OUT11
Current
tPD2
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tPD2
tSU4
tWH3
1
OUT0:OUT3
Current
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OEN
tPD2+2xtd
tPD2+3xtd
OUT12:OUT15
Current
XERR
Output Delay
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To minimize the ripple on the inrush current, the outputs are delayed and are not switching at the same time. The 16 channels of the AS1121 are
combined in groups of 4. The channels within the groups OUT0:OUT3, OUT4:OUT7, OUT8:OUT11, OUT12:OUT15 are switching at the same
time. Between the 4 groups a delay of td = 25ns (typ.) is implemented. On request this delay can be turned off (see Ordering Information on page
20).
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To increase the EMI performance the rising and falling edges of the OUTn signals are symmetrical (tR = tF = 25ns). The rise- and fall-times are
factory set and can be changed on request. For further information and requests, please contact us mailto:[email protected].
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Revision 1.01
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AS1121
Datasheet - D e t a i l e d D e s c r i p t i o n
Serial Data Transfer Rate
Figure 25 shows a cascaded arrangement AS1121 devices connected to a controller, building a basic module of an LED display system.
Figure 25. Cascaded Configuration
VLED
VLED
VLED
...
100kΩ
OUT0
VLED
...
OUT15
OUT0
...
OUT15
SIN
SDI
SDO
XERR
SDI
SDO
VCC
XERR
VCC
XERR
CLK
VCC
LD
VCC
CLK
AS1121
LD
GSCLK
VCC
100nF
GSCLK
MODE
GND
MODE
GSCLK
MODE
VCC
100nF
GND
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OEN
AS1121
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CLK
LD
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VCC
OEN
SOUT
OEN
IREF
Controller
IREF
6
The maximum number of cascading AS1121 devices depends on the application system and is in the range of 40 devices. The minimum frequency needed can be calculated by the following equations:
fGSCLK = 4096 x fUPDATE
Where:
(EQ 5)
fGSCLK is the minimum frequency needed for GSCLK;
fUPDATE is the update rate of whole cascaded system.
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fCLK = 193 x fUPDATE x n
Where:
(EQ 6)
ni
fCLK is the minimum frequency needed for CLK and SIN;
fUPDATE is the update rate of whole cascaded system;
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n is the number of cascaded of AS1121 devices.
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Revision 1.01
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AS1121
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
9 Package Drawings and Markings
Figure 27. Packaging Code YYWWIZZ
YY
WW
manufacturing week
I
plant identifier
ZZ
free choice / traceability code
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last two digits of the current year
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Figure 26. 32-pin TQFN 5x5 mm Marking
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AS1121
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
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Figure 28. 32-pin TQFN 5x5 mm Package
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Revision 1.01
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AS1121
Datasheet - O r d e r i n g I n f o r m a t i o n
10 Ordering Information
The device is available as the standard products shown in Table 9.
Table 9. Ordering Information
Marking
Description
Delivery Form
Package
AS1121-BQFT
AS1121
16-Channel LED Driver with Dot Correction and
Greyscale PWM
Tape and Reel
32-pin TQFN 5x5 mm
AS1121B-BQFT*
AS1121B
16-Channel LED Driver with Dot Correction and
Greyscale PWM without Output Delay
Tape and Reel
32-pin TQFN 5x5 mm
Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is found at http://www.austriamicrosystems.com/Technical-Support
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For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
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*) on request
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Ordering Code
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Revision 1.01
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AS1121
Datasheet
Copyrights
Copyright © 1997-2011, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
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Disclaimer
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
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The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Headquarters
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Contact Information
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austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
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Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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