PD - 96406B
AUTOMOTIVE GRADE
AUIRLS4030
AUIRLSL4030
Features
l
l
l
l
l
l
l
l
Optimized for Logic Level Drive
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
HEXFET® Power MOSFET
D
G
S
VDSS
RDS(on) typ.
max.
ID
100V
3.4mΩ
4.3mΩ
180A
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a
wide variety of other applications.
G
S
D
S
D
G
D2Pak
AUIRLS4030
TO-262
AUIRLSL4030
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications
is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA)
is 25°C, unless otherwise specified.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
Avalanche Current
Repetitive Avalanche Energy
c
c
e
c
d
Units
180
130
730
370
2.5
± 16
305
See Fig. 14, 15, 22a, 22b,
21
-55 to + 175
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300
Thermal Resistance
Parameter
RθJC
RθJA
ik
Junction-to-Case
Junction-to-Ambient (PCB Mount) , D2Pak
j
Typ.
Max.
Units
–––
–––
0.40
40
°C/W
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
11/17/11
AUIRLS/SL4030
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
IDSS
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
100
–––
–––
–––
1.0
320
–––
–––
–––
–––
RG(int)
Internal Gate Resistance
–––
–––
0.10
3.4
3.6
–––
–––
–––
–––
–––
–––
–––
–––
4.3
4.5
2.5
–––
20
250
100
-100
2.1
–––
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 5mA
mΩ VGS = 10V, ID = 110A
VGS = 4.5V, ID = 92A
V VDS = VGS, ID = 250μA
S VDS = 25V, ID = 110A
VDS = 100V, VGS = 0V
μA
VDS = 100V, VGS = 0V, TJ = 125°C
VGS = 16V
nA
VGS = -16V
c
f
f
Ω
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
–––
87
130
–––
27
–––
–––
45
–––
–––
42
–––
–––
74
–––
––– 330 –––
––– 110 –––
––– 170 –––
––– 11360 –––
––– 670 –––
––– 290 –––
––– 760 –––
––– 1140 –––
nC
ns
pF
Conditions
ID = 110A
VDS = 50V
VGS = 4.5V
ID = 110A, VDS =0V, VGS = 4.5V
VDD = 65V
ID = 110A
RG = 2.7Ω
VGS = 4.5V
VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V
VGS = 0V, VDS = 0V to 80V
f
f
h
g
Diode Characteristics
Parameter
IS
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
c
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.05mH, RG = 25Ω,
IAS = 110A, VGS =10V. Part not recommended for use above
this value .
ISD ≤ 110A, di/dt ≤ 1330A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Min. Typ. Max. Units
–––
–––
180
A
–––
–––
730
Conditions
MOSFET symbol
D
showing the
integral reverse
G
S
p-n junction diode.
––– –––
1.3
V TJ = 25°C, IS = 110A, VGS = 0V
TJ = 25°C
VR = 85V,
–––
50
–––
ns
T
=
125°C
IF = 110A
–––
60
–––
J
di/dt = 100A/μs
TJ = 25°C
–––
88
–––
nC
TJ = 125°C
––– 130 –––
–––
3.3
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
f
f
Coss eff. (TR) is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
Rθ is measured at TJ approximately 90°C.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
RθJC value shown is at time zero.
2
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AUIRLS/SL4030
Qualification Information
†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
††
Comments: This part number(s) passed Automotive
qualification.
IR’s
Industrial
and Consumer
qualification level is granted by extension of the
higher Automotive level.
3L-D2 PAK
MSL1
3L-TO-262
N/A
Class M4(+/- 800V )†††
(per AEC-Q101-002)
Class H3A(+/- 6000V )†††
(per AEC-Q101-001)
Class C5(+/- 2000V )†††
(per AEC-Q101-005)
Yes
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
††
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
†††
Highest passing voltage
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3
AUIRLS/SL4030
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
BOTTOM
100
10
2.5V
2.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
10
0.1
1
10
100
1000
0.1
V DS, Drain-to-Source Voltage (V)
100
1000
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
1000
TJ = 175°C
100
TJ = 25°C
10
V DS = 50V
≤60μs PULSE WIDTH
1.0
1
2
3
4
ID = 110A
V GS = 10V
2.0
1.5
1.0
0.5
0.0
5
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
5.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
V GS, Gate-to-Source Voltage (V)
ID= 110A
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Ciss
10000
Coss
1000
Crss
100
V DS= 80V
V DS= 50V
4.0
3.0
2.0
1.0
0.0
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRLS/SL4030
10000
TJ = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
TJ = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100μsec
100
10msec
1msec
DC
10
Tc = 25°C
Tj = 175°C
Single Pulse
V GS = 0V
0.1
1
0.0
0.5
1.0
1.5
2.0
2.5
0
V SD, Source-to-Drain Voltage (V)
180
ID, Drain Current (A)
160
140
120
100
80
60
40
20
0
75
100
125
150
175
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)
200
50
100
1000
125
Id = 5mA
120
115
110
105
100
95
90
-60 -40 -20 0 20 40 60 80 100120140160180
TC , Case Temperature (°C)
TJ , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
4.5
EAS , Single Pulse Avalanche Energy (mJ)
1400
4.0
ID
17A
40A
BOTTOM 110A
1200
3.5
TOP
1000
3.0
Energy (μJ)
10
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
25
1
VDS, Drain-to-Source Voltage (V)
2.5
2.0
1.5
1.0
0.5
0.0
800
600
400
200
0
-20
0
20
40
60
80
100
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
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120
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
5
AUIRLS/SL4030
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
R3
R3
τ3
τC
τ
τ3
Ci= τi/Ri
Ci i/Ri
0.001
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
Ri (°C/W) τi (sec)
0.0477 0.000071
0.1631
0.1893
0.000881
0.007457
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 110A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
6
www.irf.com
AUIRLS/SL4030
40
IF = 73A
V R = 85V
35
2.0
TJ = 25°C
TJ = 125°C
30
1.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
2.5
ID = 250μA
ID = 1.0mA
ID = 1.0A
1.0
25
20
15
10
0.5
5
0
0.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
T J , Temperature ( °C )
600
800
1000
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
35
800
IF = 110A
V R = 85V
30
IF = 73A
V R = 85V
720
640
TJ = 25°C
TJ = 125°C
25
TJ = 25°C
TJ = 125°C
560
20
QRR (A)
IRRM (A)
400
diF /dt (A/μs)
15
480
400
320
10
240
5
160
0
80
0
200
400
600
800
1000
0
diF /dt (A/μs)
200
400
600
800
1000
diF /dt (A/μs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
880
IF = 110A
V R = 85V
800
720
TJ = 25°C
TJ = 125°C
QRR (A)
640
560
480
400
320
240
160
80
0
200
400
600
800
1000
diF /dt (A/μs)
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Fig. 20 - Typical Stored Charge vs. dif/dt
7
AUIRLS/SL4030
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
InductorCurrent
Curent
ISD
Ripple ≤ 5%
*
VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
V DS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- V DD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
8
Fig 24a. Gate Charge Test Circuit
Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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AUIRLS/SL4030
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
Part Number
AULS4030
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRLS/SL4030
TO-262 Package Outline (
Dimensions are shown in millimeters (inches))
TO-262 Part Marking Information
Part Number
AULSL4030
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRLS/SL4030
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
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60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
11
AUIRLS/SL4030
Ordering Information
Base part
AUIRLSL4030
AUIRLS4030
12
Package Type
TO-262
D2Pak
Standard Pack
Form
Tube
Tube
Tape and Reel Left
Tape and Reel Right
Complete Part Number
Quantity
50
50
800
800
AUIRLSL4030
AUIRLS4030
AUIRLS4030TRL
AUIRLS4030TRR
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AUIRLS/SL4030
IMPORTANT NOTICE
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the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
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and applications using IR components. To minimize the risks with customer products and applications, customers should
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be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
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WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
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13