LYT4211-4218/4311-4318 ™ LYTSwitch-4高功率LED驱动器IC产品系列 单级PFC初级恒流控制器，适用于低线电压输入， 可控硅调光和非调光应用 产品特色 • • • • • • • 优于±5%的恒流(CC)调整精度 可控硅调光至低于5%的光输出量 快速启动 • 最大亮度时启动时间<250毫秒 • 10%亮度时启动时间<1秒 高功率因数(>0.9) 轻松满足EN61000-3-2要求 • 设计经优化后THD可低于10% 效率最高可达92% 采用132 kHz开关频率设计可使用较小的磁芯 AC IN V D LYTSwitch-4 CONTROL S R BP FB PI-6800-050913 图 1. 典型电路原理图 高性能，内部集成了驱动电路、控制电路及开关管 LYTSwitch-4产品系列可设计具备高功率因数的离线式LED驱动 器，使其轻松满足国际标准规定的THD及谐波要求。输出电流精 度高，可达到优于±5%的恒流精度1。在典型应用中，效率可轻松 达到92%以上。 支持各种类型的可控硅调光器 适用于不同的应用和功率水平 元件编号 输入电压范围 可控硅调光 LYT4211-LYT4218 85-132 VAC 否 LYT4311-LYT4318 85-132 VAC 是 LYTSwitch-4产品系列可以为前沿及后沿可控硅调光应用提供出 色的导通（上电）性能。这会使驱动器具有更宽的调光范围以及 更快的启动速度，即使在低导通角下上电时也一样出色 – 具有大 输出功率表1.2 产品t 6 最小输出功率3 最大输出功率4 LYT4x11E/L5 2.5 W 12 W LYT4x12E/L 2.5 W 15 W LYT4x13E/L 3.8 W 18 W 路板。将PFC和CC功能同时集成到单级中还有助于降低成本和提 LYT4x14E/L 4.5 W 22 W 高效率。132 kHz 的开关频率允许使用较小的低成本磁芯。 LYT4x15E/L 5.5 W 25 W LYT4x16E/L 6.8 W 35 W 电解电容。这意味着驱动器的使用寿命可以得到大幅延长，对于 LYT4x17E/L 8.0 W 50 W 灯泡和其他高温应用尤为显著。 LYT4x18E/L 18 W 78 W 调光比与低“点亮”启动电流。 低方案成本与长使用寿命 LYTSwitch-4 IC具有高集成度，采用初级侧控制技术，可省去光 隔离器和减少元件数。这样就可以使用低成本的单面印刷电 采用LYTSwitch-4系列器件的LED驱动器无需使用初级侧大容量铝 eSIP-7C（E封装） eSIP-7F（L封装） 表 1. 输出功率表 注释： 1. 在典型设计中的性能。参见应用指。 2. 连续输出功率是在开放式设计及有足够的散热条件下测量得到的；器件周围 温度为70 °C。功率水平根据典型的LED灯串电压以效率>80%计算得出。 3. 最小输出功率要求CBP = 47 µF。 4. 最大输出功率要求CBP = 4.7 µF。 5. LYT4311 CBP = 47 µF，LYT4211 CBP = 4.7 µF。 6. 封装：eSIP-7C，eSIP-7F（参见图2）。 图 2. 封装选项 www.powerint.com 2013年10月 LYT4211-4218/4311-4318 拓扑结构 隔离 效率 成本 THD 输出电压 是 否 否 否 88% 92% 89% 90% 高 低 中 低 最好 良好 最好 最好 任何 受限 任何 高压 隔离反激式 降压式 抽头降压式 降压-升压式 表 2. 在典型非调光10 W低压设计中不同拓扑结构的性能 典型电路原理图 AC IN LYTSwitch-4 V D CONTROL S 主要特色 反激式 R BP FB PI-6800-050913 优势 • 提供隔离输出 • 支持最宽范围的输出电压 • 具有极佳的THD性能 限制 • 反激式变压器 • 总效率被变压器中的寄生电容和电感降低 • 需要更大的PCB面积来满足隔离要求 • 要求使用额外的元件（初级嵌位和偏置电路） • RMS开关及绕组电流更大，会增大损耗和降低效率 图 3a. 典型隔离反激式电路原理图 降压式 AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6841-060313 优势 • 效率最高 • 元件数量少，体积小 • 简单的低成本电感 • 低漏极-源极电压应力 • EMI性能最佳/滤波元件数目最少 限制 • 单输入线电压范围 • 输出电压<0.6 × VIN(AC) × 1.41 • 输出电压适合低THD设计 • 非隔离 图 3b. 典型降压式电路原理图 抽头降压式 AC IN 优势 • 非常适合低输出电压(<20 V) • 高效率 • 元件数量少 • 简单的低成本抽头电感 限制 • 设计最适合单输入线电压 • 要求使用额外的元件（初级箝位电路） • 非隔离 LYTSwitch-4 V D CONTROL S R BP FB PI-6842-060313 图 3c. 典型抽头降压式电路原理图 降压-升压式 优势 • 非常适合非隔离高输出电压设计 • 高效率 • 元件数量少 • 可以使用简单、常见的低成本功率电感 • THD最低 限制 • 最大VOUT受到MOSFET击穿电压的限制 • 单输入线电压范围 • 非隔离 AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6859-060313 图 3d. 典型降压-升压式电路原理图 2 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 DRAIN (D) 5.9 V REGULATOR BYPASS (BP) BYPASS CAPACITOR SELECT FAULT PRESENT AUTO-RESTART COUNTER BYPASS PIN UNDERVOLTAGE 1V VOLTAGE MONITOR (V) STOP LOGIC JITTER CLOCK OSCILLATOR LINE SENSE - LEB OCP + IV FEEDBACK (FB) VBG PFC/CC CONTROL IFB CURRENT LIMIT COMPARATOR - ILIM VSENSE MI FBOFF DCMAX IS REFERENCE BLOCK REFERENCE (R) SenseFet FBOFF DCMAX OV FEEDBACK SENSE Gate Driver Comparator + 3-VT 5.9 V 5.0 V - MI HYSTERETIC THERMAL SHUTDOWN + ILIM SOFT-START TIMER VBG 6.4 V PI-6843-071112 SOURCE (S) 图 4. 功能结构图 引脚功能描述 漏极(D)引脚： 电压监测(V)引脚： 这个引脚是功率FET的漏极连接点。在启动及稳态工作时还提供 该引脚与一个由整流管、滤波电容和电阻构成的外部输入线电 内部工作电流。 压峰值检测器相连。施加的电流用于控制输入过压(OV)的停止逻 源极(S)引脚： 辑，并提供前馈信号以控制输出电流和远程开/关功能。 这个引脚是功率FET的源极连接点。它也是旁路、反馈、参考及 电压监测引脚的接地参考。 Exposed Pad (Backside) Internally Connected to SOURCE Pin 旁路(BP)引脚： 一个外部旁路电容连接到这个引脚，用于生成内部5.9 V的供电 电源。此外，该引脚还可通过旁路引脚电容值的选取提供输出功 E Package (eSIP-7C) (Top View) 率选择。 7D 5S 4 BP 3 FB 2V 1R 反馈(FB)引脚： 反馈引脚用于输出电压反馈。流入反馈引脚的电流与输出电压 成正比。反馈引脚还包含开路负载和过载输出保护电路。 参考(R)引脚： 该引脚连接到一个外部精密电阻，用于配置调光(LYT4311-4318) 工作模式与非可控硅调光(LYT4211-4218)工作模式。 L Package (eSIP-7F) Exposed Pad (backside) Internally Connected to SOURCE Pin (see eSIP-7C Package Drawing) 1 3 5 R FB S 7 Lead Bend Outward 2 4 V BP D from Drawing (Refer to eSIP-7F Package Outline Drawing) PI-5432-082411 图 5. 引脚配置 3 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 功能描述 LYTSwitch-4器件将一个控制器和一个高压功率FET单片集成到了 参考引脚 同一个封装内。控制器可同时提供单级高功率因数校正(PFC)和 参考引脚通过外部电阻接地（源极）。选取的值设定内部参 恒流输出。LYTSwitch-4控制器包括一个振荡器、反馈（检测及 考，从而决定采用调光(LYT4311-4318)工作模式还是非调光 逻辑）电路、5.9 V稳压器、迟滞过热保护、频率抖动、逐周期限 (LYT4211-4218)工作模式，以及电压监测引脚的输入过压阈 流、自动重启动、电感校正、功率因数以及恒流控制电路。 值。对于采用LYT4211-4218器件的非调光或PWM调光应用， 外部电阻的值应为24.9 kW ±1%。对于采用LYT4311-4318器件 反馈引脚电流控制特性 下图显示了反馈引脚电流的工作边界。电流超过I FB(SKIP)时，开关 被禁止；电流低于IFB(AR)时，器件进入自动重启动模式。 的相位角AC调光应用，外部电阻的值应为49.9 kW ±1%。由于 电阻容差直接影响输出容差，建议采用1%的电阻容差。不得使 用其他电阻值。 旁路引脚电容功率增益的选择 LYTSwitch-4器件能够调整内部增益以适应满输出功率设置或减 IFB(SKIP) 输出功率设置。这样就可以根据散热和效率的需要，选择较大 Skip-Cycle 规格的器件并达到降低耗散的目的。功率增益根据旁路引脚电 容的值来选择。满功率设置通过一个4.7 mF电容来选取，减功率 设置（为获得更高效率）通过一个47 mF电容来选取。旁路引脚电 容可同时设定功率增益和过流保护(OCP)阈值。与较大规格的器 CC Control Region IFB 件不同，LYT4x11的功率增益不可编程。LYT4x11器件使用一个 47 mF电容。 开关频率 在正常工作条件下，开关频率为132 kHz。为使EMI电平更低， IFB(DCMAXR) 将开关频率抖动（调制）了约2.6 kHz。启动时的频率为66 kHz， 以便在对AC输入进行相位角调光时缩短启动时间。在深度调光 Soft-Start and CC Fold-Back Region 时禁止抖动。 软启动 控制器具有软启动调整功能，在输出电容很大的设计中可以防止电 源在软启动期间(t SOF T )误认为输出短路而进入自动重启动保护状 态。在启动时，LYTSwitch-4对最大占空比加以限制以输出功率。软 IFB(AR) 启动持续总时间为tSOFT。 Auto-Restart DC10 DCMAX Maximum Duty Cycle PI-5433-060410 远程ON/OFF和EcoSmart™ 电压监测引脚上连有1 V的输入阈值比较器，此电压阈值也可用于 实现远程ON/OFF控制。当电压监测引脚接收到禁止输出的信号 时（电压监测引脚通过光耦器的光电管接地），LYTSwitch-4将 在内部功率FET被强行关断之前完成其当前开关周期。 图 6. 反馈引脚电流特性 反馈引脚电流还可用于箝位最大占空比，以限制过载和开环情 况下的可用输出功率。这种占空比减小特性还可以使启动时输 出电流单调上升，并有助于防止过冲。 远程ON/OFF功能也可用作LYTSwitch-4的节能模式或电源 开关，使之长时间处于极低功耗状态。进入此模式后， 当LYTSwitch-4被远程导通，它将在旁路脚电压再次达到5.9 V时 执行正常的软启动程序。在最差情况下，从远程导通到启动的 延迟时间可与旁路脚的整个充放电时间相同。这种降低功耗的 远程关断模式可省去昂贵且不可靠的线上机械开关。 4 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 过流保护 电流限流电路检测功率FET的电流。当电流超过内部阈值(I LIMIT) 时，在该周期剩余阶段会关断功率FET。在功率FET导通后，前 沿消隐电路会将电流限流比较器抑制片刻(tLEB)。通过设置前沿消 V D CONTROL 隐时间，可以防止由电容及整流管反向恢复产生的电流尖峰引起 BP 导通的功率FET提前误关断。 S R FB 输入过压保护 该器件具有输入过压检测功能，可限制通过电压监测引脚检测 到的最高工作电压。需要使用一个由二极管和电容构成的外部峰 值检测器，通过电阻向电压监测引脚提供输入峰值线电压。 PI-5435-052510 图 7. 远程ON/OFF电压监测引脚控制 5.9 V稳压器/分流电压箝位 在功率FET处于关断期间，内部的5.9 V稳压器就会从漏极电压吸 收电流，将连接到旁路引脚的旁路电容充电到5.9 V。旁路引脚 电阻设定输入过压(OV)关断阈值，当超过阈值时就会强制 LYTSwitch-4停止开关。当输入线电压恢复正常水平后，器件将 恢复正常工作。OV阈值有少量迟滞以防止噪声引发切换。当功 率FET关断时，由于没有反射电压和漏感尖峰电压叠加到漏极， 经整流的直流高压抗浪涌冲击能力增大到功率FET的额定电压 是内部供电电压节点。当功率FET导通时，器件利用储存在旁路 (670 V)。 电容内的能量工作。内部电路极低的功率耗散使LYTSwitch-4可 迟滞热关断 使用从漏极吸收的电流持续工作。一个47或4.7 mF的旁路电容就 热关断电路检测控制器的结温度。阈值设置在142 °C并具备75 °C 足够实现高频率的去耦及能量存储。此外，当有电流通过一个 的迟滞范围。当结温度超过这个阈值(142 °C)，功率FET开关被 外部的电阻提供给旁路引脚时，一个6.4 V分流稳压箝位电路会 禁止，直到结温度下降75 °C，功率FET才会重新使能。 将旁路引脚电压箝位在6.4 V。这样就很方便从偏置绕组由外部 向LYTSwitch-4供电，从而提高工作效率。建议从偏置绕组向旁 路引脚供电，以维持正常工作。 自动重启动 安全工作区(SOA)保护 该器件还带有安全工作区(SOA)保护模式，在峰值开关电流达到 ILIMIT阈值且开关导通时间小于tON(SOA)时，可禁止40个周期的FET开 关。这种保护模式可以在LED发生短路的情况下，以及在自动 在开环故障（反馈引脚电阻开路或反馈绕组短路）、输出短路 重启动保护被抑制的软启动期间进行启动时对器件提供保护。 或过载情况下，控制器进入自动重启动模式。在软启动结束 SOA保护模式在正常工作情况下仍然有效。 后，一旦反馈引脚电流低于IFB(AR)阈值，控制器立即“报告”短路 和开路故障。为了降低此故障情况下的功耗，关断/自动重启动 电路将通常以DC AR的自动重启动占空比对电源进行接通（与软 启动持续时间相同）和关断操作，直到故障排除为止。如果故 障在自动重启动关断期间消除，电源将保持自动重启动，直到 整个关断时间计时结束。设计时必须特别注意，应采用最适合 的输出电容容量，以确保在软启动期间(t SOFT)结束后，反馈引脚 电流高于I FB(AR) 阈值，使电源能够成功启动。软启动期间结束 后，自动重启动只有在反馈引脚电流低于IFB(AR)时才会激活。 5 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 应用范例 20 W可控硅调光的高功率因数LED驱动器的设计范例(DER-350) 制在L1、L2、L3、C1和AC输入阻抗之间形成的任何谐振。 需要使用一个较小的大容量电容(C4)为初级开关电流提供低阻 图8所示为基于LYTSwitch-4系列器件中的LYT4317E设计的一款 抗源。C2和C4的最大值受到限定，以使功率因数始终大于0.9。 可控硅调光高功率因数LED驱动器的电路图。只需要简单地改变 LYTSwitch-4初级 元 件 值 就 可 以 将 该 设 计 配 置 为 非调 光 应 用 。 该 驱 动 器 可 以 为向U1提供峰值输入电压信息，经整流AC的输入峰值经由D2对 36 V电压、0.7 A恒流驱动LED灯串，非常适合高流明PAR灯替换 C6充电。然后电流经过R10，注入U1的电压监测引脚。器件也 应用。该设计可以在90至132 VAC的输入电压范围内进行工作。 会利用此检测电流来设定输入过压保护阈值。电阻R9为C6提供 放电通路，时间常数远大于经整流AC的放电时间，以防止生成 该设计的主要目标是实现与标准前沿可控硅AC调光器的兼容，达 线电压频率纹波。 到极宽调光范围（1000:1，550 mA:0.55 mA）、高效率(>85%) 和高功率因数(> 0.9)。这种设计能够对空载（开路负载）、过压、 电压监测引脚电流和反馈引脚电流在内部用来控制平均输出LED 输出短路或过载和过热等故障提供全面防护。 电流。对于可控硅相位调光应用，可在参考引脚上使用一个 电路描述 49.9 kW电阻(R14)，在电压监测引脚上使用一个2 MW(R10)电阻， LYTSwitch-4器件(U1- LYT4317E)在单个封装中集成了功率FET、 使输入电压和输出电流之间保持线性关系，从而扩大调光范围。 控制器和多种启动功能，能够减少典型设计方案的元件数。U1作 为隔离式连续导通模式反激式转换器的组成部分，通过其内部 由于漏感会带来影响，二极管D3、R15和C7将漏极电压箝位 控制算法和小输入电容设计可以实现高功率因数。连续导通模 到一个安全水平。需要使用二极管D4来防止反向电流在经整流 式工作可以减小初级峰值电流和RMS电流。这都有利于EMI噪声 AC输入电压（C4上的电压）低于反射输出电压(VOR)的期间内 的降低，可以使用更简单、更小的EMI滤波元件，并提升工作效 流经U1。 率。无需使用次级侧检测即可维持输出电流调节，因而可省去 电流检测电阻并提升工作效率。 二极管D6、C5、C9、R19和R20构成初级偏置电源，能量来自 输入级 变压器的辅助绕组。电容C8对U1的旁路引脚进行局部去耦，该引 保险丝F1提供元件故障保护，RV1在差模浪涌期间提供箝位， 脚是内部控制器的供电引脚。在启动期间，C8从与器件漏极引 使U1的峰值漏极电压始终低于内部功率FET的670 V额定值。桥式 脚相连的内部高压电流源被充电至约6 V。此时器件开始开关， 整流器BR1对AC输入电压进行整流。EMI滤波由L1-L3、C1、 器件的供电电流再由偏置供电经过R17提供。电容C8还可选择输 C4、R2、R24、R25以及Y级安全电容(CY1)共同提供，Y电容跨 出功率模式（本设计选用适合减功率的47mF来降低U1耗散和提 接初级侧和次级侧之间的安全绝缘层。电阻R2、R24和R25可抑 高效率）。 C13 R26 100 pF 30 Ω 200 V D9 DFLU1400-7 R24 47 kΩ 1/8 W BR1 MB6S 600 V D2 DFLU1400 R9 510 kΩ 1/8 W FL1 1 FL2 D3 US1J R2 L1 47 kΩ 1 mH 1/8 W R6 360 kΩ L3 5 mH L2 1 mH T1 RM8 LYTSwitch-4 U1 LYT4317E RV1 140 VAC L 90 - 132 VAC Q1 X0202MA2BL2 N C3 470 nF 50 V R8 100 Ω 1W D5 BAV16 R17 3 kΩ 1/10 W V CONTROL S R R18 165 kΩ 1% 1/16 W BP FB R14 49.9 kΩ 1% 1/16 W C8 47 µF 16 V Q2 MMBT3904 C14 10 nF 50 V RTN C9 56 µF 50 V C5 100 nF 50 V R19 20 kΩ 1/8 W D4 US1D C4 C6 100 nF 2.2 µF 250 V 250 V D F1 5A R20 39 Ω 1/8 W D8 BAV21 VR4 MAZS3300ML 33 V C2 100 nF 250 V R25 47 kΩ 1/8 W 11 R10 2 MΩ 1% C1 220 nF 250 V 36 V, 550 mA D6 BAV21 10 R1 510 1/2 W C12 C11 330 µF 330 µF R23 63 V 63 V 20 kΩ D7 BYW29-200 C7 2.2 nF 630 V R15 200 kΩ 12 R27 10 Ω 1/10 W C15 100 nF 50 V R22 1 kΩ 1/10 W CY1 470 pF 250 VAC PI-6875-052213 图 8. DER-350：隔离式可控硅调光的高功率因数、90-132 VAC、20 W / 36 V / 550 mA LED驱动器的电路原理图 6 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 反馈 由于LED照明的功耗非常低，整灯吸收的电流要小于调光器内可 偏置绕组电压与输出电压成比例（由偏置绕组与次级绕组之间 控硅的维持电流。这样会因为可控硅导通不一致而产生不良情 的匝数比设定）。这样不需要次级侧反馈元件就可以对输出电 况，比如调光范围受限和/或闪烁。由于LED灯的阻抗相对较 压进行监测。电阻R18将偏置电压转换为电流，馈入U1的反馈 大，因此在可控硅导通时，浪涌电流会对输入电容进行充电， 引脚。U1中的内部引擎综合反馈引脚电流、电压监测引脚电流 产生很严重的振铃。这同样会造成类似不良情况，因为振荡会 及漏极电流信息，在1.5:1的输出电压变化范围内（LED灯串电 使可控硅电流降至零并关断。 压变化为±25%）以固定输入线电压提供恒定输出电流。 要克服这些问题，需增加两个电路 – SCR有源衰减电路和R-C无 为限制空载下的输出电压，D8、C15、R22、VR4、R27、C14 源泄放电路。这些电路的缺点是会增大功耗，进而降低电源的 及Q2共同形成一个输出过压保护电路。如果断开输出负载的连 效率。对于非调光应用，可以省略这些元件。 接，偏置电压将升高，直至VR4导通，这样会使Q2导通并减小流 入反馈引脚的电流。当该电流低于10 mA时，器件进入自动重启 动模式，开关被禁止300 ms，使输出电压（和偏置电压）下降。 输出整流 变压器次级绕组由D7进行整流，由电容C11和C12进行滤波。 选择超快TO-220二极管用以提高效率，所选取的C11和C12的 总值可使LED峰峰纹波电流等于平均值的30%。如果需要更低纹 波的设计，可提高输出电容值。 R23用作小的假负载，可在关断时对输出电容内的残留电荷进行 放电。 SCR有源衰减电路由元件R6、C3、Q1和R8构成。该电路可以 在可控硅导通时限制流入C4并对其充电的浪涌电流，实现方式 是在可控硅导通的前约1 ms内将R8串联。在大约1 ms后，Q1导 通并旁通R8。这样可使R8的功耗保持在低水平，在限流时可以 使用更大的值。电阻R6和C3在可控硅导通后延迟Q1导通。二极 管D9阻止电容C4中的电荷在可控硅导通后出现回流，这有助于 提高对调光器，特别是高功率调光器的兼容性。 无源泄放电路由R1和C1构成。这有助于使输入电流始终大于可 控硅的维持电流，而与驱动器等效电阻对应的输入电流将在每 个AC半周期内增大。 可控硅相位调光控制兼容性 对于用低成本的可控硅前沿相控调光器提供输出调光的要求， 我们需要在设计时进行全面权衡。 7 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 修改后的DER-350：20 W高功率因数LED驱动器（适用于 • 非调光应用和增强型线电压调整） 图9所示为基于LYTSwitch-4系列器件中的LYT4317设计的一款 对于最大输出功率列 • 反射输出电压(VOR)为65 V • 反馈引脚电流取值165 µA • 旁路引脚电容取值4.7 µF (LYT4x11 = 4.7 µF) 高功率因数LED驱动器的电路图。该驱动器可以36 V电压、0.55 A 恒流驱动LED灯串，非常适合高流明PAR灯替换应用。该设计可 注意，输入电压高于85 VAC时，不会改变LYTSwitch-4器件的功 在90 VAC至132 VAC的低压输入电压范围内工作，适用于非调 率输出能力。 光应用。在输出电流随输入电压的变化方面，非调光应用拥有 比调光应用更小的变化幅度。要注意的是，虽然没有指定为调 光设计，但如果最终用户在设计中使用了相控调光器，也不会 对电路造成任何损坏。 器件选择 可以通过对比要求的输出功率与表1中的功率值来选择器件。 对于发热量高的设计，比如白炽灯替换灯，LYTSwitch-4器件的周 围环境温度不是过高，就是散热空间非常有限，此时应使用最 针对非调光配置进行修改 小输出功率列。最小功率可通过一个47 µF旁路引脚电容来选 该设计可经过简单配置后用于非调光应用，具体方法是去除用 取，这样可获得一个更小的器件电流限值，从而降低导通损耗。 于SCR有源衰减电路（R6、R8、C3和Q1）、阻断二极管D9和 对于敞开式设计或具有一定散热空间的设计，可参照最大输出 R-C泄放电路（R1、C1）变化的元件，并将参考电阻R14替换 功率列。最大输出功率可通过一个4.7 µF旁路引脚电容来选取， 为24.9 kW。（参见图9） 但LYT4x11除外，因为该器件只有一个功率设置。在所有情况下， 为了获得最佳输出电流容差，都应将器件温度保持在100 °C以下。 主要应用指南 最大输入电容 功率表 数据手册中的功率表（表1）代表了以下条件下的最小及最大实 际连续输出功率： 为了实现高功率因数，用于EMI滤波器和经整流AC去耦（大容 量电容）的电容值必须受到限制。最大值与设计的输出功率成 函数关系，随输出功率的下降而减小。对于大部分设计，如果 使用100 nF大容量电容，应将总电容限制在200 nF以内。与陶 • 效率为80% • 器件周围环境温度为70 °C 瓷电容相比，建议使用薄膜电容，因为后者在使用前沿相控调 • 散热能力足以使器件温度保持在100 °C以下 光器的情况下可以降低音频噪声。在EMI滤波器中，电容起始值 对于最小输出功率列 取10 nF，然后增大该值，直到具有足够的EMI裕量。 • • 反射输出电压(VOR)为120 V • 反馈引脚电流取值135 µA • 旁路引脚电容取值47 µF C13 R26 100 pF 30 Ω 200 V R24 47 kΩ 1/8 W D2 DFLU1400 R9 510 kΩ 1/8 W BR1 MB6S 600 V FL1 1 FL2 D6 BAV21 10 D3 US1J 11 R10 2 MΩ 1% L2 1 mH L3 5 mH T1 RM8 LYTSwitch-4 U1 LYT4317E RV1 140 VAC V CONTROL S L 90 - 132 VAC N D5 BAV16 R17 3 kΩ 1/10 W R R18 165 kΩ 1% 1/16 W BP FB R14 24.9 kΩ 1% 1/16 W C8 47 µF 16 V 36 V, 550 mA Q2 MMBT3904 C14 10 nF 50 V RTN C9 56 µF 50 V C5 100 nF 50 V R19 20 kΩ 1/8 W D4 US1D C4 C6 100 nF 2.2 µF 250 V 250 V D F1 5A R20 39 Ω 1/8 W D8 BAV21 VR4 MAZS3300ML 33 V R2 L1 47 kΩ 1 mH 1/8 W R25 47 kΩ 1/8 W C2 100 nF 250 V C11 C12 330 µF 330 µF R23 63 V 63 V 20 kΩ D7 BYW29-200 C7 2.2 nF 630 V R15 200 kΩ 12 R27 10 Ω 1/10 W C15 100 nF 50 V R22 1 kΩ 1/10 W CY1 470 pF 250 VAC PI-6875a-052213 图 9. RD-350修改版电路原理图：非调光隔离式高功率因数、90-132 VAC、20 W / 36 V LED驱动器的电路原理图 8 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 参考引脚电阻值的选取 输入电压峰值检测电路 LYTSwitch-4产品系列包括相位控制调光器件LYT4311-4318和 LYTSwitch-4器件使用峰值输入电压来调节功率输出量。建议采 非调光器件LYT4211-4218。非调光器件使用一个24.9 kΩ ±1% 用1 mF至4.7 mF的电容值，以降低输入线电压纹波和获得最高的 参考引脚电阻，以便（随着AC输入电压的变化）获得最佳的 功率因数(>0.9)，较小的值是可以接受的，但会导致PF降低和输 输出电流容差。调光器件（如LYT4311-4318）使用一个49.9 kΩ 入线电流失真度增大。 ±1%参考引脚电阻来获得最宽的调光范围。 相控调光器的工作方式 电压监测引脚电阻网络的选择 调光器开关通过不导通（消隐）一部分AC电压正弦波来控制白 在使用LYT4311-4318时，为获得最宽的AC相位角调光范围， 炽灯的亮度。这样可降低施加到灯泡的RMS电压，从而降低亮 应使用一个2 MΩ（对于日本的100 VAC输入，则为1.7 MΩ）电 度。这称为自然调光，对LYTSwitch-4 LYT4311-4318器件进行调 阻使其连接到输入电压峰值检测电路。确保该电阻的电压额定 光配置后，器件可以随着RMS输入电压的下降而减小LED电流， 值大于峰值输入电压。必要时，可使用多个串联电阻。 达到自然调光的目的。根据这一特点，可以特意降低电压调整性 初级箝位和输出反射电压VOR 初级箝位电路可用来限制峰值漏源极电压。齐纳二极管箝位要求 使用最少的元件和最小的占板空间，可达到最高效率。RCD箝位 能，以增大调光范围并尽量接近模拟白炽灯的工作方式。使用 一个49.9 kW参考引脚电阻即可选择自然调光模式工作。 前沿相控调光器 也是可以接受的，但在启动和输出短路期间应仔细检验峰值漏 对于用低成本的可控硅前沿相控调光器提供无闪烁输出调光的 极电压，因为箝位电压会随着峰值漏极电流发生大幅变化。 要求，我们需要在设计时进行全面权衡。 为实现最高效率，所选箝位电压至少应为输出反射电压V OR 的 由于LED照明的功耗非常低，整灯吸收的电流要小于调光器内可 1.5倍，以缩短漏电尖峰传导时间。这不仅能确保箝位电路有效 控硅的维持电流。这样会产生调光范围受限和/或闪烁等不良 工作，还可将最大漏极电压维持在FET的额定击穿电压 情况。由于LED灯的阻抗相对较大，因此在可控硅导通时，浪涌 之下。RCD（或RCDZ）箝位的箝位电压容差比齐纳二极管箝位 更精确。RCD箝位比齐纳二极管箝位更具成本效益，但要求设 计更为严密，以确保最大漏极电压不会超过功率FET的击穿 电压。这些VOR限值是基于内部FET的BVDSS额定值设置的，大部 分设计的V OR值通常都介于60 V和100 V之间，能够达到最佳的 PFC和调整性能。 串联漏极二极管 电流会对输入电容进行充电，产生很严重的振铃。这同样会造 成类似不良情况，因为振荡会使可控硅电流降至零并关断。 要克服这些问题，需增加两个电路 – 有源衰减电路和无源泄放 电路。这些电路的缺点是会增大功耗，进而降低电源的效率。 因此对于非调光应用，可以省略这些元件。 图10a显示的是前沿可控硅调光器输入端的输入电压及电流， 可以将一个超快速恢复二极管或肖特基二极管与漏极串联，防 图10b显示的是经整流的总线电压。在本例中，可控硅以90度 止反向电流流入器件。电压额定值必须大于输出反射电压VOR。 角导通。 PI-5983-060810 350 0.35 Voltage Current 250 0.25 0.15 150 0.05 50 -50 0.5 50 100 150 200 250 300 350 400 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 Line Current (Through Dimmer) (A) Line Voltage (at Dimmer Input) (V) 电流额定值应超过平均初级电流的两倍，其峰值额定值等于所 选LYTSwitch-4器件的最大漏极电流。 Conduction Angle (°) 图 10a. 前沿可控硅调光器在在90°下的理想输入电压和电流波形 9 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 250 0.25 200 0.2 150 0.15 100 0.1 50 0.05 0 0 0 50 100 150 200 250 300 350 Voltage Current 250 0.25 0.15 150 0.05 50 -50 0.35 0 50 100 150 200 250 300 350 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 400 Dimmer Output Current (A) 0.3 PI-5986-060810 350 Dimmer Output Voltage (V) Rectified Input Voltage (V) Voltage Current 300 0.35 Rectified Input Current (A) PI-5984-060810 350 Conduction Angle (°) Conduction Angle (°) 图 10b. 可控硅调光器输出整流后形成的波形 图 12. 后沿可控硅调光器在90SDgr导通角下的理想调光器输出电压和电流波形 图11显示的整流后总线电压及电流则不太理想，因为可控硅过 先添加一个泄放电路。在经整流总线（图8中的C1和R1）上添 早关断并重启动。 加一个0.44 µF电容和510 W 1 W电阻（元件串联）。如果可取得 令人满意的工作性能，将电容值减至最小（达到可接受的性 如果可控硅在半周期结束之前就异常关断，或者其他半AC周期 能），以降低损耗和提高效率。 具有不同的导通角，那么LED灯就会因为输出电流的变化而出现 闪烁。在设计中添加一个泄放和衰减电路就可以解决此问题。 如果泄放电路不能维持可控硅的导通，则应添加一个有源衰减 电路（如图8所示）。该电路由元件R6、C3、Q1以及R8共同组 调光器的表现因制造商和额定功率而异，例如，由于驱动电路和 成。该电路可以在可控硅导通时限制流入C4并对其充电的浪涌 可控硅维持电流规格不同，300 W调光器所要求的衰减作用和泄 电流，实现方式是在可控硅导通的前1 ms内将R8串联。在大约 放功耗要小于600 W和1000 W调光器。用同一调光器对多个并联 1 ms后，Q1导通并将R8短路。这样可使R8的功耗保持在低水平， 灯调光时，由于并联灯的电容增大，会产生更多的振荡。因此， 在限流时可以使用更大的值。通过增大R6的值来增加Q1导通之 在测试调光器工作情况时，应检验大量的调光器、不同的输入电 前的延迟时间，可以提高调光器的兼容性，但会造成R8功耗 压，并分别检验单个驱动器和多个驱动器并联的情况。 增大。在进行这些调整时，注意监测电源输入端的AC输入电流 及电压。增加延迟，直到可控硅工作正常，但应使延迟尽可能 Rectified Input Voltage (V) Voltage Current 300 0.35 0.3 250 0.25 200 0.2 150 0.15 100 0.1 50 0.05 0 0 0 50 100 150 200 250 Conduction Angle (°) 300 350 400 地短，以免影响电源效率。 Rectified Input Current (A) PI-5985-060810 350 一般来说，泄放电路和衰减电路中的功耗越大，能与驱动器配 合工作的调光器类型就越多。 后沿相控调光器 图11显示的是采用后沿调光器的电源输入端的输入电压及电 流。在本例中，调光器以90度角导通。许多此类调光器使用背 靠背连接的功率FET，而不是可控硅来控制负载。这可以避免可 控硅的维持电流问题，并且由于导通在过零点开始，还可以减小 高电流浪涌和电流振荡。通常，此类调光器不需要衰减和泄放 电路。 图 11. 导通不稳定的相位角调光器示例 10 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 布局注意事项 使用前沿调光器时的音频噪声考虑因素 通常由输入电容、EMI滤波电感和变压器进行调光时，便会产生 噪声。输入电容和电感在每个AC半周期都会遇到高di/dt和dv/dt， 这是由于可控硅导通时浪涌电流流入并对输入电容进行 充电。选择薄膜电容而不是陶瓷电容、减小电容值以及选择外 形短且宽的电感，就可以使噪声得到降低。 初级侧连接 源极引脚和供电回路的地线要单点连接(Kelvin)到输入滤波电容 的负端。使浪涌电流从偏置绕组直接返回输入滤波电容，增强 了浪涌的承受力。旁路引脚电容应靠近旁路引脚放置，并尽可 能近地连接到源极引脚。源极引脚连线上不应有主功率FET的开 变压器也可以产生噪声，但如果不使用加长型磁芯（机械谐振 频率高），就可以降低噪声。例如，在相同的磁通密度下， RM磁芯所产生的噪声要比EE磁芯少。减小磁芯磁通密度也可以 降低噪声。通常情况下，将最大磁通密度(BM)减至1500高斯可 关电流流过。所有连接到源极引脚的反馈引脚元件都应遵循与 旁路引脚电容相同的规则。重要的是，主功率FET的开关电流应 以尽可能短的路径返回大容量电容。高电流的长路径会产生大 量的传导及辐射噪声。 消除任何噪声，但这要与给定输出功率所需的更大磁芯尺寸进 次级侧连接 行平衡。 输出整流管与输出滤波电容应尽可能地接近。变压器的输出回 路引脚与输出滤波电容返回侧之间的连线应比较短。 散热及使用寿命考虑因素 照明应用对驱动器提出了较高的散热挑战。在许多情况下，LED 负载功耗大小决定了驱动器的工作环境温度，因此，散热评估 应根据最终外壳中的驱动器进行。温度对驱动器和LED的使用寿 命有直接的影响。温度每升高10 °C，元件寿命就会缩短1/2。 因此，必须正确散热并检验所有器件的工作温度。 Input EMI Filter LYT4317E Bullk Capacitor BYPASS Pin Capacitor Clamp Transformer Output Diode Output Capacitor REFERENCE Pin Resistor FEEDBACK Pin Resistor VOLTAGE MONITOR Pin Resistor Output Capacitors PI-6904-072313 图 13. DER-35 20 W布局范例，顶面丝印/底层 11 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 快速设计校验 最大漏极电压 确认峰值VDS在包括启动和故障条件在内的所有工作条件下都不 超过670 V。 最大漏极电流 测量包括启动和故障条件在内的所有工作条件下的峰值漏极电 流。查找变压器饱和时的信号（通常在最高工作环境温度下出 现）。确认峰值电流小于数据手册中规定的绝对最大额定值。 热检测 在最大输出功率、最小和最大输入电压及最高环境温度条 件下，检验LYTSwitch-4、变压器、输出二极管、输出电容和 漏极箝位元件是否超过温度指标。 12 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 绝对最大额定值(1,4) 漏极引脚峰值电流(5)： LYT4x11..........................................1.37 A LYT4x12......................................... 2.08 A LYT4x13 .........................................2.72 A LYT4x14......................................... 4.08 A LYT4x15 ........................................ 5.44 A LYT4x16 ........................................ 6.88 A LYT4x17.......................................... 7.73 A LYT4x18 ........................................ 9.00 A 漏极引脚电压 ......................................................... -0.3到670 V 旁路引脚电压 .............................................................. -0.3到9 V 旁路引脚电压 ................................................................ 100 mA 电压监测引脚电压 ................................................... -0.3到9 V(6) 反馈引脚电压 ............................................................. -0.3到9 V 参考引脚电压 ............................................................. -0.3到9 V 引线温度(3) ...................................................................... 260 °C 贮存温度 ............................................................... -65到150 °C 工作结温度(2) ........................................................... -40到150 °C 注释： 1. 所有电压都是以TA = 65 °C时的源极为参考点。 2. 通常由内部电路控制。 3. 在距壳体1/16英寸处测量，持续时间5秒。 4. 在短时间内施加器件允许的绝对最大额定值不会引起产品永久 性的损坏。但长时间用在器件允许的最大额定值时，会对产品的 可靠性造成影响。 5. 当漏极电压同时低于400 V时，可允许峰值漏极电流。 另请参见图13。 6. 在启动期间（旁路引脚开始对IC供电之前的时段），电压监测引 脚的电压可以安全无损地升高至15 V。 热阻抗 热阻：E或L封装 注释： (qJA) ....................................................105 °C/W(1) 1. 无须常设散热片。 (qJC) .................................................... 2 °C/W 2. 在器件本身后部的散热片上测量得到。 (2) 参数 符号 条件 源极 = 0 V；TJ = -20 °C到125 °C （除非另有说明） 最小值 典型值 最大值 124 132 140 单位 控制功能 开关频率 频率抖动调制速率 fOSC 平均 TJ = 65 °C TJ = 65 °C fM ICH1 2.6 见注释B -4.1 -3.4 -2.7 VBP = 0 V， LYT4x12 -7.3 -6.1 -4.9 TJ = 65 °C LYT4x13-4x17 -12 -9.5 -7.0 LYT4x18 -13.3 -10.8 -8.3 LYT4x11 -0.81 -0.62 -0.43 VBP = 5 V， LYT4x12 -3.1 -2.4 -1.7 TJ = 65 °C LYT4x13-4x17 -5.6 -4.35 -3.1 LYT4x18 -6.75 -5.5 -4.25 VBP 0 °C < TJ < 100 °C 旁路引脚电压迟滞 VBP(H) 0 °C < TJ < 100 °C 旁路引脚分流电压 VBP(SHUNT) 旁路引脚电压 软启动时间 0.7 见注释A、B 充电电流温漂 tSOFT IBP = 4 mA 0 °C < TJ < 100 °C TJ = 65 °C VBP = 5.9 V 5.75 5.95 6.4 55 76 mA %/°C 6.15 0.85 6.1 kHz kHz LYT4x11 旁路引脚充电电流 ICH2 5.4 抖动的峰-峰值 V V 6.6 V ms 13 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 参数 符号 条件 源极 = 0 V；TJ = -20 °C到125 °C （除非另有说明） 最小值 典型值 最大值 0.5 0.8 1.2 单位 控制功能（续上） ICD2 漏极供电电流 ICD1 0 °C < TJ < 100 °C FET未开关 0 °C < TJ < 100 °C FET开关，频率fOSC mA 1 2.5 4 115 123 131 电压监测引脚 输入过压阈值 IOV 电压监测引脚电压 VV 电压监测引脚短路电流 IV(SC) TJ = 65 °C RR = 24.9 kW RR = 49.9 kW 阈值 6 迟滞 0 °C < TJ < 100 °C IV < IOV VV = 5 V TJ = 65 °C 2.75 3.0 3.25 V 165 185 205 mA VV(REM) TJ = 65 °C IFB(DCMAXR) 0 °C < TJ < 100 °C 跳周期阈值 IFB(SKIP) 0 °C < TJ < 100 °C 210 最大占空比 DCMAX IFB(DCMAXR) < IFB < IFB(SKIP) 0 °C < TJ < 100 °C 90 远程ON/OFF阈值 mA 0.5 V 反馈引脚 最大占空比开始的 反馈引脚电流 反馈引脚电流 反馈引脚电压 反馈引脚短路电流 占空比降低 VFB IFB = 150 mA 0 °C < TJ < 100 °C 90 mA mA 99.9 % 2.1 2.3 2.56 V 400 480 mA IFB(SC) VFB = 5 V TJ = 65 °C 320 DC10 IFB = IFB(AR)，TJ = 65 °C，见注释B 17 DC40 IFB = 40 mA，TJ = 65 °C 34 DC60 IFB = 60 mA，TJ = 65 °C 55 % 自动重启动 自动重启动导通时间 tAR 自动重启动占空比 DCAR SOA开关最短“导通”时间 tON(SOA) 自动重启动期间的 反馈引脚电流 IFB(AR) TJ = 65 °C VBP = 5.9 V TJ = 65 °C 见注释B 55 76 ms 25 % TJ = 65 °C 见注释B 0 °C < TJ < 100 °C 6.5 0.875 ms 10 mA 14 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 参数 符号 条件 源极 = 0 V；TJ = -20 °C到125 °C （除非另有说明） 最小值 典型值 最大值 单位 1.223 1.245 1.273 V 48.69 49.94 51.19 mA 参考引脚 参考引脚电压 VR 参考引脚电流 IR RR = 24.9 kW 0 °C < TJ < 100 °C 电流限流/电路保护 满功率 电流限流点 (CBP = 4.7 mF) 减功率 电流限流点 (CBP = 47 mF) 最小导通时间脉冲 di/dt = 174 mA/ms LYT4x12 1.00 1.17 di/dt = 174 mA/ms LYT4x13 1.24 1.44 ILIMIT(F) di/dt = 225 mA/ms LYT4x14 1.46 1.70 TJ = 65 °C di/dt = 320 mA/ms LYT4x15 1.76 2.04 di/dt = 350 mA/ms LYT4x16 2.43 2.83 di/dt = 426 mA/ms LYT4x17 3.26 3.79 di/dt = 133 mA/ms LYT4x11 0.74 0.86 di/dt = 195 mA/ms LYT4x12 0.81 0.95 di/dt = 192 mA/ms LYT4x13 1.00 1.16 ILIMIT(R) di/dt = 240 mA/ms LYT4x14 1.19 1.38 TJ = 65 °C di/dt = 335 mA/ms LYT4x15 1.43 1.66 di/dt = 380 mA/ms LYT4x16 1.76 2.05 di/dt = 483 mA/ms LYT4x17 2.35 2.73 di/dt = 930 mA/ms LYT4x18 4.90 5.70 tLEB + tIL(D) 前沿消隐时间 tLEB 流限延迟 tIL(D) TJ = 65 °C TJ = 65 °C 见注释B TJ = 65 °C 见注释B 热关断迟滞 见注释B 阈值电压 VBP(RESET) 0 °C < TJ < 100 °C 500 150 135 142 ns 500 ns ns 150 3.30 °C °C 75 2.25 A 700 150 见注释B 热关断温度 旁路引脚通电复位 300 A 4.25 V 15 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 参数 符号 条件 源极 = 0 V；TJ = -20 °C到125 °C （除非另有说明） 最小值 典型值 最大值 单位 输出 导通电阻 关断状态漏极漏电流 击穿电压 RDS(ON) LYT4x11 TJ = 65 °C 11.5 13.2 ID = 100 mA TJ = 100 °C 13.5 15.5 LYT4x12 TJ = 65 °C 6.9 8.0 ID = 100 mA TJ = 100 °C 8.4 9.7 LYT4x13 TJ = 65 °C 5.3 6.0 ID = 150 mA TJ = 100 °C 6.3 7.3 LYT4x14 TJ = 65 °C 3.4 3.9 ID = 150 mA TJ = 100 °C 3.9 4.5 LYT4x15 TJ = 65 °C 2.5 2.9 ID = 200 mA TJ = 100 °C 3.0 3.4 LYT4x16 TJ = 65 °C 1.9 2.2 ID = 250 mA TJ = 100 °C 2.3 2.7 LYT4x17 TJ = 65 °C 1.7 2.0 ID = 350 mA TJ = 100 °C 2.0 2.4 LYT4x18 TJ = 65 °C 1.3 1.5 ID = 600 mA TJ = 100 °C 1.6 1.8 W IDSS VBP = 6.4 V VDS = 560 V TJ = 100 °C BVDSS VBP = 6.4 V TJ = 65 °C 670 V TJ < 100 °C 36 V 最低漏极供电电压 50 mA 上升时间 tR 在典型反激式转换器应用中测量 100 ns 下降时间 tF 见注释B 50 ns 注释： A. 对带有负号的技术指标，负温度系数随温度增加其数值增加，正温度系数随温度增加其数值减少。 B. 由特性保证。生产时未经测试。 16 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 Power (mW) Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 1000 100 10 1 100 200 300 400 500 300 PI-6715-072313 DRAIN Capacitance (pF) 10000 Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 200 100 0 600 0 DRAIN Pin Voltage (V) 3 Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 2 1 LYT4x28 TCASE = 25 °C LYT4x28 TCASE = 100 °C 0 0 2 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) 图 16. 漏极电流相对漏极电压的变化 1.2 PI-6909-110512 PI-6717-071012 图 15. 功率相对漏极电压的变化 DRAIN Current (Normalized to Absolute Maximum Rating) DRAIN Current (A) 4 100 200 300 400 500 600 700 DRAIN Voltage (V) 图 14. 漏极电容相对漏极引脚电压的变化 5 PI-6716-071012 典型性能特性 1 0.8 0.6 0.4 0.2 0 0 100 200 300 400 500 600 700 800 DRAIN Voltage (V) 图 17. 最大允许的漏极电流相对漏极电压的变化 17 www.powerint.com 版本D 10/13 LYT4211-4218/4311-4318 eSIP-7C (E Package) C 2 0.403 (10.24) 0.397 (10.08) A 0.264 (6.70) Ref. 0.081 (2.06) 0.077 (1.96) B Detail A 2 0.290 (7.37) Ref. 0.519 (13.18) Ref. 0.325 (8.25) 0.320 (8.13) Pin #1 I.D. 0.140 (3.56) 0.120 (3.05) 3 0.207 (5.26) 0.187 (4.75) 0.016 (0.41) Ref. 3 0.047 (1.19) 0.070 (1.78) Ref. 0.050 (1.27) 0.198 (5.04) Ref. 0.016 (0.41) 6× 0.011 (0.28) 0.020 M 0.51 M C FRONT VIEW 0.118 (3.00) SIDE VIEW 4 0.033 (0.84) 6× 0.028 (0.71) 0.010 M 0.25 M C A B 0.100 (2.54) BACK VIEW 0.100 (2.54) 10° Ref. All Around 0.021 (0.53) 0.019 (0.48) 0.050 (1.27) 0.020 (0.50) 0.060 (1.52) Ref. 0.050 (1.27) PIN 1 0.378 (9.60) Ref. 0.048 (1.22) 0.046 (1.17) 0.019 (0.48) Ref. 0.059 (1.50) 0.155 (3.93) 0.023 (0.58) END VIEW PIN 7 0.027 (0.70) 0.059 (1.50) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. DETAIL A 0.100 (2.54) 0.100 (2.54) MOUNTING HOLE PATTERN (not to scale) 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-4917-061510 18 版本D 10/13 www.powerint.com LYT4211-4218/4311-4318 eSIP-7F (L Package) C 2 0.403 (10.24) 0.397 (10.08) A 0.081 (2.06) 0.077 (1.96) 0.264 (6.70) Ref. B Detail A 2 0.325 (8.25) 0.320 (8.13) 0.290 (7.37) Ref. 3 0.016 (0.41) 6× 0.011 (0.28) 0.020 M 0.51 M C 1 7 0.084 (2.14) Pin 1 I.D. 0.070 (1.78) Ref. BOTTOM VIEW SIDE VIEW 0.019 (0.48) Ref. 0.378 (9.60) Ref. 1 3 4 0.033 (0.84) 6× 0.028 (0.71) 0.010 M 0.25 M C A B TOP VIEW Exposed pad hidden 0.060 (1.52) Ref. 7 0.089 (2.26) 0.079 (2.01) 0.100 (2.54) 0.129 (3.28) 0.122 (3.08) 7 0.173 (4.40) 0.163 (4.15) 0.047 (1.19) Ref. 0.050 (1.27) 1 0.198 (5.04) Ref. 0.490 (12.45) Ref. Exposed pad up 0.021 (0.53) 0.019 (0.48) 0.020 (0.50) 0.023 (0.58) 0.048 (1.22) 0.046 (1.17) 0.027 (0.70) END VIEW DETAIL A (Not drawn to scale) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-5204-061510 元件订购信息 • LYTSwitch-4产品系列 • 4序列号 • PFC/调光 2 PFC无调光 3 PFC调光 • 电压范围 1 低压输入 • 器件规格尺寸 • 封装信息 LYT 4 2 1 3 E E eSIP-7C L eSIP-7F 19 www.powerint.com 版本D 10/13 修订版本 A 注释 日期 初始版本。 11/12 B 修正了第13和14页最小值和典型值列的参数表值。 B 更新了第13、14和15页的参数ICH1、ICH2、ICD1、DCAR、ILIMIT(F)和ILIMIT(R) 02/13 02/20/13 C 更新了图1、3a、3b、3c、3d、8、9及13。 06/13 D 在“绝对最大额定值”部分增加了注释6。 10/13 有关最新产品信息，请访问：www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2013, Power Integrations, Inc. 全球销售支持网络 全球总部 5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: [email protected] 中国（上海） Rm 1601/1610, Tower 1, Kerry Everbright City No. 218 Tianmu Road West, Shanghai, P.R.C. 200070 Phone: +86-21-6354-6323 Fax: +86-21-6354-6325 e-mail: [email protected] 中国（深圳） 3rd Floor, Block A, Zhongtou International Business Center, No. 1061, Xiang Mei Rd, FuTian District, ShenZhen, China, 518040 Phone: +86-755-8379-3243 Fax: +86-755-8379-5828 e-mail: [email protected] 德国 Lindwurmstrasse 114 80337 Munich Germany Phone: +49-895-527-39110 Fax: +49-895-527-39200 e-mail: [email protected] 印度 #1, 14th Main Road Vasanthanagar Bangalore-560052 India Phone: +91-80-4113-8020 Fax: +91-80-4113-8023 e-mail: [email protected] 意大利 Via Milanese 20, 3rd. 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Phone: +886-2-2659-4570 Fax: +886-2-2659-4550 e-mail: [email protected] 欧洲总部 1st Floor, St. James’s House 韩国 East Street, Farnham RM 602, 6FL Surrey GU9 7TJ Korea City Air Terminal B/D, 159-6 United Kingdom Samsung-Dong, Kangnam-Gu, Phone: +44 (0) 1252-730-141 Fax: +44 (0) 1252-727-689 Seoul, 135-728, Korea e-mail: [email protected] Phone: +82-2-2016-6610 Fax: +82-2-2016-6630 e-mail: [email protected] 技术支持热线 全球 +1-408-414-9660 新加坡 51 Newton Road 技术支持传真 #19-01/05 Goldhill Plaza 全球 +1-408-414-9760 Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: [email protected] LYT4211-4218/4311-4318 ™ LYTSwitch-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications, TRIAC Dimming and Non-Dimming Options Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4211-LYT4218 LYT4311-LYT4318 85-132 VAC 85-132 VAC No Yes Output Power Table Product Minimum Output Power Maximum Output Power LYT4x11E/L LYT4x12E/L 2.5 W 2.5 W 12 W 15 W LYT4x13E/L 3.8 W 18 W LYT4x14E/L 4.5 W 22 W LYT4x15E/L 5.5 W 25 W LYT4x16E/L 6.8 W 35 W LYT4x17E/L 8.0 W 50 W LYT4x18E/L 18 W 78 W Click Here To read about LYTSwitch-4 Low-Line LYT4221-4228/4321-4328 ™ LYTSwitch-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4221-LYT4228 LYT4321-LYT4328 160-300 VAC 160-300 VAC No Yes Output Power Table Product Minimum Output Power Maximum Output Power LYT4x21E LYT4x22E 6W 6W 12 W 15 W LYT4x23E 8W 18 W LYT4x24E 9W 22 W LYT4x25E 11 W 25 W LYT4x26E 14 W 35 W LYT4x27E 19 W 50 W LYT4x28E 33 W 78 W Click Here To read about LYTSwitch-4 High-Line This page intentionally left blank LYT4211-4218/4311-4318 ™ LYTSwitch-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications, TRIAC Dimming and Non-Dimming Options Product Highlights • • • • • • • Better than ±5% CC regulation TRIAC dimmable to less than 5% output Fast start-up • <250 ms at full brightness • <1s at 10% brightness High power factor >0.9 Easily meets EN61000-3-2 • Less than 10% THD in optimized designs Up to 92% efficient 132 kHz switching frequency for small magnetics High Performance, Combined Driver, Controller, Switch The LYTSwitch-4 family enables off-line LED drivers with high power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance1. Efficiency of up to 92% is easily achieved in typical applications. Supports a Wide Selection of TRIAC Dimmers The LYTSwitch-4 family provides excellent turn-on characteristics for leading-edge and trailing-edge TRIAC dimming applications. This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current. Low Solution Cost and Long Lifetime LYTSwitch-4 ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces component count. This allows the use of low-cost single-sided printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. The 132 kHz switching frequency permits the use of small, low-cost magnetics. LED drivers using the LYTSwitch-4 family do not use primaryside aluminum electrolytic bulk capacitors. This means greatly extended driver lifetime, especially in bulb and other high temperature applications. eSIP-7C (E Package) Figure 2. eSIP-7F (L Package) AC IN V D LYTSwitch-4 CONTROL S R BP FB PI-6800-050913 Figure 1. Typical Schematic. Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4211-LYT4218 85-132 VAC No LYT4311-LYT4318 85-132 VAC Yes Output Power Table1,2 Product 6 Minimum Output Power 3 Maximum Output Power 4 LYT4x11E/L5 2.5 W 12 W LYT4x12E/L 2.5 W 15 W LYT4x13E/L 3.8 W 18 W LYT4x14E/L 4.5 W 22 W LYT4x15E/L 5.5 W 25 W LYT4x16E/L 6.8 W 35 W LYT4x17E/L 8.0 W 50 W LYT4x18E/L 18 W 78 W Table 1. Output Power Table. Notes: 1. Performance for typical design. See Application Note. 2. Continuous power in an open-frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%. 3. Minimum output power requires CBP = 47 µF. 4. Maximum output power requires CBP = 4.7 µF. 5. LYT4311 CBP = 47 µF, LYT4211 CBP = 4.7 µF. 6. Package: eSIP-7C, eSIP-7F (see Figure 2). Package Options. www.powerint.com October 2013 This Product is Covered by Patents and/or Pending Patent Applications. LYT4211-4218/4311-4318 Topology Isolation Efficiency Cost THD Output Voltage Yes No No No 88% 92% 89% 90% High Low Middle Low Best Good Best Best Any Limited Any High-Voltage Isolated Flyback Buck Tapped-Buck Buck-Boost Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design. Typical Circuit Schematic Key Features Flyback AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6800-050913 Figure 3a. Typical Isolated Flyback Schematic. Benefits • Provides isolated output • Supports widest range of output voltages • Very good THD performance Limitations • Flyback transformer • Overall efficiency reduced by parasitic capacitance and inductance in the transformer • Larger PCB area to meet isolation requirements • Requires additional components (primary clamp and bias) • Higher RMS switch and winding currents increases losses and lowers efficiency Buck AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6841-111813 Benefits • Highest efficiency • Lowest component count – small size • Simple low-cost power inductor • Low drain source voltage stress • Best EMI/lowest component count for filter Limitations • Single input line voltage range • Output voltage <0.6 × VIN(AC) × 1.41 • Output voltage for low THD designs • Non-isolated Figure 3b. Typical Buck Schematic. Tapped Buck AC IN Benefits • Ideal for low output voltage designs (<20 V) • High efficiency • Low component count • Simple low-cost tapped inductor Limitations • Designs best suited for single input line voltage • Requires additional components (primary clamp) • Non-isolated LYTSwitch-4 V D CONTROL S R BP FB PI-6842-111813 Figure 3c. Typical Tapped Buck Schematic. Buck-Boost Benefits • Ideal for non-isolated high output voltage designs • High efficiency • Low component count • Simple common low-cost power inductor can be used • Lowest THD Limitations • Maximum VOUT is limited by MOSFET breakdown voltage • Single input line voltage range • Non-isolated AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6859-111813 Figure 3d. Typical Buck-Boost Schematic. 2 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 DRAIN (D) 5.9 V REGULATOR BYPASS (BP) BYPASS CAPACITOR SELECT FAULT PRESENT AUTO-RESTART COUNTER BYPASS PIN UNDERVOLTAGE 1V VOLTAGE MONITOR (V) STOP LOGIC JITTER CLOCK OSCILLATOR LINE SENSE - LEB OCP + IV FEEDBACK (FB) VBG PFC/CC CONTROL IFB CURRENT LIMIT COMPARATOR - ILIM VSENSE MI FBOFF DCMAX IS REFERENCE BLOCK REFERENCE (R) SenseFet FBOFF DCMAX OV FEEDBACK SENSE Gate Driver Comparator + 3-VT 5.9 V 5.0 V - MI HYSTERETIC THERMAL SHUTDOWN + ILIM SOFT-START TIMER VBG 6.4 V PI-6843-071112 SOURCE (S) Figure 4. Functional Block Diagram. Pin Functional Description DRAIN (D) Pin: This pin is the power FET drain connection. It also provides internal operating current for both start-up and steady-state operation. SOURCE (S) Pin: This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins. BYPASS (BP) Pin: This is the connection point for an external bypass capacitor for the internally generated 5.9 V supply. This pin also provides output power selection through choice of the BYPASS pin capacitor value. FEEDBACK (FB) Pin: The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the output voltage. The FEEDBACK pin also includes circuitry to protect against open load and overload output conditions. REFERENCE (R) Pin: This pin is connected to an external precision resistor and is used to configure for dimming (LYT4311-4318) and non-TRIAC dimming (LYT4211-4218) modes of operation. VOLTAGE MONITOR (V) Pin: This pin interfaces with an external input line peak detector, consisting of a rectifier, filter capacitor and resistors. The applied current is used to control stop logic for overvoltage (OV), provide feed-forward to control the output current and the remote ON/OFF function. Exposed Pad (Backside) Internally Connected to SOURCE Pin E Package (eSIP-7C) (Top View) L Package (eSIP-7F) 7D 5S 4 BP 3 FB 2V 1R Exposed Pad (backside) Internally Connected to SOURCE Pin (see eSIP-7C Package Drawing) 1 3 5 R FB S 7 Lead Bend Outward 2 4 V BP D from Drawing (Refer to eSIP-7F Package Outline Drawing) PI-5432-082411 Figure 5. Pin Configuration. 3 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Functional Description A LYTSwitch-4 device monolithically combines a controller and high-voltage power FET into one package. The controller provides both high power factor and constant current output in a single-stage. The LYTSwitch-4 controller consists of an oscillator, feedback (sense and logic) circuit, 5.9 V regulator, hysteretic over-temperature protection, frequency jittering, cycle-by-cycle current limit, auto-restart, inductance correction, power factor and constant current control. FEEDBACK Pin Current Control Characteristics The figure shown below illustrates the operating boundaries of the FEEDBACK pin current. Above IFB(SKIP) switching is disabled and below IFB(AR) the device enters into auto-restart. IFB(SKIP) Skip-Cycle IFB(DCMAXR) Soft-Start The controller includes a soft-start timing feature which inhibits the auto-restart protection feature for the soft-start period (tSOFT ) to distinguish start-up into a fault (short-circuit) from a large output capacitor. At start-up the LYTSwitch-4 clamps the maximum duty cycle to reduce the output power. The total soft-start period is tSOFT. Soft-Start and CC Fold-Back Region IFB(AR) Auto-Restart DC10 DCMAX Maximum Duty Cycle PI-5433-060410 Figure 6. BYPASS Pin Capacitor Power Gain Selection LYTSwitch-4 devices have the capability to tailor the internal gain to either full or a reduced output power setting. This allows selection of a larger device to minimize dissipation for both thermal and efficiency reasons. The power gain is selected with the value of the BYPASS pin capacitor. The full power setting is selected with a 4.7 mF capacitor and the reduced power setting (for higher efficiency) is selected with a 47 mF capacitor. The BYPASS pin capacitor sets both the internal power gain as well as the over-current protection (OCP) threshold. Unlike the larger devices, the LYT4x11 power gain is not programmable. Use a 47 mF capacitor for the LYT4x11. Switching Frequency The switching frequency is 132 kHz during normal operation. To further reduce the EMI level, the switching frequency is jittered (frequency modulated) by approximately 2.6 kHz. During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming. CC Control Region IFB non-dimming or PWM dimming applications with LYT4211-4218, the external resistor should be a 24.9 kW ±1%. For phase angle AC dimming with LYT4311-4318, the external resistor should be a 49.9 kW ±1%. One percent resistors are recommended as the resistor tolerance directly affects the output tolerance. Other resistor values should not be used. FEEDBACK Pin Current Characteristic. The FEEDBACK pin current is also used to clamp the maximum duty cycle to limit the available output power for overload and open-loop conditions. This duty cycle reduction characteristic also promotes a monotonic output current start-up characteristic and helps preventing over-shoot. REFERENCE Pin The REFERENCE pin is tied to ground (SOURCE) via an external resistor. The value selected sets the internal references, determining the operating mode for dimming (LYT4311-4318) and non-dimming (LYT4211-4218) operation and the line overvoltage thresholds of the VOLTAGE MONITOR pin. For Remote ON/OFF and EcoSmart™ The VOLTAGE MONITOR pin has a 1 V threshold comparator connected at its input. This voltage threshold is used for remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE MONITOR pin tied to ground through an optocoupler phototransistor) the LYTSwitch-4 will complete its current switching cycle before the internal power FET is forced off. The remote ON/OFF feature can also be used as an eco-mode or power switch to turn off the LYTSwitch-4 and keep it in a very low power consumption state for indefinite long periods. When the LYTSwitch-4 is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft-start the next time the BYPASS pin reaches 5.9 V. In the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the BYPASS pin. This reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches. 4 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 V D CONTROL S completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (tSOFT ) the FEEDBACK pin current is above the IFB(AR) threshold to ensure successful power-supply start-up. After the soft-start time period, auto-restart is activated only when the FEEDBACK pin current falls below IFB(AR). R BP FB PI-5435-052510 Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control. 5.9 V Regulator/Shunt Voltage Clamp The internal 5.9 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.9 V by drawing a current from the voltage on the DRAIN pin whenever the power FET is off. The BYPASS pin is the internal supply voltage node. When the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows LYTSwitch-4 to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 47 or 4.7 mF is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.4 V shunt regulator clamping the BYPASS pin at 6.4 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of LYTSwitch-4 externally through a bias winding to increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for normal operation. Auto-Restart In the event of an open-loop fault (open FEEDBACK pin resistor or broken path to feedback winding), output short-circuits or an overload condition the controller enters into the auto-restart mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls below the IFB(AR) threshold after the soft-start period. To minimize the power dissipation under this fault condition the shutdown/ auto-restart circuit turns the power supply on (same as the soft-start period) and off at an auto-restart duty cycle of typically DCAR for as long as the fault condition persists. If the fault is removed during the auto-restart off-time, the power supply will remain in auto-restart until the full off-time count is Over-Current Protection The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (ILIMIT), the power FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power FET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction. Line Overvoltage Protection This device includes overvoltage detection to limit the maximum operating voltage detected through the VOLTAGE MONITOR pin. An external peak detector consisting of a diode and capacitor is required to provide input line peak voltage to the VOLTAGE MONITOR pin through a resistor. The resistor sets line overvoltage (OV) shutdown threshold which, once exceeded, forces the LYTSwitch-4 to stop switching. Once the line voltage returns to normal, the device resumes normal operation. A small amount of hysteresis is provided on the OV threshold to prevent noise-generated toggling. When the power FET is off, the rectified DC high voltage surge capability is increased to the voltage rating of the power FET (670 V), due to the absence of the reflected voltage and leakage spikes on the drain. Hysteretic Thermal Shutdown The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power FET is disabled and remains disabled until the die temperature falls by 75 °C, at which point the power FET is re-enabled. Safe Operating Area (SOA) Protection The device also features a safe operating area (SOA) protection mode which disables FET switching for 40 cycles in the event the peak switch current reaches the ILIMIT threshold and the switch on-time is less than tON(SOA). This protection mode protects the device under short-circuited LED conditions and at start-up during the soft-start period when auto-restart protection is inhibited. The SOA protection mode remains active in normal operation. 5 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Application Example 20 W TRIAC Dimmable High Power Factor LED Driver Design Example (DER-350) peak drain voltage of U1 below the 725 V rating of the internal power FET. Bridge rectifier BR1 rectifies the AC line voltage. EMI filtering is provided by L1-L3, C1, C4, R2, R24 and R25 together with the safety rated Y class capacitor (CY1) that bridges the safety isolation barrier between primary and secondary. Resistor R2, R24 and R25 act to damp any resonances formed between L1, L2, L3, C1 and the AC line impedance. A small bulk capacitor (C4) is required to provide a low impedance source for the primary switching current. The maximum value of C2 and C4 is limited in order to maintain a power factor of greater than 0.9. The circuit schematic in Figure 8 shows a TRIAC dimmable high power factor LED driver based on LYT4317E from the LYTSwitch-4 family of devices. The design is configurable for non-dimmable only applications by simple component value changes. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.7 A ideal for Lumens PAR lamp retro-fit applications. The design operates over an input voltage range of 90 VAC to 132 VAC. LYTSwitch-4 Primary To provide peak line voltage information to U1 the incoming rectified AC peak charges C6 via D2. This is then fed into the VOLTAGE MONITOR pin of U1 as a current via R10. This sensed current is also used by the device to set the line input overvoltage protection threshold. Resistor R9 provides a discharge path for C6 with a time constant much longer than that of the rectified AC to prevent generation of line frequency ripple. The key goals of this design were compatibility with standard leading edge TRIAC AC dimmers, very wide dimming range (1000:1, 550 mA:0.55 mA), high efficiency (>85%) and high power factor (>0.9). The design is fully protected from faults such as no-load (open load), overvoltage and output shortcircuit or overload conditions and over temperature. Circuit Description The LYTSwitch-4 device (U1- LYT4317E) integrates the power FET, controller and start-up functions into a single package reducing the component count versus typical implementations. Configured as part of an isolated continuous conduction mode flyback converter, U1 provides high power factor via its internal control algorithm together with the small input capacitance of the design. Continuous conduction mode operation results in reduced primary peak and RMS current. This both reduces EMI noise, allowing simpler, smaller EMI filtering components and improves efficiency. Output current regulation is maintained without the need for secondary-side sensing which eliminates current sense resistors and improves efficiency. The VOLTAGE MONITOR pin current and the FEEDBACK pin current are used internally to control the average output LED current. For TRIAC phase-dimming applications a 49.9 kW resistor (R14) is used on the REFERENCE pin and 2 MW (R10) on the VOLTAGE MONITOR pin to provide a linear relationship between input voltage and the output current and maximizing the dimming range. Diode D3, R15 and C7 clamp the drain voltage to a safe level due to the effects of leakage inductance. Diode D4 is necessary to prevent reverse current from flowing through U1 for the period of the rectified AC input voltage that the voltage across C4 falls to below the reflected output voltage (VOR). Input Stage Fuse F1 provides protection from component failures while RV1 provides a clamp during differential line surges, keeping the C13 R26 100 pF 30 Ω 200 V D9 DFLU1400-7 R24 47 kΩ 1/8 W BR1 MB6S 600 V D2 DFLU1400 R9 510 kΩ 1/8 W FL1 1 FL2 D3 US1J R2 L1 47 kΩ 1 mH 1/8 W R6 360 kΩ L3 5 mH L2 1 mH T1 RM8 LYTSwitch-4 U1 LYT4317E RV1 140 VAC L 90 - 132 VAC Q1 X0202MA2BL2 N C3 470 nF 50 V R8 100 Ω 1W D5 BAV16 R17 3 kΩ 1/10 W V CONTROL S R R18 165 kΩ 1% 1/16 W BP FB R14 49.9 kΩ 1% 1/16 W C8 47 µF 16 V Q2 MMBT3904 C14 10 nF 50 V RTN C9 56 µF 50 V C5 100 nF 50 V R19 20 kΩ 1/8 W D4 US1D C4 C6 100 nF 2.2 µF 250 V 250 V D F1 5A R20 39 Ω 1/8 W D8 BAV21 VR4 MAZS3300ML 33 V C2 100 nF 250 V R25 47 kΩ 1/8 W 11 R10 2 MΩ 1% C1 220 nF 250 V 36 V, 550 mA D6 BAV21 10 R1 510 1/2 W C11 C12 330 µF 330 µF R23 63 V 63 V 20 kΩ D7 BYW29-200 C7 2.2 nF 630 V R15 200 kΩ 12 R27 10 Ω 1/10 W C15 100 nF 50 V R22 1 kΩ 1/10 W CY1 470 pF 250 VAC PI-6875-052213 Figure 8. DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver. 6 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 Diode D6, C5, C9, R19 and R20 create the primary bias supply from an auxiliary winding on the transformer. Capacitor C8 provides local decoupling for the BYPASS pin of U1 which is the supply pin for the internal controller. During start-up C8 is charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start switching at which point the operating supply current is provided from the bias supply via R17. Capacitor C8 also selects the output power mode (47 mF for reduced power was selected to reduce dissipation in U1 and increase efficiency for this design). Feedback The bias winding voltage is proportional to the output voltage (set by the turns ratio between the bias and secondary windings). This allows the output voltage to be monitored without secondary-side feedback components. Resistor R18 converts the bias voltage into a current which is fed into the FEEDBACK pin of U1. The internal engine within U1 combines the FEEDBACK pin current, the VOLTAGE MONITOR pin current and drain current information to provide a constant output current over a 1.5:1 output voltage variation (LED string voltage variation of ±25%) at a fixed line input voltage. To limit the output voltage at no-load an output overvoltage protection circuit is set by D8, C15, R22, VR4, R27, C14 and Q2. Should the output load be disconnected then the bias voltage will increase until VR4 conducts, turning on Q2 and reducing the current into the FEEDBACK pin. When this current drops below 10 mA the part enters auto-restart and switching is disabled for 300 ms allowing time for the output and bias voltages to fall. Output Rectification The transformer secondary winding is rectified by D7 and filtered by C11 and C12. An ultrafast TO-220 diode was selected for efficiency and the combined value of C11 and C12 were selected to give peak-to-peak LED ripple current equal to 30% of the mean value. For designs where lower ripple is desirable the output capacitance value can be increased. TRIAC Phase Dimming Control Compatibility The requirement to provide output dimming with low-cost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design. Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This can cause undesirable behaviors such as limited dimming range and/or flickering as the TRIAC fires inconsistently. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off. To overcome these issues simple two circuits, the SCR active damper and R-C passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply. For non-dimming applications these components can simply be omitted. The SCR active damper consists of components R6, C3, and Q1 in conjunction with R8. This circuit limits the inrush current that flows to charge C4 when the TRIAC turns on by placing R8 in series for the first ~1 ms of the TRIAC conduction. After approximately 1 ms, Q1 turns on and bypasses R8. This keeps the power dissipation on R8 low and allows a larger value during current limiting. Resistor R6 and C3 provide the delay on Q1 turn on after the TRIAC conducts. Diode D9 blocks the charge in capacitor C4 from flowing back after the TRIAC turns on which helps in dimming compatibility especially with high power dimmers. The passive bleeder circuit is comprised of R1 and C1. This helps keep the input current above the TRIAC holding current while the input current corresponding to the effective driver resistance increases during each AC half-cycle. A small pre-load is provided by R23 which discharges residual charge in output capacitors when turned off. 7 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Modified DER-350 20 W High Power Factor LED Driver for Non-Dimmable and Enhanced Line Regulation • The circuit schematic in Figure 9 shows a high power factor LED driver based on a LYT4317 from the LYTSwitch-4 family of devices. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.55 A, ideal for high lumen PAR lamp retro-fit applications. The design operates over the low-line input voltage range of 90 VAC to 132 VAC and is non-dimming application. A non-dimming application has tighter output current variation with changes in the line voltage than a dimming application. It’s key to note that, although not specified for dimming, no circuit damage will result if the end user does operate the design with a phase controlled dimmer. Modification for Non-Dimmable Configuration The design is configurable for non-dimmable application by simply removing the component for SCR active damper (R6, R8, C3, and Q1), blocking diode D9 and R-C bleeder (R1, C1) changes and replacing the reference resistor R14 with 24.9 kW. (See Figure 9) Key Application Considerations Power Table The data sheet power table (Table 1) represents the minimum and maximum practical continuous output power based on the following conditions: • • • • Note that input line voltages above 85 VAC do not change the power delivery capability of LYTSwitch-4 devices. Device Selection Select the device size by comparing the required output power to the values in Table 1. For thermally challenging designs, e.g., incandescent lamp replacement, where either the ambient temperature local to the LYTSwitch-4 device is high and/or there is minimal space for heat sinking use the minimum output power column. This is selected by using a 47 µF BYPASS pin capacitor and results in a lower device current limit and therefore lower conduction losses. For open frame design or designs where space is available for heat sinking then refer to the maximum output power column. This is selected by using a 4.7 µF BYPASS pin capacitor for all but the LYT4x11 which has only one power setting. In all cases in order to obtain the best output current tolerance maintain the device temperature below 100 °C Maximum Input Capacitance To achieve high power factor, the capacitance used in both the EMI filter and for decoupling the rectified AC (bulk capacitor) must be limited in value. The maximum value is a function of the output power of the design and reduces as the output power reduces. For the majority of designs limit the total capacitance to less than 200 nF with a bulk capacitor value of 100 nF. Film capacitors are recommended compared to ceramic types as they minimize audible noise with operating with leading edge phase dimmers. Start with a value of 10 nF for the capacitance in the EMI filter and increase in value until there is sufficient EMI margin. Efficiency of 80% Device local ambient of 70 °C Sufficient heat sinking to keep the device temperature below 100 °C For minimum output power column • Reflected output voltage (VOR) of 120 V • FEEDBACK pin current of 135 µA • BYPASS pin capacitor value of 47 µF C13 R26 100 pF 30 Ω 200 V R24 47 kΩ 1/8 W D2 DFLU1400 R9 510 kΩ 1/8 W BR1 MB6S 600 V For maximum output power column Reflected output voltage (VOR) of 65 V • FEEDBACK pin current of 165 µA • BYPASS pin capacitor value of 4.7 µF (LYT4x11 = 4.7 µF) • FL1 1 FL2 D6 BAV21 10 D3 US1J 11 R10 2 MΩ 1% L2 1 mH L3 5 mH T1 RM8 LYTSwitch-4 U1 LYT4317E RV1 140 VAC V CONTROL S L 90 - 132 VAC N D5 BAV16 R17 3 kΩ 1/10 W R R18 165 kΩ 1% 1/16 W BP FB R14 24.9 kΩ 1% 1/16 W C8 47 µF 16 V 36 V, 550 mA Q2 MMBT3904 C14 10 nF 50 V RTN C9 56 µF 50 V C5 100 nF 50 V R19 20 kΩ 1/8 W D4 US1D C4 C6 100 nF 2.2 µF 250 V 250 V D F1 5A R20 39 Ω 1/8 W D8 BAV21 VR4 MAZS3300ML 33 V R2 L1 47 kΩ 1 mH 1/8 W R25 47 kΩ 1/8 W C2 100 nF 250 V C11 C12 330 µF 330 µF R23 63 V 63 V 20 kΩ D7 BYW29-200 C7 2.2 nF 630 V R15 200 kΩ 12 R27 10 Ω 1/10 W C15 100 nF 50 V R22 1 kΩ 1/10 W CY1 470 pF 250 VAC PI-6875a-052213 Figure 9. Modified Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver. 8 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 Primary Clamp and Output Reflected Voltage VOR A primary clamp is necessary to limit the peak drain to source voltage. A Zener clamp requires the fewest components and board space and gives the highest efficiency. RCD clamps are also acceptable however the peak drain voltage should be carefully verified during start-up and output short-circuits as the clamping voltage varies with significantly with the peak drain current. For the highest efficiency, the clamping voltage should be selected to be at least 1.5 times the output reflected voltage, VOR, as this keeps the leakage spike conduction time short. This will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the FET. An RCD (or RCDZ) clamp provides tighter clamp voltage tolerance than a Zener clamp. The RCD clamp is more cost effective than the Zener clamp but requires more careful design to ensure that the maximum drain voltage does not exceed the power FET breakdown voltage. These VOR limits are based on the BVDSS rating of the internal FET, a VOR of 60 V to 100 V is typical for most designs, giving the best PFC and regulation performance. Series Drain Diode An ultrafast or Schottky diode in series with the drain is necessary to prevent reverse current flowing through the device. The voltage rating must exceed the output reflected voltage, VOR. The current rating should exceed two times the average primary current and have a peak rating equal to the maximum drain current of the selected LYTSwitch-4 device. Line Voltage Peak Detector Circuit LYTSwitch-4 devices use the peak line voltage to regulate the power delivery to the output. A capacitor value of 1 mF to 4.7 mF is recommended to minimize line ripple and give the highest power factor (>0.9), smaller values are acceptable but result in lower PF and higher line current distortion. Leading Edge Phase Controlled Dimmers The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design. Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This causes undesirable behaviors such as limited dimming range and/or flickering. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off. To overcome these issues two circuits, the active damper and passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply so for non-dimming applications these components can simply be omitted. Figure 10a shows the line voltage and current at the input of a leading edge TRIAC dimmer with Figure 10b showing the resultant rectified bus voltage. In this example, the TRIAC conducts at 90 degrees. PI-5983-060810 350 0.35 Voltage Current 250 0.25 150 0.15 50 0.05 -50 0.5 50 100 150 200 250 300 350 400 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 Line Current (Through Dimmer) (A) VOLTAGE MONITOR Pin Resistance Network Selection For widest AC phase angle dimming range with LYT4311-4318, use a 2 MΩ (1.7 MΩ for 100 VAC (Japan)) resistor connected to the line voltage peak detector circuit. Make sure that the resistor’s voltage rating is sufficient for the peak line voltage. If necessary use multiple series connected resistors. Operation with Phase Controlled Dimmers Dimmer switches control incandescent lamp brightness by not conducting (blanking) for a portion of the AC voltage sine wave. This reduces the RMS voltage applied to the lamp thus reducing the brightness. This is called natural dimming and the LYTSwitch-4 LYT4311-4318 devices when configured for dimming utilize natural dimming by reducing the LED current as the RMS line voltage decreases. By this nature, line regulation performance is purposely decreased to increase the dimming range and more closely mimic the operation of an incandescent lamp. Using a 49.9 kW REFERENCE pin resistance selects natural dimming mode operation. Line Voltage (at Dimmer Input) (V) REFERENCE Pin Resistance Value Selection The LYTSwitch-4 family contains phase dimming devices, LYT4311-4318, and non-dimming devices, LYT4211-4218. The non-dimmable devices use a 24.9 kΩ ±1% REFERENCE pin resistor for best output current tolerance (over AC input voltage changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 kΩ ±1% to achieve the widest dimming range. Conduction Angle (°) Figure 10a.Ideal Input Voltage and Current Waveform for a Leading Edge TRIAC Dimmer at 90°. 9 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 250 0.25 200 0.2 150 0.15 100 0.1 50 0.05 0 0 0 50 100 150 200 250 300 350 400 Figure 10b.Resultant Waveforms Following Rectification of TRIAC Dimmer Output. Figure 11 shows undesired rectified bus voltage and current with the TRIAC turning off prematurely and restarting. If the TRIAC is turning off before the end of the half-cycle erratically or alternate half AC cycles have different conduction angles then flicker will be observed in the LED light due to variations in the output current. This can be solved by including a bleeder and damper circuit. Dimmers will behave differently based on manufacturer and power rating, for example a 300 W dimmer requires less dampening and requires less power loss in the bleeder than a 600 W or 1000 W dimmer due to different drive circuits and TRIAC holding current specifications. Multiple lamps in parallel driven from the same dimmer can introduce more ringing due to the increased capacitance of parallel units. Therefore, when testing dimmer operation verify on a number of models, different line voltages and with both a single driver and multiple drivers in parallel. Rectified Input Voltage (V) Voltage Current 300 0.35 0.3 250 0.25 200 0.2 150 0.15 100 0.1 50 0.05 0 0 0 50 100 150 200 250 300 350 Conduction Angle (°) 400 Rectified Input Current (A) PI-5985-060810 0.15 150 0.05 50 -50 0.25 0 50 100 150 200 250 300 350 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 Conduction Angle (°) Conduction Angle (°) 350 Voltage Current 250 0.35 Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Edge Dimmer at 90° Conduction Angle. Start by adding a bleeder circuit. Add a 0.44 µF capacitor and 510 W 1 W resistor (components in series) across the rectified bus (C1 and R1 in Figure 8). If the results in satisfactory operation reduce the capacitor value to the smallest that result in acceptable performance to reduce losses and increase efficiency. If the bleeder circuit does not maintain conduction in the TRIAC, then add an active damper as shown in Figure 12. This consists of components R6, C3, and Q1 in conjunction with R8. This circuit limits the inrush current that flows to charge C4 when the TRIAC turns on by placing R8 in series for the first 1 ms of the TRIAC conduction. After approximately 1 ms, Q1 turns on and shorts R8. This keeps the power dissipation on R8 low and allows a larger value to be used during current limiting. Increasing the delay before Q1 turns on by increasing the value of resistor R6 will improve dimmer compatibility but cause more power to be dissipated across R8. Monitor the AC line current and voltage at the input of the power supply as you make the adjustments. Increase the delay until the TRIAC operates properly but keep the delay as short as possible for efficiency. As a general rule the greater the power dissipated in the bleeder and damper circuits, the more types of dimmers will work with the driver. Trailing Edge Phase Controlled Dimmers Figure 11 shows the line voltage and current at the input of the power supply with a trailing edge dimmer. In this example, the dimmer conducts at 90 degrees. Many of these dimmers use back-to-back connected power FETs rather than a TRIAC to control the load. This eliminates the holding current issue of TRIACs and since the conduction begins at the zero crossing, high current surges and line ringing are minimized. Typically these types of dimmers do not require damping and bleeder circuits. Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing. 10 Rev. D 10/13 Dimmer Output Current (A) 0.3 PI-5986-060810 350 Dimmer Output Voltage (V) Rectified Input Voltage (V) Voltage Current 300 0.35 Rectified Input Current (A) PI-5984-060810 350 www.powerint.com LYT4211-4218/4311-4318 Audible Noise Considerations for Use with Leading Edge Dimmers Noise created when dimming is typically created by the input capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every AC half-cycle as the TRIAC fires and an inrush current flows to charge the input capacitance. Noise can be minimized by selecting film vs. ceramic capacitors, minimizing the capacitor value and selecting inductors that are physically short and wide. The transformer may also create noise which can be minimized by avoiding cores with long narrow legs (high mechanical resonant frequency). For example, RM cores produce less audible noise than EE cores for the same flux density. Reducing the core flux density will also reduce the noise. Reducing the maximum flux density (BM) to 1500 Gauss usually eliminates any audible noise but must be balanced with the increased core size needed for a given output power. Thermal and Lifetime Considerations Lighting applications present thermal challenges to the driver. In many cases the LED load dissipation determines the working ambient temperature experienced by the drive so thermal evaluation should be performed with the driver inside the final enclosure. Temperature has a direct impact on driver and LED Input EMI Filter LYT4317E Bullk Capacitor lifetime. For every 10 °C rise in temperature, component life is reduced by a factor of 2. Therefore it is important to properly heat sink and to verify the operating temperatures of all devices. Layout Considerations Primary-Side Connections Use a single point (Kelvin) connection at the negative terminal of the input filter capacitor for the SOURCE pin and bias returns. This improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. The BYPASS pin capacitor should be located as close to the BYPASS pin and connected as close to the SOURCE pin as possible. The SOURCE pin trace should not be shared with the main power FET switching currents. All FEEDBACK pin components that connect to the SOURCE pin should follow the same rules as the BYPASS pin capacitor. It is critical that the main power FET switching currents return to the bulk capacitor with the shortest path as possible. Long high current paths create excessive conducted and radiated noise. Secondary-Side Connections The output rectifier and output filter capacitor should be as close as possible. The transformer’s output return pin should have a short trace to the return side of the output filter capacitor. BYPASS Pin Capacitor Clamp Transformer Output Diode Output Capacitor REFERENCE Pin Resistor FEEDBACK Pin Resistor VOLTAGE MONITOR Pin Resistor Output Capacitors PI-6904-072313 Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer. 11 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Quick Design Checklist Maximum Drain Voltage Verify that the peak VDS does not exceed 670 V under all operating conditions including start-up and fault conditions. Maximum Drain Current Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet. Thermal Check At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4, transformer, output diodes, output capacitors and drain clamp components. 12 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 Absolute Maximum Ratings(1,4) DRAIN Pin Peak Current(5): LYT4x11..................................1.37 A LYT4x12..................................2.08 A LYT4x13..................................2.72 A LYT4x14................................. 4.08 A LYT4x15................................. 5.44 A LYT4x16................................. 6.88 A LYT4x17.................................. 7.73 A LYT4x18................................. 9.00 A DRAIN Pin Voltage ……………………….................. -0.3 to 670 V BYPASS Pin Voltage.................................................. -0.3 to 9 V BYPASS Pin Current ………………………....................... 100 mA VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6) FEEDBACK Pin Voltage ……..................................... -0.3 to 9 V REFERENCE Pin Voltage .......................................... -0.3 to 9 V Lead Temperature(3) .........................................................260 °C Storage Temperature ………………….................... -65 to 150 °C Operating Junction Temperature(2)..........................-40 to 150 °C Notes: 1. All voltages referenced to SOURCE, TA = 65 °C. 2. Normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. Absolute Maximum Ratings specified may be applied, one at a time without causing permanent damage to the product. Exposure to Absolute Maximum Ratings for extended periods of time may affect product reliability. 5. Peak DRAIN current is allowed while the DRAIN voltage is simultaneously less than 400 V. See also Figure 13. 6. During start-up (the period before the BYPASS pin begins powering the IC) the VOLTAGE MONITOR pin voltage can safely rise to 15 V without damage. Thermal Resistance Thermal Resistance: E or L Package (qJA) ....................................................105 °C/W(1) (qJC)..................................................... 2 °C/W(2) Parameter Symbol Notes: 1. Free standing with no heat sink. 2. Measured at back surface tab. Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max 124 132 140 Units Control Functions Switching Frequency Frequency Jitter Modulation Rate fOSC TJ = 65 °C Peak-Peak Jitter VBP = 0 V, TJ = 65 °C Charging Current Temperature Drift BYPASS Pin Voltage BYPASS Pin Voltage Hysteresis BYPASS Pin Shunt Voltage Soft-Start Time VBP = 5 V, TJ = 65 °C 2.6 -4.1 -3.4 -2.7 LYT4x12 -7.3 -6.1 -4.9 LYT4x13-4x17 -12 -9.5 -7.0 LYT4x18 -13.3 -10.8 -8.3 LYT4x11 -0.81 -0.62 -0.43 LYT4x12 -3.1 -2.4 -1.7 LYT4x13-4x17 -5.6 -4.35 -3.1 LYT4x18 -6.75 -5.5 -4.25 See Note A, B 0.7 VBP 0 °C < TJ < 100 °C 5.75 5.95 VBP(H) 0 °C < TJ < 100 °C VBP(SHUNT) IBP = 4 mA 0 °C < TJ < 100 °C 6.1 6.4 tSOFT TJ = 65 °C VBP = 5.9 V 55 76 kHz kHz LYT4x11 BYPASS Pin Charge Current ICH2 5.4 TJ = 65 °C See Note B fM ICH1 Average mA %/°C 6.15 0.85 V V 6.6 V ms 13 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max ICD2 0 °C < TJ < 100 °C FET Not Switching 0.5 0.8 1.2 ICD1 0 °C < TJ < 100 °C FET Switching at fOSC 1 2.5 4 115 123 131 Units Control Functions (cont.) Drain Supply Current mA VOLTAGE MONITOR Pin TJ = 65 °C RR = 24.9 kW RR = 49.9 kW Threshold Line Overvoltage Threshold IOV VOLTAGE MONITOR Pin Voltage VV 0 °C < TJ < 100 °C IV < IOV 2.75 3.0 3.25 V IV(SC) VV = 5 V TJ = 65 °C 165 185 205 mA VV(REM) TJ = 65 °C 0.5 FEEDBACK Pin Current at Onset of Maximum Duty Cycle IFB(DCMAXR) 0 °C < TJ < 100 °C FEEDBACK Pin Current Skip Cycle Threshold IFB(SKIP) 0 °C < TJ < 100 °C 210 Maximum Duty Cycle DCMAX IFB(DCMAXR) < IFB < IFB(SKIP) 0 °C < TJ < 100 °C 90 VFB IFB = 150 mA 0 °C < TJ < 100 °C 2.1 IFB(SC) VFB = 5 V TJ = 65 °C 320 DC10 IFB = IFB(AR), TJ = 65 °C, See Note B 17 DC40 IFB = 40 mA, TJ = 65 °C 34 DC60 IFB = 60 mA, TJ = 65 °C 55 tAR TJ = 65 °C VBP = 5.9 V Auto-Restart Duty Cycle DCAR TJ = 65 °C See Note B SOA Minimum Switch ON-Time tON(SOA) TJ = 65 °C See Note B IFB(AR) 0 °C < TJ < 100 °C VOLTAGE MONITOR Pin Short-Circuit Current Remote ON/OFF Threshold Hysteresis 6 mA V FEEDBACK Pin FEEDBACK Pin Voltage FEEDBACK Pin Short-Circuit Current Duty Cycle Reduction 90 mA mA 99.9 % 2.3 2.56 V 400 480 mA % Auto-Restart Auto-Restart ON-Time FEEDBACK Pin Current During Auto-Restart 55 76 ms 25 % 6.5 0.875 ms 10 mA 14 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max Units 1.223 1.245 1.273 V 48.69 49.94 51.19 mA REFERENCE Pin REFERENCE Pin Voltage VR REFERENCE Pin Current IR RR = 24.9 kW 0 °C < TJ < 100 °C Current Limit/Circuit Protection Full Power Current Limit (CBP = 4.7 mF) Reduced Power Current Limit (CBP = 47 mF) Minimum ON-Time Pulse di/dt = 174 mA/ms LYT4x12 1.00 1.17 di/dt = 174 mA/ms LYT4x13 1.24 1.44 ILIMIT(F) di/dt = 225 mA/ms LYT4x14 1.46 1.70 TJ = 65 °C di/dt = 320 mA/ms LYT4x15 1.76 2.04 di/dt = 350 mA/ms LYT4x16 2.43 2.83 di/dt = 426 mA/ms LYT4x17 3.26 3.79 di/dt = 133 mA/ms LYT4x11 0.74 0.86 di/dt = 195 mA/ms LYT4x12 0.81 0.95 di/dt = 192 mA/ms LYT4x13 1.00 1.16 ILIMIT(R) di/dt = 240 mA/ms LYT4x14 1.19 1.38 TJ = 65 °C di/dt = 335 mA/ms LYT4x15 1.43 1.66 di/dt = 380 mA/ms LYT4x16 1.76 2.05 di/dt = 483 mA/ms LYT4x17 2.35 2.73 di/dt = 930 mA/ms LYT4x18 4.90 5.70 tLEB + tIL(D) TJ = 65 °C 300 Leading Edge Blanking Time tLEB TJ = 65 °C See Note B 150 Current Limit Delay tIL(D) TJ = 65 °C See Note B Thermal Shutdown Temperature See Note B Thermal Shutdown Hysteresis See Note B BYPASS Pin Power-Up Reset Threshold Voltage VBP(RESET) 0 °C < TJ < 100 °C 500 142 ns 500 ns ns 150 3.30 °C °C 75 2.25 A 700 150 135 A 4.25 V 15 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max TJ = 65 °C 11.5 13.2 TJ = 100 °C 13.5 15.5 TJ = 65 °C 6.9 8.0 TJ = 100 °C 8.4 9.7 TJ = 65 °C 5.3 6.0 TJ = 100 °C 6.3 7.3 TJ = 65 °C 3.4 3.9 TJ = 100 °C 3.9 4.5 TJ = 65 °C 2.5 2.9 TJ = 100 °C 3.0 3.4 TJ = 65 °C 1.9 2.2 TJ = 100 °C 2.3 2.7 TJ = 65 °C 1.7 2.0 TJ = 100 °C 2.0 2.4 TJ = 65 °C 1.3 1.5 TJ = 100 °C 1.6 1.8 Units Output LYT4x11 ID = 100 mA LYT4x12 ID = 100 mA LYT4x13 ID = 150 mA ON-State Resistance RDS(ON) LYT4x14 ID = 150 mA LYT4x15 ID = 200 mA LYT4x16 ID = 250 mA LYT4x17 ID = 350 mA LYT4x18 ID = 600 mA OFF-State Drain Leakage Current Breakdown Voltage W IDSS VBP = 6.4 V VDS = 560 V TJ = 100 °C BVDSS VBP = 6.4 V TJ = 65 °C 670 V TJ < 100 °C 36 V Minimum Drain Supply Voltage Rise Time tR Fall Time tF Measured in a Typical Flyback See Note B 50 mA 100 ns 50 ns NOTES: A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. B. Guaranteed by characterization. Not tested in production. 16 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 Power (mW) Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 1000 100 10 1 100 200 300 400 500 300 PI-6715-072313 DRAIN Capacitance (pF) 10000 Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 200 100 0 600 0 DRAIN Pin Voltage (V) 3 Scaling Factors: LYT4x11 0.18 LYT4x12 0.28 LYT4x13 0.38 LYT4x14 0.56 LYT4x15 0.75 LYT4x16 1.00 LYT4x17 1.16 LYT4x18 1.55 2 1 LYT4x28 TCASE = 25 °C LYT4x28 TCASE = 100 °C 0 0 2 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) Figure 16. Drain Current vs. Drain Voltage. 1.2 PI-6909-110512 PI-6717-071012 Figure 15. Power vs. Drain Voltage. DRAIN Current (Normalized to Absolute Maximum Rating) DRAIN Current (A) 4 100 200 300 400 500 600 700 DRAIN Voltage (V) Figure 14. Drain Capacitance vs. Drain Pin Voltage. 5 PI-6716-071012 Typical Performance Characteristics 1 0.8 0.6 0.4 0.2 0 0 100 200 300 400 500 600 700 800 DRAIN Voltage (V) Figure 17. Maximum Allowable Drain Current vs. Drain Voltage. 17 www.powerint.com Rev. D 10/13 LYT4211-4218/4311-4318 eSIP-7C (E Package) C 2 0.403 (10.24) 0.397 (10.08) A 0.264 (6.70) Ref. 0.081 (2.06) 0.077 (1.96) B Detail A 2 0.290 (7.37) Ref. 0.519 (13.18) Ref. 0.325 (8.25) 0.320 (8.13) Pin #1 I.D. 0.140 (3.56) 0.120 (3.05) 3 0.207 (5.26) 0.187 (4.75) 0.016 (0.41) Ref. 3 0.047 (1.19) 0.070 (1.78) Ref. 0.050 (1.27) 0.198 (5.04) Ref. 0.016 (0.41) 6× 0.011 (0.28) 0.020 M 0.51 M C FRONT VIEW 0.118 (3.00) SIDE VIEW 4 0.033 (0.84) 6× 0.028 (0.71) 0.010 M 0.25 M C A B 0.100 (2.54) BACK VIEW 0.100 (2.54) 10° Ref. All Around 0.021 (0.53) 0.019 (0.48) 0.050 (1.27) 0.020 (0.50) 0.060 (1.52) Ref. 0.050 (1.27) PIN 1 0.378 (9.60) Ref. 0.048 (1.22) 0.046 (1.17) 0.019 (0.48) Ref. 0.059 (1.50) 0.155 (3.93) 0.023 (0.58) END VIEW PIN 7 0.027 (0.70) 0.059 (1.50) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. DETAIL A 0.100 (2.54) 0.100 (2.54) MOUNTING HOLE PATTERN (not to scale) 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-4917-061510 18 Rev. D 10/13 www.powerint.com LYT4211-4218/4311-4318 eSIP-7F (L Package) C 2 0.403 (10.24) 0.397 (10.08) A 0.081 (2.06) 0.077 (1.96) 0.264 (6.70) Ref. B Detail A 2 0.325 (8.25) 0.320 (8.13) 0.290 (7.37) Ref. 3 0.016 (0.41) 6× 0.011 (0.28) 0.020 M 0.51 M C 1 7 0.084 (2.14) Pin 1 I.D. 0.070 (1.78) Ref. BOTTOM VIEW SIDE VIEW 0.019 (0.48) Ref. 0.378 (9.60) Ref. 1 3 4 0.033 (0.84) 6× 0.028 (0.71) 0.010 M 0.25 M C A B TOP VIEW Exposed pad hidden 0.060 (1.52) Ref. 7 0.089 (2.26) 0.079 (2.01) 0.100 (2.54) 0.129 (3.28) 0.122 (3.08) 7 0.173 (4.40) 0.163 (4.15) 0.047 (1.19) Ref. 0.050 (1.27) 1 0.198 (5.04) Ref. 0.490 (12.45) Ref. Exposed pad up 0.021 (0.53) 0.019 (0.48) 0.020 (0.50) 0.023 (0.58) 0.048 (1.22) 0.046 (1.17) 0.027 (0.70) END VIEW DETAIL A (Not drawn to scale) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-5204-061510 Part Ordering Information • LYTSwitch-4 Product Family • 4 Series Number • PFC/Dimming 2 PFC No Dimming 3 PFC Dimming • Voltage Range 1 Low-Line • Device Size • Package Identifier LYT 4 2 1 3 E E eSIP-7C L eSIP-7F 19 www.powerint.com Rev. D 10/13 Revision Notes Date A Initial Release. 11/12 B Corrected Min and Typ parameter table values on pages 13 and 14. B Updated parameters ICH1, ICH2, ICD1, DCAR, ILIMIT(F), ILIMIT(R), on pages 13, 14 and 15. C Updated figures 1, 3a, 3b, 3c, 3d, 8, 9 and 13. 06/13 D Added Note 6 to Absolute Maximum Ratings section. 10/13 02/13 02/20/13 For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters 5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: [email protected] China (Shanghai) Rm 2410, Charity Plaza, No. 88 North Caoxi Road Shanghai, PRC 200030 Phone: +86-21-6354-6323 Fax: +86-21-6354-6325 e-mail: [email protected] China (ShenZhen) 3rd Floor, Block A, Zhongtou International Business Center, No. 1061, Xiang Mei Rd, FuTian District, ShenZhen, China, 518040 Phone: +86-755-8379-3243 Fax: +86-755-8379-5828 e-mail: [email protected] Germany Lindwurmstrasse 114 80337 Munich Germany Phone: +49-895-527-39110 Fax: +49-895-527-39200 e-mail: [email protected] India #1, 14th Main Road Vasanthanagar Bangalore-560052 India Phone: +91-80-4113-8020 Fax: +91-80-4113-8023 e-mail: [email protected] Italy Via Milanese 20, 3rd. Fl. 20099 Sesto San Giovanni (MI) Italy Phone: +39-024-550-8701 Fax: +39-028-928-6009 e-mail: [email protected] Japan Kosei Dai-3 Bldg. 2-12-11, Shin-Yokohama, Kohoku-ku Yokohama-shi Kanagwan 222-0033 Japan Phone: +81-45-471-1021 Fax: +81-45-471-3717 e-mail: [email protected] Korea RM 602, 6FL Korea City Air Terminal B/D, 159-6 Samsung-Dong, Kangnam-Gu, Seoul, 135-728, Korea Phone: +82-2-2016-6610 Fax: +82-2-2016-6630 e-mail: [email protected] Taiwan 5F, No. 318, Nei Hu Rd., Sec. 1 Nei Hu Dist. Taipei 11493, Taiwan R.O.C. Phone: +886-2-2659-4570 Fax: +886-2-2659-4550 e-mail: [email protected] Europe HQ First Floor, Unit 15, Meadway Court, Rutherford Close, Stevenage, Herts. SG1 2EF United Kingdom Phone: +44 (0) 1252-730-141 Fax: +44 (0) 1252-727-689 e-mail: [email protected] Applications Hotline World Wide +1-408-414-9660 Singapore 51 Newton Road Applications Fax #19-01/05 Goldhill Plaza World Wide +1-408-414-9760 Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: [email protected] LYT4221-4228/4321-4328 ™ LYTSwitch-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options Product Highlights • • • • • • • Better than ±5% CC regulation TRIAC dimmable to less than 5% output Fast start-up • <250 ms at full brightness • <1s at 10% brightness High power factor >0.9 Easily meets EN61000-3-2 • Less than 10% THD in optimized designs Up to 92% efficient 132 kHz switching frequency for small magnetics High Performance, Combined Driver, Controller, Switch The LYTSwitch family enables off-line LED drivers with high power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance1. Efficiency of up to 92% is easily achieved in typical applications. Supports a Wide Selection of TRIAC Dimmers The LYTSwitch family provides excellent turn-on characteristics for leading-edge and trailing-edge TRIAC dimming applications. This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current. Low Solution Cost and Long Lifetime LYTSwitch ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces component count. This allows the use of low-cost single-sided printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. The 132 kHz switching frequency permits the use of small, low-cost magnetics. LED drivers using the LYTSwitch family do not use primary-side aluminum electrolytic bulk capacitors. This means greatly extended driver lifetime, especially in bulb and other high temperature applications. eSIP-7C (E Package) Figure 2. AC IN V D LYTSwitch-4 CONTROL S R BP FB PI-6800-050913 Figure 1. Typical Schematic. Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4221-LYT4228 160-300 VAC No LYT4321-LYT4328 160-300 VAC Yes Output Power Table1,2 Product 6 Minimum Output Power 3 Maximum Output Power 4 LYT4x21E5 6W 12 W LYT4x22E 6W 15 W LYT4x23E 8W 18 W LYT4x24E 9W 22 W LYT4x25E 11 W 25 W LYT4x26E 14 W 35 W LYT4x27E 19 W 50 W LYT4x28E 33 W 78 W Table 1. Output Power Table. Notes: 1. Performance for typical design. See Application Note. 2. Continuous power in an open frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%. 3. Minimum output power requires CBP = 47 µF. 4. Maximum output power requires CBP = 4.7 µF. 5. LYT4321 CBP = 47 µF, LYT4221 CBP = 4.7 µF. 6. Package: eSIP-7C (see Figure 2). Package Options. www.powerint.com March 2014 This Product is Covered by Patents and/or Pending Patent Applications. LYT4221-4228/4321-4328 Topology Isolation Efficiency Cost THD Output Voltage Yes No No No 88% 92% 89% 90% High Low Middle Low Best Good Best Best Any Limited Any High-Voltage Isolated Flyback Buck Tapped Buck Buck-Boost Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design. Typical Circuit Schematic Key Features Flyback AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6800-050913 Figure 3a. Typical Isolated Flyback Schematic. Benefits • Provides isolated output • Supports widest range of output voltages • Very good THD performance Limitations • Flyback transformer • Overall efficiency reduced by parasitic capacitance and inductance in the transformer • Larger PCB area to meet isolation requirements • Requires additional components (primary clamp and bias) • Higher RMS switch and winding currents increases losses and lowers efficiency Buck AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6841-111813 Benefits • Highest efficiency • Lowest component count – small size • Simple low-cost power inductor • Low drain source voltage stress • Best EMI/lowest component count for filter Limitations • Single input line voltage range • Output voltage <0.6 × VIN(AC) × 1.41 • Output voltage for low THD designs • Non-isolated Figure 3b. Typical Buck Schematic. Tapped Buck AC IN Benefits • Ideal for low output voltage designs (<20 V) • High efficiency • Low component count • Simple low-cost tapped inductor Limitations • Designs best suited for single input line voltage • Requires additional components (primary clamp) • Non-isolated LYTSwitch-4 V D CONTROL S R BP FB PI-6842-111813 Figure 3c. Typical Tapped Buck Schematic. Buck-Boost Benefits • Ideal for non-isolated high output voltage designs • High efficiency • Low component count • Simple common low-cost power inductor can be used • Lowest THD Limitations • Maximum VOUT is limited by MOSFET breakdown voltage • Single input line voltage range • Non-isolated AC IN LYTSwitch-4 V D CONTROL S R BP FB PI-6859-111813 Figure 3d. Typical Buck-Boost Schematic. 2 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 DRAIN (D) 5.9 V REGULATOR BYPASS (BP) BYPASS CAPACITOR SELECT FAULT PRESENT AUTO-RESTART COUNTER BYPASS PIN UNDERVOLTAGE 1V VOLTAGE MONITOR (V) STOP LOGIC JITTER CLOCK OSCILLATOR LINE SENSE - LEB OCP + IV FEEDBACK (FB) VBG PFC/CC CONTROL IFB CURRENT LIMIT COMPARATOR - ILIM VSENSE MI FBOFF DCMAX IS REFERENCE BLOCK REFERENCE (R) SenseFet FBOFF DCMAX OV FEEDBACK SENSE Gate Driver Comparator + 3-VT 5.9 V 5.0 V - MI HYSTERETIC THERMAL SHUTDOWN + ILIM SOFT-START TIMER VBG 6.4 V PI-6843-071112 SOURCE (S) Figure 4. Functional Block Diagram. Pin Functional Description DRAIN (D) Pin: This pin is the power FET drain connection. It also provides internal operating current for both start-up and steady-state operation. SOURCE (S) Pin: This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins. BYPASS (BP) Pin: This is the connection point for an external bypass capacitor for the internally generated 5.9 V supply. This pin also provides output power selection through choice of the BYPASS pin capacitor value. Exposed Pad (Backside) Internally Connected to SOURCE Pin (see eSIP-7C Package Drawing) 7D REFERENCE (R) Pin: This pin is connected to an external precision resistor and is configured to use only 24.9 kW for non-dimming and dimming. E Package (eSIP-7C) (Top View) 5S 4 BP 3 FB 2V 1R FEEDBACK (FB) Pin: The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the output voltage. The FEEDBACK pin also includes circuitry to protect against open load and overload output conditions. VOLTAGE MONITOR (V) Pin: This pin interfaces with an external input line peak detector, consisting of a rectifier, filter capacitor and resistors. The applied current is used to control stop logic for overvoltage (OV), provide feed-forward to control the output current and the remote ON/OFF function. PI-7076-062513 Figure 5. Pin Configuration. 3 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Functional Description A LYTSwitch device monolithically combines a controller and high-voltage power FET into one package. The controller provides both high power factor and constant current output in a single-stage. The LYTSwitch controller consists of an oscillator, feedback (sense and logic) circuit, 5.9 V regulator, hysteretic over-temperature protection, frequency jittering, cycle-by-cycle current limit, auto-restart, inductance correction, power factor and constant current control. FEEDBACK Pin Current Control Characteristics The figure shown below illustrates the operating boundaries of the FEEDBACK pin current. Above IFB(SKIP) switching is disabled and below IFB(AR) the device enters into auto-restart. IFB(SKIP) Skip-Cycle CC Control Region IFB Remote ON/OFF and EcoSmart™ The VOLTAGE MONITOR pin has a 1 V threshold comparator connected at its input. This voltage threshold is used for remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE MONITOR pin tied to ground through an optocoupler phototransistor) the LYTSwitch will complete its current switching cycle before the internal power FET is forced off. Soft-Start Region Auto-Restart DC10 DCMAX Maximum Duty Cycle PI-6978-040213 Figure 6. Switching Frequency The switching frequency is 132 kHz during normal operation. To further reduce the EMI level, the switching frequency is jittered (frequency modulated) by approximately 5.4 kHz. During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming. Soft-Start The controller includes a soft-start timing feature which inhibits the auto-restart protection feature for the soft-start period (tSOFT ) to distinguish start-up into a fault (short-circuit) from a large output capacitor. At start-up the LYTSwitch clamps the maximum duty cycle to reduce the output power. The total soft-start period is tSOFT. IFB(DCMAXR) IFB(AR) BYPASS Pin Capacitor Power Gain Selection LYTSwitch devices have the capability to tailor the internal gain to either full or a reduced output power setting. This allows selection of a larger device to minimize dissipation for both thermal and efficiency reasons. The power gain is selected with the value of the BYPASS pin capacitor. The full power setting is selected with a 4.7 mF capacitor and the reduced power setting (for higher efficiency) is selected with a 47 mF capacitor. The BYPASS pin capacitor sets both the internal power gain as well as the over-current protection (OCP) threshold. Unlike the larger devices, the LYT4x21 power gain is not programmable. Use a 47 mF capacitor for the LYT4x21. FEEDBACK Pin Current Characteristic. The FEEDBACK pin current is also used to clamp the maximum duty cycle to limit the available output power for overload and open-loop conditions. This duty cycle reduction characteristic also promotes a monotonic output current start-up characteristic and helps preventing over-shoot. The remote ON/OFF feature can also be used as an eco-mode or power switch to turn off the LYTSwitch and keep it in a very low power consumption state for indefinite long periods. When the LYTSwitch is remotely turned on after entering this mode, it will initiate a normal start-up sequence with soft-start the next time the BYPASS pin reaches 5.9 V. In the worst case, the delay from remote on to start-up can be equal to the full discharge/charge cycle time of the BYPASS pin. This reduced consumption remote off mode can eliminate expensive and unreliable in-line mechanical switches. REFERENCE Pin The REFERENCE pin is tied to ground (SOURCE) via an external resistor. The value selected sets the internal references and it should be 24.9 kΩ ±1%. One percent resistors are recommended as the resistor tolerance directly affects the output tolerance. Other resistor values should not be used. 4 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 V D CONTROL S completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (tSOFT ) the FEEDBACK pin current is above the IFB(AR) threshold to ensure successful power-supply start-up. After the soft-start time period, auto-restart is activated only when the FEEDBACK pin current falls below IFB(AR). R BP FB PI-5435-052510 Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control. 5.9 V Regulator/Shunt Voltage Clamp The internal 5.9 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.9 V by drawing a current from the voltage on the DRAIN pin whenever the power FET is off. The BYPASS pin is the internal supply voltage node. When the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows LYTSwitch to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 47 or 4.7 mF is sufficient for both high frequency decoupling and energy storage. In addition, there is a 6.4 V shunt regulator clamping the BYPASS pin at 6.4 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of LYTSwitch externally through a bias winding to increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for normal operation. Auto-Restart In the event of an open-loop fault (open FEEDBACK pin resistor or broken path to feedback winding), output short-circuits or an overload condition the controller enters into the auto-restart mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls below the IFB(AR) threshold after the soft-start period. To minimize the power dissipation under this fault condition the shutdown/ auto-restart circuit turns the power supply on (same as the soft-start period) and off at an auto-restart duty cycle of typically DCAR for as long as the fault condition persists. If the fault is removed during the auto-restart off-time, the power supply will remain in auto-restart until the full off-time count is Over-Current Protection The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (ILIMIT), the power FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power FET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction. Line Overvoltage Protection This device includes overvoltage detection to limit the maximum operating voltage detected through the VOLTAGE MONITOR pin. An external peak detector consisting of a diode and capacitor is required to provide input line peak voltage to the VOLTAGE MONITOR pin through a resistor. The resistor sets line overvoltage (OV) shutdown threshold which, once exceeded, forces the LYTSwitch to stop switching. Once the line voltage returns to normal, the device resumes normal operation. A small amount of hysteresis is provided on the OV threshold to prevent noise-generated toggling. When the power FET is off, the rectified DC high voltage surge capability is increased to the voltage rating of the power FET (725 V), due to the absence of the reflected voltage and leakage spikes on the drain. Hysteretic Thermal Shutdown The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power FET is disabled and remains disabled until the die temperature falls by 75 °C, at which point the power FET is re-enabled. Safe Operating Area (SOA) Protection The device also features a safe operating area (SOA) protection mode which disables FET switching for 40 cycles in the event the peak switch current reaches the ILIMIT threshold and the switch on-time is less than tON(SOA). This protection mode protects the device under short-circuited LED conditions and at start-up during the soft-start period when auto-restart protection is inhibited. The SOA protection mode remains active in normal operation. 5 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Application Example The circuit schematic in Figure 8 shows a TRIAC dimmable high power factor LED driver based on LYT4324E from the LYTSwitch-4 high-line family of devices. The design is configurable for nondimmable only applications by simply changing the device to a non-dimmable LYTSwitch-4 and removing the damper and bleeder circuit. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.550 A ideal for high Lumens PAR lamp retro-fit applications. The design operates over an input voltage range of 185 VAC to 265 VAC. The key goals of this design were compatibility with standard leading edge TRIAC AC dimmers, very wide dimming range, high efficiency (>85%) and high power factor (>0.9). The design is fully protected from faults such as no-load (open-load), overvoltage and output short-circuit or overload conditions and over-temperature. Circuit Description The LYTSwitch-4 high-line device (U1-LYT4324E) integrates the power FET, controller and start-up functions into a single package reducing the component count versus typical implementations. Configured as part of an isolated continuous conduction mode flyback converter, U1 provides high power factor via its internal control algorithm together with the small input capacitance of the design. Continuous conduction mode operation results in reduced primary peak and RMS current. This both reduces EMI noise, allowing simpler, smaller EMI filtering components and improves efficiency. Output current regulation is maintained without the need for secondary-side sensing which eliminates current sense resistors and improves efficiency. Input Stage Fuse F1 provides protection from component failures while RV1 provides a clamp during differential line surges, keeping the peak drain voltage of U1 below the device absolute maximum rating of the internal power FET. Bridge rectifier BR1 rectifies the AC line voltage. EMI filtering is provided by L1, L2, C4, C5, R3 and R12 together with the safety rated Y class capacitor (CY1) that bridges the safety isolation barrier between primary and secondary. Resistor R3 and R12 damp any resonances formed between L1, L2, C4 and the AC line impedance. A small bulk capacitor (C5) is required to provide a low impedance path for the primary switching current. The maximum value of C4 and C5 is limited in order to maintain a power factor of greater than 0.9. LYTSwitch-4 High-Line Primary To provide peak line voltage information to U1 the incoming rectified AC peak charges C6 via D2. This is then fed into the VOLTAGE MONITOR pin of U1 as a current via R14 and R15. This sensed current is also used by the device to set the line input overvoltage protection threshold. Resistor R13 provides a discharge path for C6 with a time constant much longer than that of the rectified AC to minimize generation of line frequency ripple. The VOLTAGE MONITOR pin current and the FEEDBACK pin current are used internally to control the average output LED current. For TRIAC phase-dimming or non-dimming applications the same value of resistance 24.9 kW is used on the REFERENCE pin resistor (R18) and 4 MW (R14 + R15) on the VOLTAGE MONITOR pin to provide a linear relationship between input voltage and the output current and maximizing the dimming range. C13 R25 100 pF 30 Ω 200 V R13 510 kΩ 1/8 W R7 162 kΩ 1% R4 1 MΩ 1 4 R3 12 kΩ 1/8 W L1 RM5 D1 BAV21 C1 220 nF 400 V R2 R1 510 Ω 510 Ω 1% 1% L TP1 190 - 265 VAC R6 2.4 MΩ N TP2 Q2 MMBT3906 Q1 MMBT3906 R27 R28 510 Ω 510 Ω 1% 1% F1 5A C2 47 pF 1 kV C4 120 nF 400 V 4 1 L2 2 5 mH VR1 1N5245B-T 15 V R10 15 Ω R9 30.1 kΩ 1% 3 C3 22 nF 50 V C5 220 nF 400 V TP3 RTN R22 39 Ω 1/8 W C11 D6 BAV21 100 nF 50 V R21 20 kΩ 1/8 W TP4 C9 56 µF 50 V T1 RM7/1 R19 6.2 kΩ V CONTROL S R12 47 kΩ C15 C14 36 V, 330 µF 330 µF R26 63 V 7.5 kΩ 550 mA 63 V D4 US1D C6 2.2 µF 400 V D R11 240 Ω 2W FL2 8 LYTSwitch-4 U1 LYT4324E Q3 IRFU320PBF 3 7 D3 US1J R15 2 MΩ 1% R5 1 MΩ 2 FL1 6 R14 2 MΩ 1% R8 162 kΩ 1% RV1 250 VAC 1 D8 BYW29-200 C7 2.2 nF 630 V R BP D5 BAV16WS-7-F BR1 B10S-G 1000 V D2 DFLU1400-7 VR4 SMAJ200A-13-F 200 V FB R18 24.9 kΩ 1% 1/16 W C8 100 µF 10 V D7 BAV21WS-7-F R20 133 kΩ 1% 1/8 W VR2 MMSZ5256BS-7-F 33 V 20 W TRIAC Dimmable High Power Factor LED Driver Design Example (DER-396) Q4 MMBT3904LT1G C10 10 nF 50 V R23 10 Ω 1/10 W C12 100 nF 50 V R24 1 kΩ 1/10 W CY1 470 pF 250 VAC PI-7088-072913 Figure 8. DER-396 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 185 – 265 VAC, 20 W / 36 V LED Driver. 6 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Diode D3, VR4 and C7 clamp the drain voltage to a safe level due to the effects of leakage inductance. Diode D4 is necessary to prevent reverse current from flowing through U1 for the period of the rectified AC input voltage that the voltage across C5 falls to below the reflected output voltage (VOR). Diode D6, C9, C11, R21 and R22 create the primary bias supply from an auxiliary winding on the transformer. Capacitor C8 provides local decoupling for the BYPASS pin of U1 which is the supply pin for the internal controller. During start-up C8 is charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start switching at which point the operating supply current is provided from the bias supply via R19 and D5. Capacitor C8 also selects the output power mode (47 mF for reduced power was selected to reduce dissipation in U1 and increase efficiency). Feedback The bias winding voltage is proportional to the output voltage (set by the turn ratio between the bias and secondary windings). This allows the output voltage to be monitored without secondaryside feedback components. Resistor R20 converts the bias voltage into a current which is fed into the FEEDBACK pin of U1. The internal engine within LYTSwitch-4 (U1) combines the FEEDBACK pin current, the VOLTAGE MONITOR pin current and drain current information to provide a constant output current over up to 1.5 : 1 output voltage variation (LED string voltage variation of ±25%) at a fixed line input voltage. To limit the output voltage at no-load an output overvoltage protection circuit is set by D7, C12, R24, VR2, R23, C10 and Q4. Should the output load be disconnected the bias voltage will increase until VR2 conducts, biasing Q4 to turn on via R23 and pulling down current going into the FEEDBACK pin. When the feedback current drops below 10 mA the part enters autorestart and the switching of the MOSFET is disabled for 600 ms, allowing time for the output and bias voltages to fall. Output Rectification The transformer secondary winding is rectified by D8 and filtered by C14 and C15. An ultrafast TO-220 diode was selected for efficiency and the combined value of C11 and C12 were selected to give peak-to-peak LED ripple current equal to 30% of the mean value. For designs where lower ripple is desirable the output capacitance value can be increased. A small pre-load is provided by R26 which discharges residual charge in output capacitors when turned off. TRIAC Phase Dimming Control Compatibility The requirement to provide output dimming with low cost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design. Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current and/or latching of the TRIAC within the dimmer. This can cause undesirable behaviors such as limited dimming range and/or flickering as the TRIAC fires inconsistently. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off. To overcome these issues two simple circuits, the MOSFET active damper and RC passive bleeder were employed. Employing these circuits however comes without penalty, since their purpose is to satisfy the holding and latching current of a TRIAC by providing some low impedance path for the TRIAC current to flow continuously during the turn-on phase will introduce additional dissipation and therefore reduced system efficiency of the supply. For non-dimming applications these circuits can simply be omitted (see Figure 9). Power Integrations proprietary active damper circuit is used in this design for achieving high efficiency, good dimmer compatibility and line surge protection. MOSFET Q3 is always on during non-dimming (no TRIAC connected) operation. It bypasses the loss across the damper resistor (R11) via the low RDS(ON) of the MOSFET Q3 thereby maintaining high system efficiency. The gate of Q3 is biased through the divider of R4, R5, and R6 and filtered by C13. While Q3 is always on during non-dimming operation, MOSFET Q3 operates differently during dimming. When the TRIAC turns on at the beginning of every AC half-line cycle MOSFET Q3 is off initially allowing the resistor (R11) to damp the current ringing due to inrush of current induced by the input bulk capacitance and EMI filter impedance. After approximately 1 ms Q3 turns on and bypasses R11. The effect is increased compatibility with different types of dimmers. During differential line surge occurrence where a high dv/dt is detected through the RC high-pass filter R7, R8 and C2. Transistor Q2 will turn off Q3 and a voltage proportional to the input current that will develop across the damper resistor will be subtracted from the input thus limiting the voltage stress on the DRAIN pin of U1. Resistor R9 bleeds the charge from C2 and ensures Q2 is off during normal operation. The passive bleeder circuit is comprised of R1, R2, R27, R28 and C1. This network helps keep the input current above the TRIAC holding current while the input current corresponding to the effective driver resistance increases during each AC half-cycle. 7 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Modified DER-396 20 W High Power Factor LED Driver for Non-Dimmable and Enhanced Line Regulation • • • The circuit schematic in Figure 9 shows a high power factor LED driver based on a LYT4224E from the LYTSwitch-4 nondimming high-line family of devices. It was optimized to drive an LED string at a voltage of 36 V with a constant current of 0.55 A, ideal for high lumens PAR lamp retro-fit applications. The design operates over the high-line input voltage range of 185 VAC to 265 VAC and is non-dimming application. A nondimming application has tighter output current variation with changes in the line voltage than a dimming application. It’s key to note that, although not specified for dimming, no circuit damage will result if the end user does operate the design with a phase controlled dimmer. • • Efficiency of 85% Device local ambient of 70 °C Sufficient heat sinking to keep the device temperature below 100 °C For minimum output power column • Reflected output voltage (VOR) of 135 V • FEEDBACK pin current of 135 mA • BYPASS pin capacitor value of 47 mF For maximum output power column • Reflected output voltage (VOR) of 90 V • FEEDBACK pin current of 165 mA • BYPASS pin capacitor value of 4.7 mF • (LYT4x21 = 4.7 mF) Note that input line voltages above 185 VAC do not change the power delivery capability of LYTSwitch-4 high-line devices. Modification for Non-Dimmable Configuration The DER-396 is configurable for non-dimmable application by simply removing the components of the MOSFET active damper (R4, R5, R6, R7, R8, R9, R10, R11, D1, Q1, Q2, C3, and VR1) and passive R-C bleeder (R1, R2, R27, R28 and C1) and replacing the IC U1 to LYT4224E, non-dimmable device LYTSwitch-4 nondimming high-line family. For non-dimmable application audible noise is not critical so L1 and L2 can be replaced with a regular off-the-shelf dog bone inductor for cost reduction (See Figure 9). Device Selection Select the device size by comparing the required output power to the values in Table 1. For thermally challenging designs, e.g., incandescent lamp replacement, where either the ambient temperature local to the LYTSwitch-4 high-line device is high and/or there is minimal space for heat sinking use the minimum output power column. This is selected by using a 47 mF BYPASS pin capacitor and results in a lower device current limit and therefore lower conduction losses. For open frame design or designs where space is available for heat sinking then refer to the maximum output power column. This is selected by using a 4.7 mF BYPASS pin capacitor for all but the LYT4x21 which has only one power setting. In all cases in order to obtain the best output current tolerance maintain the device temperature below 100 °C. Key Application Considerations Power Table The data sheet power table (Table 1) represents the minimum and maximum practical continuous output power based on the following assumed conditions: C13 R25 100 pF 30 Ω 200 V VR4 SMAJ200A-13-F 200 V D3 US1J 8 R19 6.2 kΩ L TP1 190 - 265 VAC V CONTROL S R12 47 kΩ 1/8 W N TP2 TP4 C9 56 µF 50 V D4 US1D C6 2.2 µF 400 V D F1 5A C11 D6 BAV21 100 nF 50 V R21 20 kΩ 1/8 W T1 RM7/1 LYTSwitch-4 U1 LYT4224E L3 1.5 mH TP3 RTN R22 39 Ω 1/8 W R BP FB R18 24.9 kΩ 1% 1/16 W C8 47 µF 16 V R20 133 kΩ 1% 1/8 W D7 BAV21WS-7-F VR2 MMSZ5256BS-7-F 33 V L1 1.5 mH C5 220 nF 400 V C15 C14 36 V, 330 µF 330 µF R26 63 V 7.5 kΩ 550 mA 63 V FL2 6 D5 BAV16WS-7-F R3 12 kΩ 1/8 W R29 12 kΩ 1/8 W 7 R15 2 MΩ 1% C4 120 nF 400 V FL1 D8 BYW29-200 C7 2.2 nF 630 V R14 2 MΩ 1% BR1 B10S-G 1000 V RV1 250 VAC D2 DFLU1400-7 R13 510 kΩ 1/8 W 1 Q4 MMBT3904LT1G C10 10 nF 50 V R23 10 Ω 1/10 W C12 100 nF 50 V R24 1 kΩ 1/10 W L2 1.5 mH CY1 470 pF 250 VAC PI-7089-102313 Figure 9. Modified Schematic of DER-396 for Non-Dimmable, Isolated, High Power Factor, 185-265 VAC, 20 W / 36 V LED Driver. 8 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Maximum Input Capacitance To achieve high power factor, the capacitance used in both the EMI filter and for decoupling the rectified AC (bulk capacitor) must be limited in value. The maximum value is a function of the output power of the design and reduces as the output power reduces. For the majority of designs limit the total capacitance to less than 220 nF with a bulk capacitor value of 100 nF. Film capacitors are recommended compared to ceramic types as they minimize audible noise with operating with leading edge phase dimmers. Start with a value of 10 nF for the capacitance in the EMI filter and increase in value until there is sufficient EMI margin. REFERENCE Pin Resistance Value Selection The LYTSwitch-4 high-line family contains phase dimming devices, LYT4321-4328, and non-dimming devices, LYT42214228. Both the non-dimmable devices and dimmable devices use 24.9 kW ±1% REFERENCE pin resistor for best output current tolerance (over AC input voltage changes). VOLTAGE MONITOR Pin Resistance Network Selection For widest AC phase angle dimming range with LYT4321-4328, use a 4 MW resistor connected to the line voltage peak detector circuit. Make sure that the resistor’s voltage rating is sufficient for the peak line voltage. If necessary use multiple series connected resistors. Primary Clamp and Output Reflected Voltage VOR A primary clamp is necessary to limit the peak drain to source voltage. A Zener clamp requires the fewest components and board space and gives the highest efficiency. RCD clamps are also acceptable however the peak drain voltage should be carefully verified during start-up and output short-circuits as the clamping voltage varies with significantly with the peak drain current. For the highest efficiency, the clamping voltage should be selected to be at least 1.5 times the output reflected voltage, VOR, as this keeps the leakage spike conduction time short. When using a Zener clamp in a universal input or high-line only application, a VOR of less than 135 V is recommended to allow for the absolute tolerances and temperature variations of the Zener. This will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated breakdown voltage of the FET. An RCD (or RCDZ) clamp provides tighter clamp voltage tolerance than a Zener clamp. The RCD clamp is more cost-effective than the Zener clamp but requires more careful design to ensure that the maximum drain voltage does not exceed the power FET breakdown voltage. These VOR limits are based on the BVDSS rating of the internal FET, a VOR of 90 V to 120 V is typical for most designs, giving the best PFC and regulation performance. Series Drain Diode An ultrafast or Schottky diode in series with the drain is necessary to prevent reverse current flowing through the device. The voltage rating must exceed the output reflected voltage, VOR. The current rating should exceed two times the average primary current and have a peak rating equal to the maximum drain current of the selected LYTSwitch-4 high-line device. Line Voltage Peak Detector Circuit LYTSwitch-4 high-line devices use the peak line voltage to regulate the power delivery to the output. A capacitor value of 1 mF to 4.7 mF is recommended to minimize line ripple and give the highest power factor (>0.9), smaller values are acceptable but result in lower PF and higher line current distortion. Operation with Phase Controlled Dimmers Dimmer switches control incandescent lamp brightness by not conducting (blanking) for a portion of the AC voltage sine wave. This reduces the RMS voltage applied to the lamp thus reducing the brightness. This is called natural dimming and the LYTSwitch-4 high-line LYT4321-4328 devices when configured for dimming utilize natural dimming by reducing the LED current as the RMS line voltage decreases. By this nature, line regulation performance is purposely decreased to increase the dimming range and more closely mimic the operation of an incandescent lamp. Leading Edge Phase Controlled Dimmers The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a number of trade-offs in the design. Due to the much lower power consumed by LED based lighting the current drawn by the overall lamp is below the holding current of the TRIAC within the dimmer. This causes undesirable behaviors such as limited dimming range and/or flickering. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush current charging the input capacitance when the TRIAC turns on. This too can cause similar undesirable behavior as the ringing may cause the TRIAC current to fall to zero and turn off. To overcome these issues two circuits, the active damper and passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency of the supply so for non-dimming applications these components can simply be omitted. Figure 10(a) shows the line voltage and current at the input of a leading edge TRIAC dimmer with Figure 10(b) showing the resultant rectified bus voltage. In this example, the TRIAC conducts at 90 degrees. Figure 11 shows undesired rectified bus voltage and current with the TRIAC turning off prematurely and restarting. If the TRIAC is turning off before the end of the half-cycle erratically or alternate half AC cycles have different conduction angles then flicker will be observed in the LED light due to variations in the output current. This can be solved by including a bleeder and damper circuit. Dimmers will behave differently based on manufacturer and power rating, for example a 300 W dimmer requires less dampening and requires less power loss in the bleeder than a 600 W or 1000 W dimmer due to different drive circuits and TRIAC holding current specifications. Line voltage also has a significant impact as at high-line for a given output power the 9 www.powerint.com Rev. B 03/14 250 0.25 150 0.15 50 0.05 50 100 150 200 250 300 350 400 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 300 200 0.2 150 0.15 100 0.1 50 0.05 0.35 0.3 250 0.25 200 0.2 150 0.15 100 0.1 50 0.05 0 0 200 250 100 150 200 250 300 350 400 300 350 PI-5986-060810 350 400 Conduction Angle (°) Figure 10b.Resultant Waveforms Following Rectification of TRIAC Dimmer Output. input current and therefore TRIAC current is lower but the peak inrush current when the input capacitance charges is higher creating more ringing. Finally multiple lamps in parallel driven from the same dimmer can introduce more ringing due to the increased capacitance of parallel units. Therefore, when testing dimmer operation verify on a number of models, different line voltages and with both a single driver and multiple drivers in parallel. Start by adding a bleeder circuit. Add a 0.44 mF capacitor and 510 W 1 W resistor (components in series) across the rectified bus (C1 and R1, R2, R27, R28 in Figure 8). If the results in satisfactory operation reduce the capacitor value to the smallest that result in acceptable performance to reduce losses and increase efficiency. If the bleeder circuit does not maintain conduction in the TRIAC, then add an active damper as shown in Figure 8. This circuit limits the inrush current that flows to charge C4 and C5 when the TRIAC turns on by placing the damper resistor (R11, R29) in series for the first 1 ms of the TRIAC conduction. After approximately 1 ms, Q3 turns on and shorts the damper resistor. This keeps the power dissipation on the damper resistor low and allows a larger value to be used during current limiting. Increasing the delay before Q3 turns on by increasing the value of capacitor Dimmer Output Voltage (V) Rectified Input Voltage (V) Voltage Current 150 50 Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing. Rectified Input Current (A) PI-5984-060810 100 0 0 Conduction Angle (°) 350 50 0.3 0.25 0 Figure 10a.Ideal Input Voltage and Current Waveforms for a Leading Edge TRIAC Dimmer at 90° Conduction Angle. 0 0.35 250 Conduction Angle (°) 300 Voltage Current Voltage Current 250 0.35 0.25 150 0.15 50 0.05 -50 0 50 100 150 200 250 300 350 -0.05 -150 -0.15 -250 -0.25 -350 -0.35 Conduction Angle (°) Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Edge Dimmer at 90° Conduction Angle. C3 will improve dimmer compatibility but cause more power to be dissipated across the damper resistor. Monitor the AC line current and voltage at the input of the power supply as you make the adjustments. Increase the delay until the TRIAC operates properly but keep the delay as short as possible for efficiency. As a general rule the greater the power dissipated in the bleeder and damper circuits, the more types of dimmers will work with the driver. Trailing Edge Phase Controlled Dimmers Figure 12 shows the line voltage and current at the input of the power supply with a trailing edge dimmer. In this example, the dimmer conducts at 90 degrees. Many of these dimmers use back-to-back connected power FETs rather than a TRIAC to control the load. This eliminates the holding current issue of TRIACs and since the conduction begins at the zero crossing, high current surges and line ringing are minimized. These types of dimmers do not require damping circuits but do require a bleeder. However the bleeder ensures that the AC voltage across the dimmer falls to a low enough level for the dimmer to correctly detect zero crossing. This is used internally by the dimmer for timing. 10 Rev. B 03/14 www.powerint.com Dimmer Output Current (A) -50 0.5 PI-5985-060810 350 Rectified Input Current (A) Voltage Current 0.35 Rectified Input Voltage (V) PI-5983-060810 350 Line Current (Through Dimmer) (A) Line Voltage (at Dimmer Input) (V) LYT4221-4228/4321-4328 LYT4221-4228/4321-4328 Audible Noise Considerations for Use with Leading Edge Dimmers Noise created when dimming is typically created by the input capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every AC half-cycle as the TRIAC fires and an inrush current flows to charge the input capacitance. Noise can be minimized by selecting film vs. ceramic capacitors, minimizing the capacitor value and selecting inductors that are physically short and wide. The transformer may also create noise which can be minimized by avoiding cores with long narrow legs (high mechanical resonant frequency). For example, RM cores produce less audible noise than EE cores for the same flux density. Reducing the core flux density will also reduce the noise. Reducing the maximum flux density (BM) to 1500 Gauss usually eliminates any audible noise but must be balanced with the increased core size needed for a given output power. Thermal and Lifetime Considerations Lighting applications present thermal challenges to the driver. In many cases the LED load dissipation determines the working ambient temperature experienced by the drive so thermal evaluation should be performed with the driver inside the final enclosure. Temperature has a direct impact on driver and LED Input EMI Filter LYT4224E Bullk Capacitor lifetime. For every 10 °C rise in temperature, component life is reduced by a factor of 2. Therefore it is important to properly heat sink and to verify the operating temperatures of all devices. Layout Considerations Primary-Side Connections Use a single point (Kelvin) connection at the negative terminal of the input filter capacitor for the SOURCE pin and bias returns. This improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. The BYPASS pin capacitor should be located as close to the BYPASS pin and connected as close to the SOURCE pin as possible. The SOURCE pin trace should not be shared with the main power FET switching currents. All FEEDBACK pin components that connect to the SOURCE pin should follow the same rules as the BYPASS pin capacitor. It is critical that the main power FET switching currents return to the bulk capacitor with the shortest path as possible. Long high current paths create excessive conducted and radiated noise. Secondary-Side Connections The output rectifier and output filter capacitor should be as close as possible. The transformer’s output return pin should have a short trace to the return side of the output filter capacitor. BYPASS Pin Capacitor Clamp Transformer Output Diode Output Capacitor REFERENCE Pin Resistor FEEDBACK Pin Resistor VOLTAGE MONITOR Pin Resistor Output Capacitors PI-7096-102313 Figure 13. DER-396 20 W Layout Example, Top Silkscreen / Bottom Layer. 11 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Quick Design Checklist Maximum Drain Voltage Verify that the peak VDS does not exceed the device absolute maximum rating under all operating conditions including start-up and fault conditions. Maximum Drain Current Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet. Thermal Check At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4 high-line, transformer, output diodes, output capacitors and drain clamp components. 12 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Absolute Maximum Ratings(1,4) DRAIN Pin Peak Current(5): LYT4x21..................................1.37 A LYT4x22..................................2.08 A LYT4x23..................................2.72 A LYT4x24................................. 4.08 A LYT4x25................................. 5.44 A LYT4x26................................. 6.88 A LYT4x27..................................7.33 A LYT4x28....................................9.0 A DRAIN Pin Voltage ……………………….................. -0.3 to 725 V BYPASS Pin Voltage.................................................. -0.3 to 9 V BYPASS Pin Current ………………………....................... 100 mA VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6) FEEDBACK Pin Voltage ……...................................... -0.3 to 9 V REFERENCE Pin Voltage .......................................... -0.3 to 9 V Lead Temperature(3) .........................................................260 °C Storage Temperature ………………….................... -65 to 150 °C Operating Junction Temperature(2)..........................-40 to 150 °C Notes: 1. All voltages referenced to SOURCE, TA = 65 °C. 2. Normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. Absolute Maximum Ratings specified may be applied, one at a time without causing permanent damage to the product. Exposure to Absolute Maximum Ratings for extended periods of time may affect product reliability. 5. Peak DRAIN current is allowed while the DRAIN voltage is simultaneously less than 400 V. See also Figure 10. 6. During start-up (the period before the BYPASS pin begins powering the IC) the VOLTAGE MONITOR pin voltage can safely rise to 15 V without damage. Thermal Resistance Thermal Resistance: E Package (qJA) ....................................................105 °C/W(1) (qJC)..................................................... 2 °C/W(2) Parameter Symbol Notes: 1. Free standing with no heat sink. 2. Measured at back surface tab. Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max 124 132 140 Units Control Functions Switching Frequency Frequency Jitter Modulation Rate fOSC TJ = 65 °C Peak-Peak Jitter 5.4 TJ = 65 °C See Note B fM ICH1 Average VBP = 0 V, TJ = 65 °C 2.6 ICH2 VBP = 5 V, TJ = 65 °C -4.1 -3.4 -2.7 LYT4x22 -7.3 -6.1 -4.9 LYT4x23-4x27 -12 -9.5 -7.0 -11.8 LYT4x21 -0.90 -0.56 -0.28 LYT4x22 -3.1 -2.4 -1.7 LYT4x23-4x26 -5.7 -4.35 -3.1 LYT4x27 -6.8 -4.35 -3.1 LYT4x28 Charging Current Temperature Drift BYPASS Pin Voltage BYPASS Pin Voltage Hysteresis BYPASS Pin Shunt Voltage kHz LYT4x21 LYT4x28 BYPASS Pin Charge Current 0 °C < TJ < 100 °C VBP(H) 0 °C < TJ < 100 °C VBP(SHUNT) IBP = 4 mA 0 °C < TJ < 100 °C mA -6.4 See Note A, B VBP kHz 0.7 5.75 5.95 %/°C 6.15 0.85 6.1 6.4 V V 6.6 V 13 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ tSOFT TJ = 65 °C VBP = 5.9 V 51 72 ICD2 0 °C < TJ < 100 °C FET Not Switching 0.5 0.8 1.2 ICD1 0 °C < TJ < 100 °C FET Switching at fOSC 1 2.5 4 105 112 119 Max Units Control Functions (cont.) Soft-Start Time Drain Supply Current ms mA VOLTAGE MONITOR Pin Threshold Line Overvoltage Threshold IOV TJ = 65 °C RR = 24.9 kW VOLTAGE MONITOR Pin Voltage VV 0 °C < TJ < 100 °C IV < IOV LYT4x21-4x26 3.0 3.25 3.50 LYT4x27-4x28 2.75 3.00 3.25 IV(SC) VV = 5 V TJ = 65 °C LYT4x21-4x26 205 230 255 LYT4x27-4x28 150 175 200 VOLTAGE MONITOR Pin Short-Circuit Current Remote ON/OFF Threshold Hysteresis 5.5 VV(REM) TJ = 65 °C 0.5 FEEDBACK Pin Current at Onset of Maximum Duty Cycle IFB(DCMAXR) 0 °C < TJ < 100 °C FEEDBACK Pin Current Skip Cycle Threshold IFB(SKIP) 0 °C < TJ < 100 °C 210 Maximum Duty Cycle DCMAX IFB(DCMAXR) < IFB < IFB(SKIP) 0 °C < TJ < 100 °C 85 VFB IFB = 150 mA 0 °C < TJ < 100 °C 2.1 IFB(SC) VFB = 5 V TJ = 65 °C 320 DC10 IFB = IFB(AR), TJ = 65 °C, See Note B 13 DC40 IFB = 40 mA, TJ = 65 °C 34 DC60 IFB = 60 mA, TJ = 65 °C 50 tAR TJ = 65 °C VBP = 5.9 V Auto-Restart Duty Cycle DCAR TJ = 65 °C See Note B SOA Minimum Switch ON-Time tON(SOA) TJ = 65 °C See Note B IFB(AR) 0 °C < TJ < 100 °C mA V mA V FEEDBACK Pin FEEDBACK Pin Voltage FEEDBACK Pin Short-Circuit Current Duty Cycle Reduction 90 mA mA 99.9 % 2.3 2.56 V 400 480 mA % Auto-Restart Auto-Restart ON-Time FEEDBACK Pin Current During Auto-Restart 51 72 ms 12.5 % 6.5 0.875 ms 10 mA 14 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max Units 1.223 1.245 1.273 V 48.69 49.94 51.19 mA REFERENCE Pin REFERENCE Pin Voltage VR REFERENCE Pin Current IR RR = 24.9 kW 0 °C < TJ < 100 °C Current Limit/Circuit Protection Full Power Current Limit (CBP = 4.7 mF) Reduced Power Current Limit (CBP = 47 mF) di/dt = 138 mA/ms LYT4x22 0.79 0.92 di/dt = 145 mA/ms LYT4x23 0.99 1.15 ILIMIT(F) di/dt = 180 mA/ms LYT4x24 1.18 1.38 TJ = 65 °C di/dt = 227 mA/ms LYT4x25 1.41 1.63 di/dt = 272 mA/ms LYT4x26 1.89 2.19 di/dt = 375 mA/ms LYT4x27 2.61 3.03 di/dt = 120 mA/ms LYT4x21 0.59 0.69 di/dt = 170 mA/ms LYT4x22 0.65 0.76 di/dt = 170 mA/ms LYT4x23 0.8 0.93 ILIMIT(R) di/dt = 188 mA/ms LYT4x24 0.95 1.11 TJ = 65 °C di/dt = 240 mA/ms LYT4x25 1.14 1.33 di/dt = 300 mA/ms LYT4x26 1.38 1.61 di/dt = 430 mA/ms LYT4x27 1.88 2.18 di/dt = 790 mA/ms LYT4x28 3.92 4.56 Minimum ON-Time Pulse tLEB + tIL(D) TJ = 65 °C 270 Leading Edge Blanking Time tLEB TJ = 65 °C See Note B 110 Current Limit Delay tIL(D) TJ = 65 °C See Note B Thermal Shutdown Temperature See Note B Thermal Shutdown Hysteresis BYPASS Pin Power-Up Reset Threshold Voltage ns 375 ns ns LYT4x21-4x26 135 142 150 LYT4x27-4x28 147 155 163 0 °C < TJ < 100 °C 3.30 °C °C 75 2.25 A 630 150 See Note B VBP(RESET) 450 A 4.25 V 15 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 Parameter Symbol Conditions SOURCE = 0 V; TJ = -20 °C to 125 °C (Unless Otherwise Specified) Min Typ Max TJ = 65 °C 11.5 13.2 TJ = 100 °C 13.5 15.5 TJ = 65 °C 6.9 8.0 TJ = 100 °C 8.4 9.7 TJ = 65 °C 5.3 6.0 TJ = 100 °C 6.3 7.3 TJ = 65 °C 3.4 3.9 TJ = 100 °C 3.9 4.5 TJ = 65 °C 2.5 2.9 TJ = 100 °C 3.0 3.4 TJ = 65 °C 1.9 2.2 TJ = 100 °C 2.3 2.7 TJ = 65 °C 1.8 2.0 TJ = 100 °C 2.1 2.5 TJ = 65 °C 1.3 1.5 TJ = 100 °C 1.6 1.9 Units Output LYT4x21 ID = 100 mA LYT4x22 ID = 100 mA LYT4x23 ID = 150 mA ON-State Resistance RDS(ON) LYT4x24 ID = 150 mA LYT4x25 ID = 200 mA LYT4x26 ID = 250 mA LYT4x27 LYT4x28 OFF-State Drain Leakage Current Breakdown Voltage W IDSS VBP = 6.4 V VDS = 560 V TJ = 100 °C BVDSS VBP = 6.4 V TJ = 65 °C 725 V TJ < 100 °C 36 V Minimum Drain Supply Voltage Rise Time tR Fall Time tF Measured in a Typical Flyback See Note B 50 mA 100 ns 50 ns NOTES: A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. B. Guaranteed by characterization. Not tested in production. Note: The parameter values and limits specified herein are based on a limited data set. There is a small likelihood that minor changes may be required based on additional data as they become available. 16 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Power (mW) Scaling Factors: LYT4x21 0.18 LYT4x22 0.28 LYT4x23 0.38 LYT4x24 0.56 LYT4x25 0.75 LYT4x26 1.00 LYT4x27 1.16 LYT4x28 1.55 1000 100 10 1 100 200 300 400 500 300 PI-6965-102313 DRAIN Capacitance (pF) 10000 Scaling Factors: LYT4x21 0.18 LYT4x22 0.28 LYT4x23 0.38 LYT4x24 0.56 LYT4x25 0.75 LYT4x26 1.00 LYT4x27 1.16 LYT4x28 1.55 200 100 0 600 0 DRAIN Pin Voltage (V) 3 Scaling Factors: LYT4x21 0.18 LYT4x22 0.28 LYT4x23 0.38 LYT4x24 0.56 LYT4x25 0.75 LYT4x26 1.00 LYT4x27 1.16 LYT4x28 1.55 2 1 LYT42x8 TCASE = 25 °C LYT42x8 TCASE = 100 °C 0 0 2 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) Figure 16. Drain Current vs. Drain Voltage. 1.2 PI-6010-060410 PI-6967-102313 Figure 15. Power vs. Drain Voltage. DRAIN Current (Normalized to Absolute Maximum Rating) DRAIN Current (A) 4 100 200 300 400 500 600 700 DRAIN Voltage (V) Figure 14. Drain Capacitance vs. Drain Pin Voltage. 5 PI-6966-102313 Typical Performance Characteristics 1 0.8 0.6 0.4 0.2 0 0 100 200 300 400 500 600 700 800 DRAIN Voltage (V) Figure 17. Maximum Allowable Drain Current vs. Drain Voltage. 17 www.powerint.com Rev. B 03/14 LYT4221-4228/4321-4328 eSIP-7C (E Package) C 2 0.403 (10.24) 0.397 (10.08) A 0.264 (6.70) Ref. 0.081 (2.06) 0.077 (1.96) B Detail A 2 0.290 (7.37) Ref. 0.519 (13.18) Ref. 0.325 (8.25) 0.320 (8.13) Pin #1 I.D. 0.140 (3.56) 0.120 (3.05) 3 0.207 (5.26) 0.187 (4.75) 0.016 (0.41) Ref. 3 0.047 (1.19) 0.070 (1.78) Ref. 0.050 (1.27) 0.198 (5.04) Ref. 0.016 (0.41) 6× 0.011 (0.28) 0.020 M 0.51 M C FRONT VIEW 0.118 (3.00) SIDE VIEW 4 0.033 (0.84) 6× 0.028 (0.71) 0.010 M 0.25 M C A B 0.100 (2.54) BACK VIEW 0.100 (2.54) 10° Ref. All Around 0.021 (0.53) 0.019 (0.48) 0.050 (1.27) 0.020 (0.50) 0.060 (1.52) Ref. 0.050 (1.27) PIN 1 0.378 (9.60) Ref. 0.048 (1.22) 0.046 (1.17) 0.019 (0.48) Ref. 0.059 (1.50) 0.155 (3.93) 0.023 (0.58) END VIEW PIN 7 0.027 (0.70) 0.059 (1.50) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. DETAIL A 0.100 (2.54) 0.100 (2.54) MOUNTING HOLE PATTERN (not to scale) 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-4917-061510 18 Rev. B 03/14 www.powerint.com LYT4221-4228/4321-4328 Part Ordering Information • LYTSwitch Product Family • 4 Series Number • PFC/Dimming 2 PFC No Dimming 3 PFC Dimming • Voltage Range 2 High-Line • Device Size • Package Identifier LYT 4 2 2 3 E E eSIP-7C 19 www.powerint.com Rev. B 03/14 Revision Notes Date A Initial Release. B LYT4x27E, LYT4x28E – updated / added parameters: ICH1, ICH2, VV, IV(SC), and ILIMIT(F). 11/13 03/11/14 For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters 5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: [email protected] China (Shanghai) Rm 2410, Charity Plaza, No. 88 North Caoxi Road Shanghai, PRC 200030 Phone: +86-21-6354-6323 Fax: +86-21-6354-6325 e-mail: [email protected] China (ShenZhen) 3rd Floor, Block A, Zhongtou International Business Center, No. 1061, Xiang Mei Rd, FuTian District, ShenZhen, China, 518040 Phone: +86-755-8379-3243 Fax: +86-755-8379-5828 e-mail: [email protected] Germany Lindwurmstrasse 114 80337 Munich Germany Phone: +49-895-527-39110 Fax: +49-895-527-39200 e-mail: [email protected] India #1, 14th Main Road Vasanthanagar Bangalore-560052 India Phone: +91-80-4113-8020 Fax: +91-80-4113-8023 e-mail: [email protected] Italy Via Milanese 20, 3rd. Fl. 20099 Sesto San Giovanni (MI) Italy Phone: +39-024-550-8701 Fax: +39-028-928-6009 e-mail: [email protected] Japan Kosei Dai-3 Bldg. 2-12-11, Shin-Yokohama, Kohoku-ku Yokohama-shi Kanagwan 222-0033 Japan Phone: +81-45-471-1021 Fax: +81-45-471-3717 e-mail: [email protected] Korea RM 602, 6FL Korea City Air Terminal B/D, 159-6 Samsung-Dong, Kangnam-Gu, Seoul, 135-728, Korea Phone: +82-2-2016-6610 Fax: +82-2-2016-6630 e-mail: [email protected] Taiwan 5F, No. 318, Nei Hu Rd., Sec. 1 Nei Hu Dist. Taipei 11493, Taiwan R.O.C. Phone: +886-2-2659-4570 Fax: +886-2-2659-4550 e-mail: [email protected] Europe HQ 1st Floor, St. James’s House East Street, Farnham Surrey GU9 7TJ United Kingdom Phone: +44 (0) 1252-730-141 Fax: +44 (0) 1252-727-689 e-mail: [email protected] Applications Hotline World Wide +1-408-414-9660 Singapore 51 Newton Road Applications Fax #19-01/05 Goldhill Plaza World Wide +1-408-414-9760 Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: [email protected] 设计范例报告 标题 使用LYTSwitchTM -4 LYT4324E设计的20 W高效 率(>86%)、可控硅调光、带功率因数校正的隔离 反激式LED驱动器 规格 185 VAC – 265 VAC输入； 36 VTYPICAL，550 mA输出 应用 PAR38替换灯 作者 应用工程部 文档编号 DER-396 日期 2013年9月25日 修订版本 1.0 特色概述 • • • • • • • • • • 单级功率因数校正(PFC)及精确恒流(CC)输出(+5%) 在230 VAC下，PF > 0.9 在230 VAC下，%A THD <20% 在不同生产环境下和过热范围内具有一致的调光性能 低成本、元件数量少、印刷电路板(PCB)占板面积小的设计 极高能效，在230 VAC输入下效率>86 % 快速启动时间(<250 ms) – 无可见延迟 干净的单向启动 – 无输出闪烁 集成的保护及可靠性能 • 空载保护，短路保护 • 更大迟滞的自动恢复热关断可同时保护元件和印刷电路板 • 在AC电压缓降期间不会造成任何损坏 满足IEC 2.5 kV振铃波、500 V差模输入浪涌和EN55015传导EMI要求 专利信息 此处介绍的产品和应用（包括产品之外的变压器结构和电路）可能包含一项或多项美国及国外专利，或正在申请的美国或国外专利。有关 Power Integrations专利的完整列表，请参见www.powerint.com。Power Integrations按照在<http://www.powerint.com/ip.htm>中所述规定， 向客户授予特定专利权利的许可。 Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 目录 1 2 3 简介 ............................................................................................................................ 4 装配后的PCB板 .......................................................................................................... 5 电源规格 ..................................................................................................................... 7 3.1 电路原理图 .......................................................................................................... 8 4 电路描述 ..................................................................................................................... 9 4.1 输入级.................................................................................................................. 9 4.2 衰减电路级 .......................................................................................................... 9 4.3 LYTSwitch-4初级 ............................................................................................... 10 4.4 输出反馈 ............................................................................................................ 11 4.5 负载断开保护 ..................................................................................................... 11 4.6 过载和短路保护 ................................................................................................. 11 5 PCB布局轮廓 ............................................................................................................ 12 6 物料清单(BOM)......................................................................................................... 13 7 变压器(T1)规格 ......................................................................................................... 15 7.1 电气原理图 ........................................................................................................ 15 7.2 电气规格 ............................................................................................................ 15 7.3 材料 ................................................................................................................... 15 7.4 结构图................................................................................................................ 16 7.5 绕制 ................................................................................................................... 16 8 差模电感(L1)规格...................................................................................................... 18 8.1 结构图................................................................................................................ 18 8.2 电气规格 ............................................................................................................ 18 8.3 材料 ................................................................................................................... 18 8.4 结构图................................................................................................................ 19 8.5 绕制 ................................................................................................................... 19 9 U1散热片 .................................................................................................................. 20 9.1 U1散热片加工图 ................................................................................................ 20 9.2 U1散热片装配图 ................................................................................................ 21 9.3 散热片和U1装配图 ............................................................................................. 22 10 变压器设计表格 ..................................................................................................... 23 11 性能数据................................................................................................................ 26 11.1 带载模式效率 ................................................................................................. 27 11.2 线电压调整 ..................................................................................................... 28 11.3 功率因数 ........................................................................................................ 29 11.4 %THD ................................................................................................................ 30 11.5 谐波含量 ........................................................................................................ 31 11.6 谐波测量 ........................................................................................................ 32 11.7 调光特性 ........................................................................................................ 33 11.8 参考设计与调光器的兼容性 ............................................................................ 36 Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第2页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 12 热性能 ...................................................................................................................37 13 波形 .......................................................................................................................39 13.1 漏极电压和电流，正常工作 ............................................................................39 13.2 漏极电压和电流启动特征 ................................................................................39 13.3 输出电压启动特征 ..........................................................................................40 13.4 输入与输出电压和电流的波形.........................................................................40 13.5 漏极电压和电流波形：正常工作到输出短路 ...................................................41 13.6 漏极电压和电流波形：输出短路时启动 ..........................................................42 13.7 空载工作 .........................................................................................................42 13.8 交流电循环上电 ..............................................................................................43 13.9 调光波形 .........................................................................................................44 13.10 输入浪涌波形..................................................................................................56 13.10.1 差模输入浪涌 ..........................................................................................56 13.10.2 差模振铃浪涌 ..........................................................................................56 14 输入浪涌 ................................................................................................................57 15 传导EMI.................................................................................................................58 15.1 设备 ................................................................................................................58 15.2 EMI测试设置 ......................................................................................................58 15.3 EMI测试结果 ......................................................................................................59 16 版本历史 ................................................................................................................61 重要说明： 虽然本电路板的设计满足非隔离LED驱动器安全要求，但工程原型尚未获得机构认证。 因此，必须使用隔离变压器向原型板提供AC输入，以执行所有测试。 第3页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 1 简介 本文档是一份工程报告，介绍使用LYTSwitch-4高压系列器件LYT4324E设计的一款隔 离式、高功率因数、可调光LED驱动器（电源）。 DER-396能够在185至265 VAC的输入电压范围内提供一路20 W (36 VTYPICAL)、可调光的 550 mA恒流输出。 主要设计目标是实现高效率，以提升发光效率并减小尺寸。这样可使驱动器装入BR38灯并 尽可能接近可投产设计。 LYTSwitch-4 IC可用来实现具有成本效益的低元件数LED驱动器，同时使设计满足功率因数 和谐波失真限值。LYTSwitch-4驱动器IC将PFC功能和次级输出恒流控制电路同时集成到 一个开关级中。 所使用的拓扑结构是运行于连续导通模式下的隔离反激。输出电流调整完全从初级侧实 现，因此无需使用次级反馈元件。在初级侧也无需检测外部电流，而是在IC内部进行，可 进一步降低元件成本并提高效率。内部控制器调整功率MOSFET占空比以保持输入电流为正 弦交流电，同时确保高功率因数和低谐波电流控制。 LYT4324E也可提供各种复杂的保护功能，包括环路开环或输出短路条件下自动重启动。 输入过压可提供增强的抗输入故障和浪涌能力，输出过压可保护负载应当断开的电源， 精确的迟滞热关断可确保在所有条件下平均PCB温度都处于安全范围内。 在任何LED照明装置中，驱动器的性能直接决定了最终用户对照明的感受，包括启动时 间、调光性能和驱动器之间的一致性。该设计经过优化，可确保兼容各种调光器和更宽的 调光范围。 本文档包括电源规格、电路原理图、物料清单、变压器规格文件、印刷电路板布局、设计 表格及性能数据。 Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第4页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 2 装配后的PCB板 Figure 1 – Populated Circuit Board (Top Side). Figure 2 – Populated Circuit Board (Bottom Side). 第5页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 3 – Populated Circuit Board. Dimensions: 2.68 in [68.1 mm] L x 1.32 in [33.6 mm] W x 1 in [25.4 mm] H. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第6页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 3 电源规格 下表所列为设计的最低可接受性能。实际性能可参考测量结果部分。 说明 输入 电压 频率 功率因数 %ATHD 输出 输出电压 输出电流 总输出功率 连续输出功率 效率 额定 符号 VIN fLINE 最小值 典型值 最大值 185 47 230 50/60 0.9 265 63 单位 备注 VAC Hz 双导线 – 无P.E. 在230 VAC下 17 VOUT IOUT 33 522 36 550 39 577 V mA POUT 20 W η 86 % 在230 VAC下 在POUT 25 oC及 230 VAC条件下测得 环境 传导EMI 满足CISPR22B/EN55015要求 输入浪涌 差模(L1-L2) 500 V 振铃波(100 kHz) 差模(L1-L2) 2.5 kV 第7页（共62页） 1.2/50 μs浪涌，IEC 1000-4-5， 串联电阻： 差模：2 Ω 2 Ω短路 串联电阻 Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 3.1 25-Sep-13 电路原理图 Figure 4 – Schematic for 36 V, 550 mA Replacement Lamp. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第8页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 4 电路描述 LYTSwitch-4 (U1) 系 列 器 件 是 一 系 列 适 用 于 LED 驱 动 器 应 用 的 高 集 成 度 电 源 IC 。 LYTSwitch-4能够在单级转换拓扑结构中提供高功率因数，同时特别对LED驱动器应用中 常见的各种输入(185 VAC-265 VAC)和输出电压条件下的输出电流进行调节。 4.1 输入级 保险丝F1提供元件故障保护。需要使用一个额定值5 A的快速恢复二极管来防止在输入浪涌 下误开路。压敏电阻RV1提供箝位功能，用以限制在差模输入电压浪涌期间的最大电压。 RV1的额定电压为275 VAC，略高于最大指定工作电压(265 VAC)。LYTSwitch-4的快速反 应输入过压检测与D2和C6峰值检测电容一起提供箝位功能，用以限制在IC的功率MOSFET 上出现最大电压应力。此外，在差模输入浪涌期间（通过RC高通滤波器 - R7、R8和C2 检测到高dv/dt），Q2将关断Q3，与输入电流（在阻尼电阻R11中将增大）成正比的电压将 从输入端减去。这有助于限制出现在U1漏极的电压应力。电阻R9从C2泄放电荷，并确保 Q2在正常工作期间处于关断状态。 差模扼流圈L1是用来抑制噪声的前端EMI滤波器。电阻R3可在必要时衰减EMI滤波器的 谐振。 BR1对AC输入进行全波整流以获得良好的功率因数和低THD。 电容C4、C5和共模扼流圈L2形成位于桥式整流管后面的EMI滤波器。滤波电容受到限制， 可维持较高的功率因数。该输入π滤波器网络与LYTSwitch-4的频率调制特性相结合，可使 设计满足Class B干扰限值。电阻R12可在必要时衰减EMI滤波器的谐振，从而防止当在系 统（驱动器加外壳）中测量时EMI频谱中出现峰值。 4.2 衰减电路级 为了用低成本的可控硅前沿相控调光器提供输出调光，我们需要在设计时进行全面权衡。 由于LED照明的功耗非常低（相对于传统的白炽灯泡），灯所吸收的电流要小于调光器 内可控硅的维持电流。这样会因为可控硅触发不一致而产生某些不良情况，比如调光范围 受限和/或闪烁。由于LED灯的阻抗相对较大，因此在可控硅导通时，浪涌电流会对输入 电容进行充电，产生很严重的振荡。这同样会造成类似不良情况，因为振荡会使可控硅电 流降至零（并关断可控硅）。要克服这些问题，需增加两个电路 – 有源衰减电路和无源泄 放电路。这些电路的缺点是会增大功耗，进而降低电源的效率。对于非调光应用，可以省 略这些元件。 第9页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 有源衰减电路由元件R4、R5、R6、R10、D1、Q1、C3、VR1和Q3以及R11共同组成。 该电路可以限制可控硅导通时流入C3并对其充电的浪涌电流，实现方式是在导通前1 ms内 将R11串联。在大约1 ms后，Q3导通并将R11短路。这样可使R11的功耗保持在低水平， 在限流时可以使用更大的值。电阻R4、R5、R6和C3在可控硅导通后提供1 ms延迟。晶体 管Q1在可控硅不导通时对C3进行放电，VR1将Q3的栅极电压箝位在15 V，R10用于防止 MOSFET发生振荡。当无可控硅连接时，Q3将保持导通，从而旁通R11以提高效率。 无源RC泄放电路（C1、R1、R2、R27和R28）就位于保险丝后面，用来通过EMI电感降 低调光期间的浪涌电流，进而降低音频噪声。使用了四个泄放电阻来分割功耗（特别是调 光器处在90º导通角时），以便获得紧凑外形。这样可以使输入电流始终大于可控硅的维持 电流，而与驱动器相应的输入电流将在每个AC半周期内增大，防止每个导通角期间的起始 阶段出现可控硅的开关振荡。 4.3 LYTSwitch-4初级 变压器(T1)一端连接到DC总线，另一端连接到LYTSwitch-4 IC的漏极(D)引脚。在功率 MOSFET的导通时间内，初级绕组中的电流升高，存储的能量随后在功率MOSFET关断时 间内传送到输出。本设计选用RM7磁芯，因为它在板上占用的面积很小。由于骨架达不到 230 VAC工作条件下的6.2 mm的安全爬电距离要求，因此使用飞线将次级绕组端接到PCB 板中。 为向U1提供峰值输入电压信息，经整流AC的输入峰值经由D2对C6充电。然后电流经过 R14和R15，注入U1的电压监测(V)引脚。电阻容差将会导致不同电源之间的V引脚电流有 所差异，因此选择1%误差的电阻可以将这种变化降至最低。器件也会利用V引脚电流来设 定输入过压阈值。电阻R13为C6提供放电通路，时间常数远大于经整流AC的放电时间，以 防止V引脚电流被线电压频率所调制。 V引脚电流和反馈(FB)引脚电流在内部用来控制LED平均输出电流。可在R引脚(R18)和V引 脚上分别使用24.9 kΩ电阻和 4 MΩ (R14+R15)电阻，使输入电压和输出电流保持线性关 系，从而获得最大调光范围。 在功率MOSFET导通期间，在C5上的电压降到反射输出电压(VOR)以下时，需要使用二极 管D4来防止反向电流流经U1。在瞬态工作期间，由于漏感会带来影响，VRCD缓冲电路二 极管D3、VR4和C7将漏极电压箝位到一个安全水平。 Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第10页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 二极管D6、C9、C11、R21和R22构成初级偏置供电，能量来自变压器的辅助绕组。电容 C8对U1的旁路(BP)引脚进行局部去耦，该引脚是内部控制器的供电引脚。在启动期间， C8从与漏极引脚相连的内部高压电流源被充电至约6 V。此时器件开始开关，器件的供电 电流再由偏置供电经过R19提供。二极管D5隔离BP引脚和C8，以防止启动时间由于对C9 和C11的充电而延长。 建议使用外部偏置供电（通过D5和R19），以实现最低的器件功耗、最高的效率和更佳的 调光性能。 电容C8同时用来选择输出功率模式，选择100 μF用于减功率模式，可以将器件功耗减至最 低，降低对散热片的要求。虽然47 μF是最小建议旁路电容值，但在使用SMD陶瓷电容 时，建议采用68 μF – 100 μF / X5R的值以留出电容容差。 4.4 输出反馈 偏置绕组电压用来间接地反映输出电压的高低，而无需使用次级侧反馈元件。偏置绕组上 的电压与输出电压成比例（由偏置绕组与次级绕组之间的匝数比决定）的。 电阻R20将偏置电压转换为电流，馈入U1的FB引脚。U1中的内部引擎综合FB引脚电流、 V测引脚电流和内部漏极电流信息，提供恒定的输出电流，同时保持较高的输入功率 因数。 4.5 负载断开保护 本参考设计可获得防止出现意外LED负载断开（如在生产过程中）的保护。控制器将在自 动重启动模式下工作，通过限定输出电压（通过来自电感辅助绕组的反射电压、D7整流和 C12峰值滤波进行检测）防止电路板上的输出电容被损坏。驱动器会在Q4导通（从FB引脚 吸入电流）时进入自动重启动模式，同时齐纳二极管VR2设置过压限值。 4.6 过载和短路保护 样品可通过初级流限获得过载和短路保护。在短路时，初级电流开始增大，直到达到限流 点。请参见短路波形以获得详细信息。 第11页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 5 PCB布局轮廓 Figure 5 – Top Printed Circuit Layout. Figure 6 – Bottom Printed Circuit Layout. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第12页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 6 物料清单(BOM) The table below is the reference design BOM. Item Qty Ref Des 2 1 C1 Description 1000 V, 0.8 A, Bridge Rectifier, SMD, MBS-1, 4-SOIC 220 nF, 275 VAC, Film, X2 1 1 BR1 3 1 C2 47 pF, 1000 V, Ceramic, NPO, 0805 3 1 C3 22 nF 50 V, Ceramic, X7R, 0603 4 1 C4 120 nF, 400 V, Film Mfg Part Number Manufacturer B10S-G Comchip LE224-M OKAYA VJ0805A470JXGAT5Z Vishay C1608X7R1H223K TDK ECQ-E4124KF Panasonic ECQ-E4224KF Panasonic 5 1 C5 220 nF, 400 V, Film 6 1 C6 2.2 μF, 400 V, Electrolytic, (6.3 x 11) TAB2GM2R2E110 Ltec 7 1 C7 2.2 nF, 630 V, Ceramic, X7R, 1206 C3216X7R2J222K TDK 8 1 C8 3216X5R1C105M TDK 9 1 C9 EKZE500ELL560MF11D Nippon Chemi-Con 10 1 C10 100 μF, 16 V, X5R, 1206 56 μF, 50 V, Electrolytic, Very Low ESR, 140 mΩ, (6.3 x 11) 10 nF 50 V, Ceramic, X7R, 0603 C0603C103K5RACTU Kemet 11 1 C11 100 nF, 50 V, Ceramic, X7R, 0805 CC0805KRX7R9BB104 Yageo 12 1 C12 100 nF 50 V, Ceramic, X7R, 0603 C1608X7R1H104K TDK 13 1 C13 100 pF, 200 V, Ceramic, COG, 0805 08052A101JAT2A AVX 14 2 C14 C15 330 μF, 63 V, Electrolytic, (10 x 20) EKMG630ELL331MJ20S United Chemi-con 15 1 CD95-B2GA471KYNS TDK 16 3 250 V, 0.2 A, Fast Switching, 50 ns, SOD-323 BAV21WS-7-F Diodes, Inc. 17 1 CY1 D1 D6 D7 D2 400 V, 1 A, DIODE SUP FAST 1A PWRDI 123 DFLU1400-7 Diodes, Inc. 18 1 D3 DIODE ULTRA FAST, SW 600 V, 1 A, SMA US1J-13-F Diodes, Inc. 19 1 D4 DIODE ULTRA FAST, SW, 200 V, 1 A, SMA US1D-13-F Diodes, Inc. 20 1 D5 BAV16WS-7-F Diodes, Inc. 21 1 D8 BYW29-200G On Semi 22 1 F1 75 V, 0.15 A, Switching, SOD-323 200 V, 8 A, Ultrafast Recovery, 25 ns, TO220AC 5 A, 250 V, Fast, Microfuse, Axial 23 1 L1 Custom, RM5, Vertical, 6 pins 24 1 L2 25 1 Q1 36 1 Q2 26 1 Q3 27 1 28 4 510 Ω, 5%, 1 W, Thick Film, 2512 470 pF, 250 VAC, Film, X1Y1 0263005.MXL Littlefuse SNX-R1688 Santronics USA 5 mH, 0.5 A, Common Mode Choke Vertical SU9VF-05050 Tokin PNP, Small Signal BJT, 40 V, 0.2 A, SOT-23 NPN, Small Signal BJT, GP SS, 40 V, 0.6 A, SOT-23 400 V, 3.1 A,N-Channel, TO-251AA MMBT3906LT1G On Semi MMBT4401LT1G Diodes, Inc. IRFU320PBF Vishay NPN, Small Signal BJT, 40 V, 0.2 A, SOT-23 MMBT3904LT1G On Semi ERJ-1TYJ511U Panasonic 12 kΩ, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ123V Panasonic 1 MΩ, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ105V Panasonic 29 1 Q4 R1 R2 R27 R28 R3 30 2 R4 R5 31 1 R6 2.4 MΩ, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ245V Panasonic 32 1 R7 162 k, 1%, 1/4 W, Thick Film, 1206 ERJ-8ENF1623V Panasonic 33 1 R8 162 k, 1%, 1/4 W, Thick Film, 1206 ERJ-8ENF1623V Panasonic 34 1 R9 30.1 k, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF3012V Panasonic 35 1 R10 15 Ω, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ150V Panasonic 36 1 R11 240 Ω, 5%, 2 W, Metal Oxide RSF200JB-240R Yageo 37 1 R12 47 kΩ, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ473V Panasonic 38 1 R13 510 kΩ, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ514V Panasonic 39 2 R14 R15 2.0 MΩ, 1%, 1/4 W, Thick Film, 1206 ERJ-8ENF2004V Panasonic 40 1 R17 200 kΩ, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ204V Panasonic 第13页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Item Qty Ref Des Description Mfg Part Number Manufacturer 41 1 R18 24.9 kΩ, 1%, 1/16 W, Thick Film, 0603 ERJ-3EKF2492V Panasonic 42 1 R19 6.2 kΩ, 5%, 1/4 W, Thick Film, 1206 ERJ-8GEYJ622V Panasonic 43 1 R20 133 kΩ, 1%, 1/8 W, Thick Film, 0805 ERJ-6ENF1333V Panasonic 44 1 R21 20 kΩ, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ203V Panasonic 45 1 R22 39 Ω, 5%, 1/8 W, Thick Film, 0805 ERJ-6GEYJ390V Panasonic 46 1 R23 10 Ω, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ100V Panasonic 47 1 R24 1 kΩ, 5%, 1/10 W, Thick Film, 0603 ERJ-3GEYJ102V Panasonic ERJ-8GEYJ300V Panasonic ERJ-8GEYJ752V Panasonic V130LA20AP Littlefuse SNX-R1689 Santronics USA LYT4324E Power Integrations 48 1 R25 30 Ω, 5%, 1/4 W, Thick Film, 1206 49 1 R26 7.5 kΩ, 5%, 1/4 W, Thick Film, 1206 50 1 RV1 51 1 T1 52 1 U1 250 V, 21 J, 7 mm, RADIAL LA Custom, RM7/I, Vertical, 8 pins with mtg clip CLI/P-RM7 LYTSwitch-4, eSIP-7C 53 1 VR1 15 V, 5%, 500 mW, DO-35 54 1 VR2 33 V, 5%, 200 mW, SOD-323 55 1 VR4 200 V, 400 W, SMA 1N5245B-T Diodes, Inc. MMSZ5257BS-7-F Diodes, Inc. SMAJ200A-13-F Diodes, Inc. Custom Custom CLP212SG Aavid Thermalloy TFT20-NT Custom Cut Mechanical BOM 1 1 2 1 3 6 HS1 POWER CLIP1 Insulation Tubing Heat sink, Custom, Al, 3003, 0.062" Thk Heat sink Hardware, Edge Clip 21N (4.7 lbs) 10 mm L x 7 mm W x 0.5 mm H 15 mm; PTTFE AWG #20 TW Tubing Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第14页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 7 变压器(T1)规格 7.1 电气原理图 Figure 7 – Transformer Electrical Diagram. 7.2 电气规格 Primary Inductance Pins 1-7, all other windings open, measured at 100 kHz, 0.4 VRMS. 1 mH ±7% Resonant Frequency Pins 1-7, all other windings open. 1000 kHz (Min.) 7.3 材料 Item [1] [2] [3] [4] [5] [6] [7] [8] [9] Description Core: RM7; 3F3. Bobbin: Rm-7; 4/4 pin vertical. Clip: EPCOS, KlammerRM7, Manufacture P/N: B65820B2001X. Magnet Wire: #33 AWG, double coated. Magnet Wire: #26 TIW, triple insulated. Magnet Wire: #34 AWG, double coated. Tape: 3M 1298 Polyester Film, 7.0.mm wide, 2.0 mil thick or equivalent. Tape: 3M 1298 Polyester Film, 18.0.mm x 30.0.mm, 2.0.mil thick or equivalent. Varnish: Dolph BC-359, or equivalent. 第15页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 7.4 25-Sep-13 结构图 Figure 8 – Transformer Build Diagram. 7.5 绕制 Winding Preparation Note: pin-out of bobbin is designated as in picture below. Place the bobbin item [1] on the mandrel with the pin side is on the left. Winding direction is clockwise direction. st Winding 1 Start at pin 7, wind 31 turns of wire item [4] from left to right for the 1 layer and place 1 layer of tape item [6]. Continue winding another 31 turns for the nd 2 layer, from right to left and also place 1 layer of tape item [7]. Then wind 26 rd turns for the 3 layer from left to right, at the last turn bring the wire back to the left and terminate at pin 1. Insulation Place 1 layer of tape item [7]. Winding 2 Use wire item [5], leave ~ 25 mm floating and place a piece of small tape to mark it as start lead FL1. Wind 32 turns of wire in 3 layers and 3 turns on the th 4 layer on the right side of bobbin, at the last turn bring the wire back to the left and also leave ~ 25 mm floating as end lead FL2. Insulation Place 1 layer of tape item [7]. Winding 3 Now wind 25 turns of wire item [6] on the left section of 4 layer from winding 2, start at pin 6 and end with pin 8. Insulation Place 2 layers of tape item [7] to secure windings. th Final Assembly Grind core halves item [2] to get 1 mH and secure with clips item [3] Cut short FL1 to 24 mm and FL2 to 12 mm. Cut ground lead of clip item [3] on the left side of core halves, see picture below. Prepare tape item [8]. Wrap 2 layers of tape item [8] on the left side of core halves for insulation. Varnish with item [9]. Cut pin number 2, 3 and 5. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第16页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 9 – Transformer Assembly Illustration. 第17页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 8 差模电感(L1)规格 8.1 结构图 Figure 10 – Inductor Electrical Diagram. 8.2 电气规格 Primary Inductance 8.3 Pins 1-2, all other windings open, measured at 100 kHz, 0.4 VRMS. 240 μH ±10% 材料 Item [1] [2] [3] [4] [5] Description Core: RM5 (3/3); N87. Bobbin: RM-5; 3/3 pin vertical. Magnet Wire: #35 AWG. Tape: 3M 1298 Polyester Film, 4.8 mm wide, 2.0 mil thick or equivalent. Varnish: Dolph BC-359, or equivalent. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第18页（共62页） 25-Sep-13 8.4 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 结构图 Figure 11 – Inductor Build Diagram. 8.5 绕制 Winding Preparation Note: pin-out of bobbin is designated as in picture below. Place the bobbin item [1] on the mandrel with the pin side is on the left. Winding direction is clockwise direction. Winding 1 Start at pin 2, wind 150 turns of wire item [3] continuously then terminate at pin 1. Insulation Place 3 layer of tape item [4]. Winding 2 Start at pin 4, wind 150 turns of wire item [3] continuously then terminate at pin 3. Insulation Place 2 layers of tape item [4] to secure windings. Final Assembly 第19页（共62页） Grind core halves item [2] to get 1 mH and secure with clips. Varnish with item [5]. Cut pin 5 and 6. Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 9 U1散热片 9.1 U1散热片加工图 Figure 12 – U1 Heat Sink Fabrication Drawing. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第20页（共62页） 25-Sep-13 9.2 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 U1散热片装配图 Figure 13 – U1 Heat Sink Assembly Drawing. 第21页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 9.3 25-Sep-13 散热片和U1装配图 Figure 14 – Heat Sink and U1 Assembly Drawing. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第22页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 10 变压器设计表格 ACDC_LYTSwitch4_HL_062013; Rev.1.0; INPUT INFO Copyright Power Integrations 2013 ENTER APPLICATION VARIABLES Dimming required OUTPUT YES YES VACMIN 185 VACMAX fL VO 36 VO_MAX VO_MIN V_OVP IO 0.55 PO n VB ENTER LYTSwitch VARIABLES LYTSwitch Auto 185 265 50 36 39.6 32.4 42.47 0.55 19.8 0.8 25 Current Limit Mode ILIMITMIN ILIMITMAX fS fSmin fSmax IV RV RV2 IFB RFB1 VDS RED UNIT LYTSwitch-4_HL_062013: Flyback Transformer Design Spreadsheet V V Hz V V V V A W DER-396 Select 'YES' option if dimming is required. Otherwise select 'NO'. Minimum AC Input Voltage Maximum AC input voltage AC Mains Frequency Typical output voltage of LED string at full load Maximum expected LED string Voltage. Minimum expected LED string Voltage. Over-voltage protection setpoint Typical full load LED current Output Power Estimated efficiency of operation Bias Voltage V LYT4324 RED 0.95 1.11 132000 124000 140000 80.56727984 4 1E+12 178 123.5955056 10 A A Hz Hz Hz uA M-ohms M-ohms uA k-ohms V VD 0.5 V VDB Key Design Parameters 0.7 V KP 178 0.7 0.7 LP 998.2376383 VOR 92 92 Expected IO (average) 0.547777905 KP_VNOM 0.666138709 TON_MIN 1.493186757 PCLAMP 0.159394306 ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type RM7 RM7 Custom Core RM7 AE 0.45 0.45 LE 3 3 AL 2500 2500 BW 6.9 6.9 M 第23页（共62页） 0 uH V A us W cm^2 cm nH/T^2 mm mm Selected LYTSwitch Select "RED" for reduced Current Limit mode or "FULL" for Full current limit mode Minimum current limit Maximum current limit Switching Frequency Minimum Switching Frequency Maximum Switching Frequency V pin current Upper V pin resistor Lower V pin resistor FB pin current (85 uA < IFB < 210 uA) FB pin resistor LYTSwitch on-state Drain to Source Voltage Output Winding Diode Forward Voltage Drop (0.5 V for Schottky and 0.8 V for PN diode) Bias Winding Diode Forward Voltage Drop Ripple to Peak Current Ratio (For PF > 0.9, 0.4 < KP < 0.9) Primary Inductance Reflected Output Voltage. Expected Average Output Current Expected ripple current ratio at VACNOM Minimum on time at maximum AC input voltage Estimated dissipation in primary clamp Select Core Size Enter Custom core part number (if applicable) Core Effective Cross Sectional Area Core Effective Path Length Ungapped Core Effective Inductance Bobbin Physical Winding Width Safety Margin Width (Half the Primary to Secondary Creepage Distance) Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 L 4 4 NS 35 35 DC INPUT VOLTAGE PARAMETERS VMIN 261.629509 VMAX 374.766594 CURRENT WAVEFORM SHAPE PARAMETERS DMAX 0.267730208 IAVG 0.119116476 A IP 0.826177997 A IRMS 0.231970815 A TRANSFORMER PRIMARY DESIGN PARAMETERS LP 998.2376383 LP_TOL 10 10 NP 88.21917808 NB 24.64383562 ALG 128.2649294 BM 2077.457006 BP 2791.138572 25-Sep-13 Number of Primary Layers Number of Secondary Turns V V Peak input voltage at VACMIN Peak input voltage at VACMAX Minimum duty cycle at peak of VACMIN Average Primary Current Peak Primary Current (calculated at minimum input voltage VACMIN) Primary RMS Current (calculated at minimum input voltage VACMIN) Primary Inductance Tolerance of primary inductance Primary Winding Number of Turns Bias Winding Number of Turns nH/T^2 Gapped Core Effective Inductance Gauss Maximum Flux Density at PO, VMIN (BM<3100) Gauss Peak Flux Density (BP<3700) AC Flux Density for Core Loss Curves (0.5 X Peak BAC 727.109952 Gauss to Peak) ur 1326.288091 Relative Permeability of Ungapped Core LG 0.418255474 mm Gap Length (Lg > 0.1 mm) BWE 27.6 mm Effective Bobbin Width Maximum Primary Wire Diameter including OD 0.312857143 mm insulation Estimated Total Insulation Thickness (= 2 * film INS 0.053423557 mm thickness) DIA 0.259433586 mm Bare conductor diameter Primary Wire Gauge (Rounded to next smaller AWG 30 AWG standard AWG value) CM 101.5936673 Cmils Bare conductor effective area in circular mils Primary Winding Current Capacity (200 < CMA < CMA 437.9588334 Cmils/Amp 600) TRANSFORMER SECONDARY DESIGN PARAMETERS (SINGLE OUTPUT EQUIVALENT) Lumped parameters ISP 2.082421254 A Peak Secondary Current ISRMS 0.884132667 A Secondary RMS Current IRIPPLE 0.692235923 A Output Capacitor RMS Ripple Current CMS 176.8265334 Cmils Secondary Bare Conductor minimum circular mils Secondary Wire Gauge (Rounded up to next larger AWGS 27 AWG standard AWG value) DIAS 0.362522298 mm Secondary Minimum Bare Conductor Diameter Secondary Maximum Outside Diameter for Triple ODS 0.197142857 mm Insulated Wire VOLTAGE STRESS PARAMETERS Estimated Maximum Drain Voltage assuming VDRAIN 566.5923475 V maximum LED string voltage (Includes Effect of Leakage Inductance) Output Rectifier Maximum Peak Inverse Voltage PIVS 191.1564827 V (calculated at VOVP, excludes leakage inductance spike) Bias Rectifier Maximum Peak Inverse Voltage PIVB 134.1846154 V (calculated at VOVP, excludes leakage inductance spike) FINE TUNING (Enter measured values from prototype) V pin Resistor Fine Tuning RV1 4 M-ohms Upper V Pin Resistor Value Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com uH 第24页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 RV2 VAC1 VAC2 IO_VAC1 IO_VAC2 RV1 (new) RV2 (new) 1E+12 115 230 0.55 0.55 4.000604137 20911.63067 M-ohms V V A A M-ohms M-ohms V_OV 319.5673531 V V_UV 66.34665276 V FB pin resistor Fine Tuning RFB1 133 RFB2 VB1 VB2 IO1 IO2 RFB1 (new) RFB2(new) Input Current Harmonic Analysis 133 1E+12 22.46520548 27.53479452 0.55 0.55 133 1E+12 k-ohms k-ohms V V A A k-ohms k-ohms Harmonic Max Current (mA) Limit (mA) 3rd Harmonic 20.69736113 1666.17 5th Harmonic 9.233940611 931.095 7th Harmonic 5.592928806 490.05 9th Harmonic 3.956638292 245.025 11th Harmonic 2.979917621 171.5175 13th Harmonic 2.264929473 145.103805 15th Harmonic 1.69769565 125.74683 THD 23.53869833 % Lower V Pin Resistor Value Test Input Voltage Condition1 Test Input Voltage Condition2 Measured Output Current at VAC1 Measured Output Current at VAC2 New RV1 New RV2 Typical AC input voltage at which OV shutdown will be triggered Typical AC input voltage beyond which power supply can startup Upper FB Pin Resistor Value Lower FB Pin Resistor Value Test Bias Voltage Condition1 Test Bias Voltage Condition2 Measured Output Current at Vb1 Measured Output Current at Vb2 New RFB1 New RFB2 1st Harmonic PASS. 3rd Harmonic current content is lower than the limit PASS. 5th Harmonic current content is lower than the limit PASS. 7th Harmonic current content is lower than the limit PASS. 9th Harmonic current content is lower than the limit PASS. 11th Harmonic current content is lower than the limit PASS. 13th Harmonic current content is lower than the limit PASS. 15th Harmonic current content is lower than the limit Estimated total Harmonic Distortion (THD) Table 1 – Sample Spreadsheet Calculation. 第25页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 11 性能数据 All measurements performed at 25 ºC room temperature, 60 Hz input frequency unless otherwise specified. Input VAC Freq (VRMS) (Hz) VIN (VRMS) Input Measurement IIN PIN PF (mARMS) (W) %ATHD LED Load Measurement VOUT IOUT POUT (VDC) (mADC) (W) Efficiency (%) 185 50 184.85 140.39 24.969 0.962 15.62 39.1500 547.700 21.540 86.27 200 50 199.85 131.37 24.997 0.952 16.49 39.1100 549.800 21.610 86.45 220 50 219.90 121.59 25.016 0.936 17.59 39.0800 551.000 21.620 86.42 230 50 229.85 117.51 25.020 0.926 17.91 39.0500 551.000 21.610 86.37 240 50 239.88 113.83 25.028 0.917 18.01 39.0300 551.000 21.590 86.26 265 50 264.92 106.00 24.935 0.888 18.04 38.9900 547.000 21.410 85.86 185 50 184.84 130.63 23.130 0.958 15.76 35.9000 552.000 19.910 86.08 200 50 199.85 122.72 23.227 0.947 16.46 35.8900 555.000 20.030 86.24 220 50 219.91 114.31 23.363 0.929 17.27 35.8900 558.000 20.150 86.25 230 50 229.85 110.76 23.412 0.920 17.44 35.8900 559.000 20.170 86.15 240 50 239.88 107.35 23.399 0.909 17.55 35.8800 558.000 20.130 86.03 265 50 264.92 100.60 23.399 0.878 17.49 35.8600 556.000 20.030 85.60 185 50 184.85 122.49 21.580 0.953 16.09 33.2300 555.000 18.570 86.05 200 50 199.86 115.48 21.724 0.941 16.6 33.2100 560.000 18.720 86.17 220 50 219.91 107.91 21.887 0.922 17.17 33.1900 564.000 18.850 86.12 230 50 229.85 104.54 21.898 0.911 17.31 33.1700 564.000 18.840 86.04 240 50 239.89 101.58 21.922 0.900 17.27 33.1400 565.000 18.830 85.90 265 50 264.93 95.77 21.991 0.867 17.11 33.1200 564.000 18.790 85.44 Table 2 – Test Result Summary for this Design. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第26页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 11.1 带载模式效率 87.1 39 VDC Output 36 VDC Output 33 VDC Output 86.8 Efficiency (%) 86.5 86.2 85.9 85.6 85.3 85.0 175 185 195 205 215 225 235 245 255 265 AC Input Voltage (VRMS / 50Hz) Figure 15 – Efficiency with Respect to AC Input Voltage. 第27页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 275 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 11.2 线电压调整 10 33 VDC Output 36 VDC Output 8 39 VDC Output 6 Regulation (%) 4 2 0 -2 -4 -6 -8 -10 175 185 195 205 215 225 235 245 255 265 275 AC Input Voltage (VRMS / 50Hz) Figure 16 – Line Regulation, Room Temperature. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第28页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 11.3 功率因数 1.00 39 VDC Output 36 VDC Output 33 VDC Output 0.98 Power Factor (PF) 0.96 0.94 0.92 0.90 0.88 0.86 0.84 0.82 0.80 175 185 195 205 215 225 235 245 255 265 AC Input Voltage (VRMS / 50 Hz) Figure 17 – High Power Factor within the Operating Range. 第29页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 275 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 11.4 %THD 35 33 VDC Output 36 VDC Output 39 VDC Output 30 THD (%) 25 20 15 10 5 0 175 185 195 205 215 225 235 245 255 265 275 AC Input Voltage (VRMS / 50 Hz) Figure 18 – Very Low %ATHD. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第30页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 11.5 谐波含量 90 Limit 36 VDC Output 80 Harmonic Content (mA) 70 60 50 40 30 20 10 0 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Harmonic Order Figure 19 – Meets EN61000-3-2 Harmonics Contents Standards for <25 W Rating for 36 V LED Output. 第31页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 11.6 谐波测量 VAC (VRMS) 230 nth Order 1 2 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 Freq (Hz) 50.00 mA Content 109.04 0.02 14.21 8.15 5.16 4.75 3.34 3.24 2.14 2.15 1.36 1.39 0.96 0.96 0.87 0.81 0.83 0.76 0.83 0.70 0.78 0.59 0.68 0.50 0.64 0.44 I (mA) P PF 110.76 % Content 23.4120 Limit (mA) <25 W 0.9197 0.02% 13.03% 7.47% 4.73% 4.36% 3.06% 2.97% 1.96% 1.97% 1.25% 1.27% 0.88% 0.88% 0.80% 0.74% 0.76% 0.70% 0.76% 0.64% 0.72% 0.54% 0.62% 0.46% 0.59% 0.40% 79.6008 44.4828 23.4120 11.7060 8.1942 6.9336 6.0091 5.3021 4.7440 4.2922 3.9190 3.6054 3.3384 3.1081 2.9076 2.7314 2.5753 2.4361 2.3112 Remarks 27.59% 10.00% 7.00% 5.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% 3.00% Table 3 – 230 VAC Input Current Harmonic Measurement for 36 V LED. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第32页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 11.7 调光特性 The dimming characteristic was taken from a controlled AC supply to emulate the TRIAC conduction pattern. The reference design meets the dimming requirement as set by National Electrical Manufacturers Association (NEMA) Standards Publication SSL 1-2010 (Electronic Drivers for LED Devices, Arrays or Systems) and SSL 6-2010(Solid Light Lighting for Incandescent Replacement-Dimming). 700 Dim to Full Brightness NEMA Light Output Upper Limit NEMA Light Output Lower Limit 600 Output Current (A) 500 400 300 200 100 0 0 20 40 60 80 100 120 140 160 Phase Angle Conduction (º) 第33页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 180 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 600 180-0 LYT4324E 0-180 LYT4324E Output Current (mA) 500 400 300 200 100 0 0 20 40 60 80 100 120 140 160 180 Conduction Angle (θ) Figure 20 – Dimming Curve Characteristic From Full Dim to Full Brightness. Meets NEMA SSL 6-2010. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第34页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 600 Full Brightness to Dim 400 300 200 100 0 240 220 200 180 160 140 120 100 80 60 40 20 0 Effective RMS Input Voltage During Dimming (VAC) Figure 21 – Dimming Characteristic with Respect to RMS Input Voltage During Dimming. 第35页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com Output Current (A) 500 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 11.8 参考设计与调光器的兼容性 These are the list of dimmers verified for this reference design. Users are not limited on the following list. Make sure to test the dimmers according to its recommended operating line input frequency to avoid flicker. Dimmer Origin Part Number China China China China China China China China Korea Korea Korea Korea Germany Germany Germany Germany Germany Germany Germany Germany Germany Germany TCL 630 W Sen Bo Lang Eba Huang SB elect 600 W Myongbo KBE 650 W Clipmei Mank 200 W Anam 500 W Shin Sung Fantasia 500 W Shin Sung 2 Rev 300 W Busch 2250 600 W PEHA 400 W Merten 572499 400 W Busch 6513 420 W Berker 2875 600 W Ove Busch 691 U-101 Busch 6513 U-102 Peha 433AB Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com IMIN (mA) 147.4 189.4 35.9 1.3 191.4 0.6 147.2 202.8 191.0 177.6 185.0 158.2 0.1 107.1 1.5 77.5 109.7 123.5 113.4 106.4 107.8 174.1 IMAX (mA) 556.0 555.0 556.0 545.5 558.0 555.5 556.0 557.0 551.0 552.0 549.4 552.0 537.6 542.4 505.2 550.0 546.5 532.9 503.9 529.2 546.0 534.5 Dim Ratio 4 3 15 420 3 926 4 3 3 3 3 3 5376 5 337 7 5 4 4 5 5 3 第36页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 12 热性能 The scan is conducted at ambient temperature of 25 ºC open frame, 185 VAC / 50 Hz input. Figure 22 – Open Frame Thermal Scan Legend: Sp1 – Output Capacitor C14 Sp2 – Output Capacitor C15 Sp3 – Common Mode Inductor L2 Sp4 – Damper MOSFET Q3 Sp5 – Transformer T1. Sp6 – Output Diode D8 Sp7 – Differential Inductor L1 Figure 23 – U1 LNK4314E Device Temperature. 第37页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 24 – Bottom Side Board Temperature at Open Frame. Legend: Sp1 – Bridge Rectifier BR1 Sp2 – Blocking Diode D4 Sp3 – Snubber Diode D3 Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第38页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 13 波形 13.1 漏极电压和电流，正常工作 No saturation in the inductor and designed guaranteed to work in continuous mode within the operating input voltage. Figure 25 – 185 VAC / 50 Hz, 36 V LED String. Ch2: VDRAIN, 200 V / div. Ch3: IDRAIN, 0.2 A / div. Time Scale: 2 ms / div. Zoom Time Scale: 2 μs / div. Figure 26 – 265 VAC / 50 Hz, 36 V LED String. Ch2: VDRAIN, 200 V / div. Ch3: IDRAIN, 0.2 A / div. Time Scale: 2 ms / div. Zoom Time Scale: 2 μs / div. 13.2 漏极电压和电流启动特征 Device has a built in soft start thereby reducing the stress in the device, transformer and output diode . Figure 27 – 185 VAC / 50 Hz, 36 V LED String. Ch2: VDRAIN, 200 V / div. Ch4: IDRAIN, 0.2 A / div. Time Scale: 10 ms / div. Zoom Time Scale: 10 μs / div. 第39页（共62页） Figure 28 – 265 VAC / 50 Hz, 36 V LED String. Ch2: VDRAIN, 200 V / div. Ch4: IDRAIN, 0.2 A / div. Time Scale: 10 ms / div. Zoom Time Scale: 10 μs / div. Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 13.3 输出电压启动特征 Start-up time <250 ms; the reference design will emit light within 250 ms at non-dimming operation. Figure 29 – 185 VAC / 50 Hz, 36 V LED Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 100 ms / div. Figure 30 – 265 VAC / 50 Hz, 36 V LED Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 100 ms / div. 13.4 输入与输出电压和电流的波形 Output current ripple is inversely proportional to the impedance of the LED. Verify the actual current ripple on the actual LED to be used in the system. Increase output capacitance for lesser output current ripple is intended. Figure 31 – 185 VAC / 50 Hz, 36 V LED String. Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 10 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com Figure 32 – 220 VAC / 50 Hz, 36 V LED String. Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 10 ms / div. 第40页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 33 – 240 VAC / 50 Hz, 36 V LED String. Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 10 ms / div. Figure 34 – 265 VAC / 50 Hz, 36 V LED String. Ch1: VIN, 200 V / div. Ch2: VOUT, 10 V / div. Ch3: IIN, 200 mA / div. Ch4: IOUT, 200 mA / div., 10 ms / div. 13.5 漏极电压和电流波形：正常工作到输出短路 No saturation in the inductor during short-circuit, inductor current is limited by the ILIM. Figure 35 – 185 VAC / 50 Hz, Normal Operation then Output Short. Ch1: VOUT, 20 V / div. Ch2: VDS, 200 V / div. Ch4: IDRAIN, 0.5 A / div., 10 ms / div. Z3: IDRAIN, 0.2 A / div., 5 μs / div. 第41页（共62页） Figure 36 – 265 VAC / 50 Hz, Normal Operation then Output Short. Ch1: VOUT, 20 V / div. Ch2: VDS, 200 V / div. Ch4: IDRAIN, 0.5 A / div., 10 ms / div. Z3: IDRAIN, 0.2 A / div., 5 μs / div. Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 13.6 漏极电压和电流波形：输出短路时启动 No saturation in the inductor during start-up short-circuit due to the built-in soft-start. Figure 37 – 185 VAC / 50 Hz, Output Shorted. Ch1: VDS, 20 V / div. Ch3: IDRAIN, 0.2 A / div., 10 ms / div. Z3: IDRAIN, 0.2 A / div., 10 μs / div. Figure 38 – 265 VAC / 50 Hz, Output Shorted. Ch1: VDS, 20 V / div. Ch3: IDRAIN, 0.2 A / div., 10 ms / div. Z3: IDRAIN, 0.2 A / div., 10 μs / div.. 13.7 空载工作 The driver is protected during no-load operation, U1 operating is cycle skipping mode. Figure 39 – 185 VAC / 50 Hz, Start-up No-load. Ch2: VOUT, 10 V / div. Ch3: IDS, 0.1 A / div. Time Scale: 2 s / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com Figure 40 – 265 VAC / 50 Hz, Start-up No-load. Ch2: VOUT, 10 V / div. Ch3: IDS, 0.1 A / div. Time Scale: 2 s / div. 第42页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 13.8 交流电循环上电 The reference design has no perceptible delay. Figure 41 – 240 VAC / 50 Hz, 300 ms On – 300 ms Off. Load: 36 V LED String. Ch1: VIN, 200 V / div. Ch4: IOUT, 100 mA / div. Time Scale: 1 s / div. Figure 42 – 240 VAC / 50 Hz, 500 ms On – 500 ms Off. Load: 36 V LED String. Ch1: VIN, 200 V / div. Ch4: IOUT, 100 mA / div. Time Scale: 1 s / div. Figure 43 – 240 VAC / 50 Hz, 1s On – 1s Off. Load: 36 V LED String. Ch1: VIN, 200 V / div. Ch4: IOUT, 100 mA / div. Time Scale: 1 s / div. Figure 44 – 240 VAC / 50 Hz, 2s On – 2s Off. Load: 36 V LED String. Ch1: VIN, 200 V / div. Ch4: IOUT, 100 mA / div. Time Scale: 1 s / div. 第43页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 13.9 调光波形 Figure 45 – 240 VAC / 50 Hz, (China) TCL 630 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 46 – 240 VAC / 50 Hz, (China) TCL 630 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 47 – 240 VAC / 50 Hz, (China) Sen Bo Lang 300 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 48 – 240 VAC / 50 Hz, (China) Sen Bo Lang 300 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第44页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 49 – 240 VAC / 50 Hz, (China) Eba Huang Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 51 – 240 VAC / 50 Hz, (China) SB elect 600 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第45页（共62页） Figure 50 – 240 VAC / 50 Hz, (China) Eba Huang Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 52 – 240 VAC / 50 Hz, (China) SB elect 600 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 53 – 240 VAC / 50 Hz, (China) Myongbo Dimmer at Full TRIAC conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 54 – 240 VAC / 50 Hz, (China) Myongbo Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 55 – 240 VAC / 50 Hz, (China) KBE, 650 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 56 – 240 VAC / 50 Hz, (China) KBE, 650 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第46页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 57 – 240 VAC / 50 Hz, (China) Clipmei Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 58 – 240 VAC / 50 Hz, (China) Clipmei Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 59 – 240 VAC / 50 Hz, (China) Mank 200 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 60 – 240 VAC / 50 Hz, (China) Mank 200 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第47页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 61 – 240 VAC / 50 Hz, (Korea) Anam, 500 W Dimmer at full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 62 – 240 VAC / 50 Hz, (Korea) Anam, 500 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 63 – 240 VAC / 50 Hz, (Korea) Shin Sung Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 64 – 240 VAC / 50 Hz, (Korea) Shin Sung Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第48页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 65 – 240 VAC / 50 Hz, (Korea) Fantasia 500 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 66 – 240 VAC / 50 Hz, (Korea) Fantasia 500 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 67 – 240 VAC / 50 Hz, (Korea) Shin Sung 2 Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 68 – 240 VAC / 50 Hz, (Korea) Shin Sung 2 Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第49页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 69 – 240 VAC / 50 Hz, (Germany) Rev 300 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 71 – 240 VAC / 50 Hz, (Germany) Busch 2250 600 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 25-Sep-13 Figure 70 – 240 VAC / 50 Hz, (Germany) Rev 300 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 72 – 240 VAC / 50 Hz, (Germany) Busch 2250 600 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第50页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 73 – 240 VAC / 50 Hz, (Germany) PEHA 400 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 74 – 240 VAC / 50 Hz, (Germany) PEHA 400 W Dimmer at Minimum TRIAC conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 75 – 240 VAC / 50 Hz, (Germany) Merten 572499, 400 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 76 – 240 VAC / 50 Hz, (Germany) Merten 572499, 400 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第51页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 77 – 240 VAC / 50 Hz, (Germany) Busch 6513, 420 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 78 – 240 VAC / 50 Hz, (Germany) Busch 6513, 420 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 79 – 240 VAC / 50 Hz, (Germany) Berker 2875, 600 W Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 80 – 240 VAC / 50 Hz, (Germany) Berker 2875, 600 W Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第52页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 81 – 240 VAC / 50 Hz, (Germany) Ove Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 82 – 240 VAC / 50 Hz, (Germany) Ove Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 83 – 240 VAC / 50 Hz, (Germany) Busch 691 U-101 Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 84 – 240 VAC / 50 Hz, (Germany) Busch 691 U-101 Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第53页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 Figure 85 – 240 VAC / 50 Hz, (Germany) Busch 6513 U102 Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 86 – 240 VAC / 50 Hz, (Germany) Busch 6513 U102 Dimmer at minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 87 – 240 VAC / 50 Hz, (Germany) PEHA 433AB Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Figure 88 – 240 VAC / 50 Hz, (Germany) PEHA 433AB Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第54页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Figure 89 – 240 VAC / 50 Hz, (Germany) PEHA 433AB oA Dimmer at Full TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. 第55页（共62页） Figure 90 – 240 VAC / 50 Hz, (Germany) PEHA 433AB oA Dimmer at Minimum TRIAC Conduction. Load: 36 V LED String. Ch2: VIN, 200 V / div. Ch3: IIN, 100 mA / div. Ch4: IOUT, 100 mA / div. Time Scale: 5 ms / div. Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 13.10 输入浪涌波形 13.10.1 差模输入浪涌 Figure 91 – 265 VAC / 60 Hz, 36 V Load, VDS = 591 VPK (+) 500 V Diff. Line Surge at 90º. Ch1: VDS, 200 V / div. Ch2: IIN, 500 mA / div. Time Scale: 1 μs / div. 13.10.2 Figure 92 – 265 VAC / 50 Hz, 36 V Load, VDS = 611 VPK (+) 500 V Diff. Line Surge at 270º. Ch1: VBULK, 100 V / div. Ch2: VDS, 200 V / div. Time Scale: 200 μs / div. Zoom Time Scale: 20 μs / div. 差模振铃浪涌 Figure 93 – 230 VAC / 60 Hz, 36 V Load, VDS = 572 VPK (+) 500 V Differential Ring Surge at 90º. Ch1: VDS, 200 V / div. Ch2: VBULK, 200 V / div. Zoom Time Scale: 5 μs / div. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com Figure 94 – 230 VAC / 60 Hz, 36 V Load, VDS = 565 VPK (+) 500 V Differential Ring Surge at 0º. Ch1: VDS, 200 V / div. Ch2: VBULK, 200 V / div. Zoom Time Scale: 5 μs / div. 第56页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 14 输入浪涌 Input voltage was set at 230 VAC / 60 Hz. Output was loaded with 36 V LED string and operation was verified following each surge event. Two units were verified in the following conditions. Differential input line 1.2 / 50 μs surge testing was completed on one test unit to IEC61000-4-5. Surge Level (V) +500 -500 +500 -500 Input Voltage (VAC) 120 120 120 120 Injection Location L to N L to N L to N L to N Injection Phase (°) 0 270 90 180 Test Result (Pass/Fail) Pass Pass Pass Pass Differential input line ring surge testing was completed on one test unit to IEC61000-4-5. Surge Level (V) +2500 -2500 +2500 -2500 Input Voltage (VAC) 120 120 120 120 Injection Location L to N L to N L to N L to N Injection Phase (°) 0 270 90 180 Test Result (Pass/Fail) Pass Pass Pass Pass Unit passes under all test conditions. 第57页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 15 传导EMI 15.1 设备 Receiver: Rohde & Schwartz ESPI - Test Receiver (9 kHz – 3 GHz) Model No: ESPI3 LISN: Rohde & Schwartz Two-Line-V-Network Model No: ENV216 15.2 EMI测试设置 Usually LED driver is placed in a conical metal housing (for self-ballasted lamps; CISPR15 Edition 7.2) but since lamp housing is not available during the UUT was tested then it was evaluated as shown in the figure below. Figure 95 – Conducted Emissions Measurement Set-up. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第58页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 15.3 EMI测试结果 Att 10 dB AUTO dBµV 120 EN55015Q 110 100 kHz LIMIT CHECK 1 MHz PASS 10 MHz SGL 1 QP CLRWR 100 90 2 AV CLRWR TDF 80 70 60 EN55015A 50 6DB 40 30 20 10 0 -10 -20 9 kHz 30 MHz Figure 96 – Conducted EMI, 36 V output / 550 mA Steady-State Load, 230 VAC, 60 Hz, and EN55015 Limits. 第59页（共62页） Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 Trace1: 25-Sep-13 EDIT PEAK LIST (Final Measurement Results) EN55015Q Trace2: EN55015A Trace3: --- TRACE FREQUENCY LEVEL dBµV DELTA LIMIT dB 2 Average 130.825395691 kHz 38.20 L1 gnd 1 Quasi Peak 133.454986145 kHz 64.55 L1 gnd 2 Average 133.454986145 kHz 64.29 N gnd 2 Average 136.137431366 kHz 24.88 L1 gnd 1 Quasi Peak 174.145343305 kHz 52.73 L1 gnd -12.02 2 Average 200.175581485 kHz 35.00 N gnd -18.60 1 Quasi Peak 208.303512797 kHz 50.42 L1 gnd -12.85 1 Quasi Peak 227.818484195 kHz 50.65 N gnd -11.87 1 Quasi Peak 246.694773277 kHz 50.50 L1 gnd -11.36 1 Quasi Peak 254.169871602 kHz 51.18 N gnd -10.43 2 Average 267.135089486 kHz 44.12 N gnd -7.07 2 Average 401.705024172 kHz 36.36 N gnd -11.45 1 Quasi Peak 434.988979109 kHz 45.29 L1 gnd -11.86 2 Average 667.263434405 kHz 34.06 N gnd -11.93 2 Average 798.145472681 kHz 35.73 N gnd -10.26 1 Quasi Peak 3.76891518811 MHz 42.16 L1 gnd -13.83 2 Average 3.76891518811 MHz 33.46 L1 gnd -12.53 1 Quasi Peak 4.16322710559 MHz 45.25 L1 gnd -10.74 2 Average 5.28619370567 MHz 41.89 N gnd -8.10 1 Quasi Peak 5.55584271143 MHz 46.93 N gnd -13.06 -16.50 Figure 97 – Conducted EMI, 36 V / 550 mA Steady-State Load Steady-State Load, 230 VAC, 60 Hz, and EN55015 Limits / Line and Neutral Scan Design Margin Measurement. Power Integrations, Inc. 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com 第60页（共62页） 25-Sep-13 DER-396：使用LYT4324E设计的20 W反激式LED驱动器 16 版本历史 Date 25-Sep-13 Author ME 第61页（共62页） Revision 1.0 Description and Changes Initial Release Reviewed Apps & Mktg Power Integrations 电话：+1 408 414 9200 传真：+1 408 414 9201 www.powerint.com DER-396：使用LYT4324E设计的20 W反激式LED驱动器 25-Sep-13 有关最新产品信息，请访问：www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits’ external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©Copyright 2012 Power Integrations, Inc. Power Integrations全球销售支持网络 全球总部 5245 Hellyer Avenue San Jose, CA 95138, USA. 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