LS3321 LSI 256 dot LCD micro-controller Features : * * * * * 12 Input/Output pad. Direct drive buzzer output. 3072x12 bit ROM. 176x4 bit of RAM. 32x4, x5, x6, x7 or 32x8 LCD segment. * * * * 1/4 LCD bias. 32768 Crystal/RC oscillator bonding option. Single 1.5V operation. Low cost and low price. General Description The LS3321 is a micro-controller for LCD application. It has an internal ROM size of 3Kx12bit. A 176x4 bit of RAM, 32x4, x5, x6, x7 or x8 LCD segment with 1/4 bias. It has 12 I/O (mask option) pad. It directly drive a buzzer output. The buzzer driver can also be used as general purpose I/O by mask option. The system oscillator can be R/C or 32kHz Crystal oscillator. It is suitable for timer/calendar/controller function. LSI LS3321 Functional Description 1. RC Oscillator /Crystal The LS3321 can use either a crystal oscillator or RC oscillator to provide the internal timing by bonding option. 2. Program ROM The LS3321 has internal 3Kx12 bit ROM providing simple operation. It has six internal stacks. The program ROM is page-segmented with 1K per page. To access pages higher than 1K, use the CALL instruction. The CALL instruction jumps to the address defined by ROMPAGE.jjjjjjjjjj where jjjjjjjjjj is specified in the CALL instruction. 3. Interrupt Control The LS3321 has 5 different sources of interrupt, namely, POWERUP, F4HZ, F16HZA, F16HZS and F1HZ. The starting address of the interrupt are as follow : Interrupt POWERUP F1HZ F4HZ F16HZA F16HZS Address 0x3ff 0x3fe 0x3fc 0x3f8 0x3f1 The system generates 16 interrupts for F16HZS in one second but only 11 interrupts for F16HZA. The other 5 interrupts goes to F4HZ (4) and F1HZ (1) interrupts. 4. Program RAM The system has 128x4bit of program RAM (00H to 7fH) with IO address as follows. Address 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H AH BH CH(read) CH(write) DH(write) FH(write) 10H-3FH 40H-7FH 80H-AFH Description RptrL RptrH Rptr1L Rptr1H Beep Control ROM PAGE RAM PAGE No use IOP0 IOP1 IOP2 IOP3 Timer 1 Value Timer 1 Data Timer 1 Control COM/OUTPUT (XXX0/XXX1) SYSTEM RAM DISPLAY RAM SYSTEM RAM 2 Initialize undefined undefined undefined undefined 0 0 0 0 IO[0:3] IO[4:7] IO[8:11] INP[0:3] 0 XXX0 - LSI LS3321 Address 1H:0H forms a 8bit address for indirect read/write operation for pointer read/write. Address 3H:2H forms a 8bit address for indirect read/write operation for pointer1 read/write. Indirect address is specified, for example, as rINC #op Indirect Operand (#op) #0 #1 #2 #3 Resulting address RptrH.RptrL RptrH.Rptr1L Rptr1H.RptrL Rptr1H.Rptr1L 5. Buzzer Control The system can output 4khz/2khz alarm signal by mask option. The alarm signal is enabled to the output BD[0:1] when the Beep Control Register: Bit[0] is high. 6. Timer/Counter The 3321 has a 4 bit timer/counter. It is map to address CH and DH. Address CH(read) CH(write) DH(write) Description D3 1=START 0=STOP Timer 1 Value Timer 1 Data No. use D1(tone) 1=FOSC 0=PHI12 D1(timer) 1=XINP0 0=F1HZ 3 D0 1=tone 0=buz LSI LS3321 5. LCD driver The system has 32 LCD segment pad with 2-8 common pads (by mask option) providing 32x2,3,4,5,6,7,8 LCD segment output. The LCD segment table is shown below : COMMON 1 2 3 4 5 6 7 8 SEG [1:32] 78H:D[0:3], 79H:D[0:3], 7AH:D[0:3], 7BH:D[0:3], 7CH:D[0:3], 7DH:D[0:3], 7EH:D[0:3], 7FH:D[0:3] 70H:D[0:3], 71H:D[0:3], 72H:D[0:3], 73H:D[0:3], 74H:D[0:3], 75H:D[0:3], 76H:D[0:3], 77H:D[0:3] 68H:D[0:3], 69H:D[0:3], 6AH:D[0:3], 6BH:D[0:3], 6CH:D[0:3], 6DH:D[0:3], 6EH:D[0:3], 6FH:D[0:3] 60H:D[0:3], 61H:D[0:3], 62H:D[0:3], 63H:D[0:3], 64H:D[0:3], 65H:D[0:3], 66H:D[0:3], 67H:D[0:3] 58H:D[0:3], 59H:D[0:3], 5AH:D[0:3], 5BH:D[0:3], 5CH:D[0:3], 5DH:D[0:3], 5EH:D[0:3], 5FH:D[0:3] OR (MASKING OPTION) 28H:D[0:3], 29H:D[0:3], 2AH:D[0:3], 2BH:D[0:3], 2CH:D[0:3], 2DH:D[0:3], 2EH:D[0:3], 2FH:D[0:3] 50H:D[0:3], 51H:D[0:3], 52H:D[0:3], 53H:D[0:3], 54H:D[0:3], 55H:D[0:3], 56H:D[0:3], 57H:D[0:3] 48H:D[0:3], 49H:D[0:3], 4AH:D[0:3], 4BH:D[0:3], 4CH:D[0:3], 4DH:D[0:3], 4EH:D[0:3], 4FH:D[0:3] 40H:D[0:3], 41H:D[0:3], 42H:D[0:3], 43H:D[0:3], 44H:D[0:3], 45H:D[0:3], 46H:D[0:3], 47H:D[0:3] 6. Mask option Name BZ2K/4K BZ[0], BZ[1] FSYSPRB description buzzer frequency buzzer control Power Up Control INA address 0 3 5 4 5 6 7 description Watch dog reset ROMH ROMHH/OSCON OFF OSC ON OSC OFF LCD ON LCD Address DH(write) Description D3 1=START 0=STOP D2 1=XINP0 0=F1HZ D1(tone) 1=FOSC 0=FOSC/2 D1(timer) 1=XINP0 0=F1HZ 4 D0 1=tone 0=buz LSI LS3321 • Pin Assignment DESIGNATION B [0:1] V1, V2, VP1, VP2 VEE T2, T1 OO, RO OI VDD GND I[0:11] PB C[1:8] S[1:32] TYPE DESCRIPTION OUTPUT OUTPUT OUTPUT INPUT (PL) OUTPUT INPUT POWER POWER I(PH)/O RESET OUTPUT OUTPUT Buzzer output LCD bias LCD power TEST pin RC/32KHz oscillator output 32KHz oscillator input +1.5V power supply Ground Input/output pad Low active LCD Common output LCD Segment output Note: (PL) – pull low (PH) - pull high 5 LSI LS3321 Absolute Maximum Ratings Supply voltage Vdd - Vss..........................0 to 5V Input voltage Vin.................................Vss to Vdd Operating temperature Top .............-10°C to 60°C Storing temperature Tst ...................-40°C to 70°C *Comments Stress above those listed under bsolute Maximum Ratings” may cause permanent damage to the device. These are stress rating only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to obsolute maximum rating conditions for extended periods may affect device reliability. D.C. Electrical Characteristics (GND = 0V, Vdd = 1.5V, Ta = 25°C unless otherwise specified) Parameter Supply Voltage Operating current OSC. built-in cap OSC. trimmer cap Buzzer output current LCD frequency Segment current Common current Symbol Vdd Idd Cd Ctrim Ib Flcd Is Ic Min. 1.2 5 500 0.15 3.0 6 Typ. 1.5 2 20 64 - Max. 1.8 6 35 - Unit V µA pF pF µA Hz µA µA Conditions No load Vbd-Vss=0.5 Vseg=0.2V Vcom=0.2V LSI LS3321 Pad location PAD S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 X(µ µm) 1728.0 1604.0 1480.0 1356.0 1230.0 1030.0 902.0 702.0 574.0 374.0 246.0 46.0 -82.0 -282.0 -410.0 -610.0 -738.0 -938.0 -1066.0 -1266.0 -1394.0 -1594.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 PAD Y(µ µm) -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1368.0 -1370.0 -1240.0 -1110.0 -980.0 -850.0 -720.0 -590.0 -460.0 -330.0 -200.0 V2 V1 VP1 VP2 VEE C1 C2 C3 C4 C5 C6 C7 C8 PB T1 T2 OO OI RO VDD B0 B1 GND I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 7 X(µ µm) -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1830.0 -1662.0 -1532.0 -1402.0 -1272.0 -1142.0 -982.0 -355.0 +60.0 +194.0 +434.0 +820.0 +1058.0 +1188.0 +1318.0 +1448.0 +1578.0 +1728.0 +1728.0 +1728.0 +1728.0 +1728.0 +1728.0 +1728.0 +1728.0 Y(µ µm) -70.0 +60.0 +190.0 +320.0 +450.0 +580.0 +710.0 +840.0 +970.0 +1100.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1270.0 +1219.0 +1019.0 +885.0 +685.0 +551.0 +351.0 +217.0 +17.0 LSI LS3321 Pad Location 8 LSI LS3321 APPLICATION CIRCUIT 9