A Product Line of Diodes Incorporated ZNBG4003 4 STAGE LNA BIAS CONTROLLER Description Pin Assignments The ZNBG4003 is a four stage depletion mode FET bias controller intended primarily for satellite Low Noise Block’s (LNB’s), but its also suitable for other LNA applications such as those in found in PMR’s NEW PRODUCT and microwave links. The ZNBG4003 provides each FET with a negative gate voltage and positive drain voltage with user programmable drain current. Features Top view • Four stage FET bias controller • Operating range of 4.75V to 8.0V • FET drain voltages set at 2.0V • FET drain current selectable from 0 to 15mA • Allows first and second stage FETs to be run at different (optimum) drain currents • FET drain voltages and currents stable over temperature • FETs protected against overstress during power-up and power- Bottom view down. • Internal negative supply generator allowing single supply Applications operation (available for external use) • Low external component count • Two single type Twin LNB’s • Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) • Twin LNB’s Halogen and Antimony Free. “Green” Device (Note 3) • Quad LNB’s • Notes: • Microwave links • PMR and Cellular telephone systems 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Twin Universal LNB System Diagram ZNBG4003 Document number: DS35007 Rev. 1 - 2 1 of 6 www.diodes.com June 2012 © Diodes Incorporated A Product Line of Diodes Incorporated ZNBG4003 NEW PRODUCT Device Description The ZNBG series of devices are designed to meet the bias recommended gate and drain capacitors. These ensure RF requirements of GaAs and HEMT FETs commonly used in stability and minimal injected noise. satellite receiver LNBs with a minimum of external components. It is possible to use less than the devices full complement of FET The ZNBG4003 provides four FET bias stages, arranged in two pairs of two. Resistors connected to pins RCAL1 and RCAL2 set the bias controls, unused drain and gate connections can be left open FET drain currents of each pair over the range of 0 to 15mA, To protect the external FETs the circuits have been designed to allowing input FETs to be biased for optimum noise and amplifier FETs for optimum gain. circuit without affecting operation of the remaining bias circuits. ensure that, under any conditions including power up/down transients, the gate drive from the bias circuits cannot exceed -3V. Drain voltages of all stages are set at 2.0V. The drain supplies are Additionally each stage has its own individual current limiter. current limited to approximately 5% above the operating currents Furthermore if the negative rail experiences a fault condition, such set by the Rcal resistors. as overload or short circuit, the drain supply to the FETs will shut Depletion mode FETs require a negative voltage bias supply when down avoiding excessive current flow. operated in grounded source circuits. The ZNBG4003 includes an To minimise PCB space ZNBG4003 is packaged in the 16 pin integrated switched capacitor DC-DC converter generating a 3mm x 3mm QFN package. regulated output of -2.5V to allow single supply operation. Device operating temperature is -40°C to +85°C to suit a wide These devices are unconditionally stable over the full working range of environmental conditions. temperature with the FETs in place, subject to the inclusion of the Typical Application Circuit ZNBG4003 Document number: DS35007 Rev. 1 - 2 2 of 6 www.diodes.com June 2012 © Diodes Incorporated A Product Line of Diodes Incorporated ZNBG4003 Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.) Parameter Rating NEW PRODUCT Unit Supply Voltage -0.6 to +10 V Supply Current 80 mA Power Dissipation (Note 5) 500 mW Opereating Temperature Range -40 to +85 °C Storage Temerature Range -40 to +150 °C Electrical Characteristics (@ TAMB = +25°C, VCC = 5.0V (Note 1), RCAL1 = RCAL2 = 39k (setting ID to 10mA) unless otherwise specified.) Symbol Parameter VCC Operating Voltage Range (Note 4) ICC ICC(L) VCSUB VCSUB(L) FOSC Supply Current Substrate Voltage (Note 6,7) Conditions Min Typ 4.75 Max Unit 8.0 V mA ID1 = ID2 = ID3 = ID4 = 0 1.8 4.5 ID1 = ID2 = ID3 = ID4 = 10mA 43 45 -2.65 -2.0 -2.55 -1.9 V 240 600 kHz +500 µA ICSUB = 0 -3.0 ICSUB = -100µA Oscillator Frequency 150 V Gate Characteristics Gate (G1 to G4) IG Current Range -100 VG(L) Voltage Low ID = 12mA, IG = 10µA -3.0 -2.5 -2.0 V VG(H) Voltage High ID = 8mA, IG = 0 0 0.7 1.0 V 15 mA Standard Application Circuit 8 10 12.5 mA 1.8 2.0 2.2 Drain Characteristics Drain (D1 to D4) ID Current Range ID(OP) Current Operating VD(OP) 0 Voltage Operating ID = 10mA dID/dVCC Δ ID vs VCC VCC = 5.0V to 8.0V V 1.2 %/V %/°C dID/dTOP Δ ID vs TOP TOP = -40°C to +85°C 0.09 dID/dVCC Δ VD vs VCC VCC = 5.0V to 8.0V 0.08 %/V dID/dTOP Δ VD vs TOP TOP = -40°C to +85°C 110 ppm/°C Output Noise (Note 8) VD(NOISE) Drain Voltage VG(NOISE) Gate Voltage Notes: CGRATE-GND = 10nF, CDRAIN-GND = 10nF CGRATE-GND = 10nF, CDRAIN-GND = 10nF 0.02 Vpk-pk 0.005 Vpk-pk 4. The two VCC pins are internally connected, only one of the pins needs to be powered for the device to function. See applications section for further information. 5. ESD sensitive, handling precautions are recommended. 6. The negative bias voltages are generated on-chip using an internal oscillator. Two external capacitors, CNB and CSUB of value 47nF are required for this purpose. 7. The package (QFN1633) exposed pad must either be connected to Csub or left open circuit. 8. Noise voltage measurements are made with FETs and gate and drain capacitors of value 10nF in place. Noise voltages are not measured in production. ZNBG4003 Document number: DS35007 Rev. 1 - 2 3 of 6 www.diodes.com June 2012 © Diodes Incorporated A Product Line of Diodes Incorporated ZNBG4003 Typical Characteristics (measured @ TAMB = +25°C, VCC = 5.0V) NEW PRODUCT DRAIN CURRENT (mA) 15 10 5 0 10 100 RCAL Drain Current vs. RCAL 1000 Application Information Above is a partial applications circuit for the ZNBG4003 showing The ZNBG4003 includes a switched capacitor DC-DC converter all external components needed for biasing one of the four FET that is used to generate the negative supply required to bias stages available. Each bias stage is provided with a gate and drain pin. The drain pin provides a regulated 2.0V supply that depletion mode FETs used in common source circuit configuration as shown above. This converter uses two external capacitors, CNB includes a drain current monitor. The drain current taken by the the charge transfer capacitor and CSUB the output reservoir external FET is compared with a user selected level, generating a capacitor. The circuit provides a regulated -2.5V supply both for signal that adjusts the gate voltage of the FET to obtain the gate driver use and for external use if required (for extra discrete required drain current. If for any reason, an attempt is made to bias stages, mixer bias, local oscillator bias etc.). The -2.5V supply is available from the CSUB pin. draw more than the user set drain current from the drain pin, the drain voltage will be reduced to ensure excess current is not taken. The gate pin drivers are also current limited. If any bias stages are not required, their gate and drain pins may be left open circuit. If all bias stages associated with an RCAL The bias stages are split up into two pairs, with the drain current of each pair set by an external RCAL resistor. RCAL1 sets the drain resistor are not required, then this resistor may be omitted. currents of stages 1 and 3, whilst RCAL2 sets the drain currents of stages 2 and 4. This allows the optimisation of drain currents for To ease PCB layout, the pinout for the ZNBG4003 includes two VCC pins. These pins are internally connected so only one of the differing tasks such as input stages where noise can be critical pins needs to be powered for the device to function. It is probable and later amplifier stages where gain may be more important. A graph showing the relationship between the value of RCAL and ID that the extra pin will help avoid the need for trace cross-over is provided in the Typical Characteristics section of this datasheet. links. Note that the exposed pad of the package must be either left floating or connected to CSUB. ZNBG4003 Document number: DS35007 Rev. 1 - 2 components or ground plane disruption from reverse side PCB 4 of 6 www.diodes.com June 2012 © Diodes Incorporated A Product Line of Diodes Incorporated ZNBG4003 NEW PRODUCT Ordering Information Part Number Packaging ZNBG4003JA16TC QFN1633 13” Tape & Reel Quantity Part Number Suffix 3000/Tape & Reel TC Marking Information Pin 1 ZNBG 4003 YYWW Part Name Date Code Year/Week Package Outline Dimensions (All dimensions in mm.) QFN16 3x3 Dim Min Max A 0.55 0.65 A1 0.00 0.05 A3 0.15 Typ b 0.18 0.28 D 2.95 3.05 D2 1.40 1.60 e 0.50 BSC E 2.95 3.05 E2 1.40 1.60 L 0.35 0.45 Z 0.625 Typ All Dimensions in mm ZNBG4003 Document number: DS35007 Rev. 1 - 2 5 of 6 www.diodes.com June 2012 © Diodes Incorporated A Product Line of Diodes Incorporated ZNBG4003 IMPORTANT NOTICE NEW PRODUCT DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. 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