FUJITSU SEMICONDUCTOR DS05–13109–10 DATA SHEET FRAM I2C 64 K (8 K×8) MB85RC64 ■ MB85RC64 ×8 MB85RC64 MB85RC64 MB85RC64 , CMOS FRAM (Ferroelectric Random Access Memory: , SRAM / 1012 E2PROM , , ,1 , ■ 8,192 2 ×8 (SCL) / 400 kHz (Max) 1012 / 10 ( 85 °C), 95 ( 55 °C), 200 2.7 V 3.6 V 100 μA (Typ @400 kHz) 5 μA (Typ) 40 °C 85 °C SOP, 8 (FPT-8P-M02) RoHS Copyright 2010-2015 FUJITSU SEMICONDUCTOR LIMITED 2015.5 8,192 ) (SDA) ( 2 35 °C) MB85RC64 ■ (TOP VIEW) A0 1 8 VDD A1 2 7 WP A2 3 6 SCL VSS 4 5 SDA (FPT-8P-M02) ■ ( 8 ) , 1 3 A0 A2 VSS VDD , SDA VDD, VSS VSS 4 VSS 5 SDA 6 SCL A0, A1, A2 “L” , , , “H” 7 2 “L” , , “L” 8 , WP ( VSS ) , VDD DS05–13109–10 MB85RC64 ■ - SDA FRAM 8,192×8 SCL WP / / A0, A1, A2 ■ I2C (Inter-Integrated Circuit) MB85RC64 , , , I2C ,2 I 2C , , ,1 , , I2C VDD SCL SDA I2C I2C MB85RC64 A2 0 DS05–13109–10 A1 0 A0 0 I2C MB85RC64 A2 0 A1 0 A0 1 I2C MB85RC64 A2 0 A1 1 ... A0 0 3 MB85RC64 ■ I2C I2C ,2 , SDA SCL , I2C “L” SCL , , SCL I2C , SCL “L” SDA “H” “H” “H” , SDA , SDA “L” “H” “H” , , , , , SCL SDA “H” or “L” Start Stop FRAM ■ (tWC) , (ACK) 2 IC , , 8 8 , , “L” , 9 9 , SDA , , NACK “H” Master 1 SCL 2 3 8 SDA , , 9 ACK 9 Start 4 ACK , ACK “L” , Slave , SCL 8 , Slave ACK , , , 8 (ACK SDA ) DS05–13109–10 MB85RC64 ■ (Slave address) ,8 , (8 (3 ), Read / Write (4 (1 ) ) , (4 3 ) 4 (3 , “1010” ) (3 , ), 8 ) A2, A1, A0 , ,3 , Read/Write (1 ) 8 , R/W (Read/Write) “1010” , , , “0” , “1” / Start 1 2 3 4 5 6 7 8 9 2 1 .. SCL SDA ACK S 1 0 1 0 A2 A1 R/W A0 .. A Read/Write S A ACK (SDA “L” ) ■ I2C , (8 ACK “L” , ACK , ACK “L” 8 8 , ACK “L” , R/W DS05–13109–10 ACK ACK 9 • 8 , , , , ×2 , , , ACK 8 ) 8 , 8 8 , 5 MB85RC64 ■ FRAM FRAM E2PROM (Acknowledge Polling) , ACK , , (8 ■ ) ,9 (WP) “H” “L” * , , , , VSS “H” , , “L” “L” ( ) 6 DS05–13109–10 MB85RC64 ■ Byte Write (R/W “0” ACK S , , Address High 8bits 1 0 1 0 A2 A1 A0 0 A A 0 00XXXXX ) , ACK , Address Low 8bits Write Data 8bits A A P X X X X X X XX MSB LSB S P A ACK(SDA MB85RC64 Page Write Byte Write , 13 , MSB ( ) 3 S ) “000” , , (0000H) , , FRAM “L” ,8K FRAM 1 0 1 0 A2 A1 A0 0 A , ACK , Address High 8bits A Address Low 8bits A Write Data 8bits Write Data A ... A P S P A ACK(SDA “L” ) , DS05–13109–10 7 MB85RC64 Current Address Read , n , OFF , n+1 , (0000H) ) Address ( Current n+1 S 1 0 1 0 A2 A1 A0 1 A Read Data 8bits N P S P A ACK(SDA N NACK (SDA “L” ) “H” ) Random Read , ) , SCL (R/W “1” , NACK (SDA S , “H” 1 0 1 0 A2 A1 A0 0 A ,1 ) , Address High 8bits A Address Low 8bits A S 1 0 1 0 A2 A1 A0 1 A Read Data 8bits N P S P A ACK(SDA N NACK (SDA 8 “L” “H” ) ) DS05–13109–10 MB85RC64 Sequential Read Random Read , (R/W "1" , ... A ) , (0000H) Read Data 8bits A ... Read Data A Read Data 8bits N P P A ACK(SDA N NACK (SDA “L” ) “H” ) ■ , I 2C , (1) , , (2) , , , , (1) SDA “L” , SDA , “H” , 9 “ 1 “1”” SCL SDA Hi-Z 1 Read Write (2) I2C DS05–13109–10 “1” , 9 , 9 MB85RC64 ■ * VDD 0.5 * VIN 0.5 VDD 0.5 ( 4.0) V * VOUT 0.5 VDD 0.5 ( 4.0) V TA 40 85 °C Tstg 55 125 °C VSS V 4.0 0V ( , , ) , , ■ VDD *1 TA *2 1 2 VSS 2.7 40 3.3 3.6 ⎯ V °C 85 0V , , , , , , , 10 DS05–13109–10 MB85RC64 ■ 1. ( ) ⎯ ⎯ 1 μA ⎯ ⎯ 1 μA 100 kHz ⎯ 30 ⎯ μA 400 kHz ⎯ 100 150 μA ISB SCL, SDA VDD A0, A1, A2, WP 0 V VDD ⎯ 5 20 μA “H” VIH VDD 2.7 V 3.6 V VDD×0.8 ⎯ VDD 0.5 ( 4.0) V “L” VIL VDD 2.7 V 3.6 V “L” VOL IOL 3 mA WP, A0, A1, A2 RIN VIN VIL ( VIN VIH ( |ILI| SCL, SDA |ILO| SDA 0V SCL SCL IDD 0V VDD VDD 0.5 ⎯ 0.6 V ⎯ ⎯ 0.4 V ) 50 ⎯ ⎯ kΩ ) 1 ⎯ ⎯ MΩ 2. FSCL 0 100 0 400 kHz THIGH 4000 ⎯ 600 ⎯ ns TLOW 4700 ⎯ 1300 ⎯ ns SCL/SDA Tr ⎯ 1000 ⎯ 300 ns SCL/SDA Tf ⎯ 300 ⎯ 300 ns Start THD:STA 4000 ⎯ 600 ⎯ ns Start TSU:STA 4700 ⎯ 600 ⎯ ns SDA THD:DAT 20 ⎯ 20 ⎯ ns SDA TSU:DAT 250 ⎯ 100 ⎯ ns SDA TDH:DAT 0 ⎯ 0 ⎯ ns Stop TSU:STO 4000 ⎯ 600 ⎯ ns TAA ⎯ 3000 ⎯ 900 ns TBUF 4700 ⎯ 1300 ⎯ ns TSP ⎯ 50 ⎯ 50 ns SCL SCL (SCL SDA , SDA ) , 2.7 V 3.6 V 40 °C 85 °C 0.3 V 2.7 V 5 ns 5 ns VDD/2 VDD/2 DS05–13109–10 11 MB85RC64 3. TSU:DAT SCL SDA VIH VIL Start THD:DAT VIH VIH VIH VIH VIL VIL VIL VIL VIH VIH VIH VIH VIL VIL VIL VIL TSU:STO TSU:STA THD:STA Tr THIGH SCL Stop VIH VIH VIL Tf TLOW VIL VIH VIH VIL VIL VIH SDA Stop VIH VIL Start VIH VIL VIH VIL VIL TBUF Tr T TDH:DAT f TAA Tsp VIH SCL VIL VIL VIH SDA Valid VIL VIH VIL VIL 1/FSCL 4. CI/O CIN VDD VIN VOUT 0 V, f 1 MHz, TA 25 °C ⎯ ⎯ 15 pF ⎯ ⎯ 15 pF 5. AC 3.3 V 1.1 kΩ Output 100 pF 12 DS05–13109–10 MB85RC64 ■ VDD 2V ( , VDD 0V ) tr tpd tpu VDD VDD 2.7 V 2.7 V VIH (Min) VIH (Min) 1.0 V 1.0 V VIL (Max) VIL (Max) 0V 0V SDA, SCL >VDD × 0.8 * SDA, SCL SDA, SCL (Max) OFF VDD SDA, SCL : Don't care SDA, SCL 0.5 V SDA, SCL ON SDA, SCL >VDD × 0.8 * SDA, SCL tpd 85 ⎯ ns tpu 85 ⎯ ns tr 10 ⎯ μs , , ■ FRAM *1 / * 1012 ⎯ TA 85 °C 10 ⎯ TA 85 °C 95 ⎯ TA 55 °C ⎯ TA 35 °C 2 200 1 2 FRAM , / / , , ■ , WP, A0, A1, A2 VDD VSS DS05–13109–10 13 MB85RC64 ■ ESD DUT ESD HBM( JESD22-A114 2000 V 2000 V ) ESD MM( JESD22-A115 200 V 200 V ) ESD CDM( JESD22-C101 1000 V 1000 V ) ( ) ⎯ MB85RC64PNF-G-JNE1 JESD78 ( ) ⎯ JESD78 ( Proprietary method ) (C-V Proprietary method ) ( 300mA 300mA ⎯ ) A VDD IIN 14 ) VIN IIN - VSS , IIN ±300 mA , I/O VDD ( ) V VIN ( + DUT 300 mA ( ) , IIN 300 mA , DS05–13109–10 MB85RC64 (C-V ) A 1 2 VDD SW DUT + V VIN - ( ) SW 2 1 ,5 1 2 C 200pF VDD ( ) VSS , ,5 , ■ JEDEC , Moisture Sensitivity Level 3 (IPC / JEDEC J-STD-020D) ■ , REACH DS05–13109–10 , EU RoHS RoHS 15 MB85RC64 ■ MB85RC64PNF-G-JNE1 SOP, 8 (FPT-8P-M02) ⎯* MB85RC64PNF-G-JNERE1 SOP, 8 (FPT-8P-M02) 1500 , 16 DS05–13109–10 MB85RC64 ■ ࡊࠬ࠴࠶ࠢSOP, 8 ࡇࡦ ࠼ࡇ࠶࠴ 1.27mm ࡄ࠶ࠤࠫ ࡄ࠶ࠤࠫ㐳ߐ 3.9mm 5.05mm ࠼ᒻ⁁ ࠟ࡞࠙ࠖࡦࠣ ኽᱛᣇᴺ ࡊࠬ࠴࠶ࠢࡕ࡞࠼ ขઃߌ㜞ߐ 1.75mm MAX ⾰㊂ 0.06g (FPT-8P-M02) ࡇࡦ ࡊࠬ࠴࠶ࠢ 㧔FPT-8P-M02㧕 +0.25 ᵈ 1㧕* ශኸᴺߪࠫࡦᱷࠅࠍޕ ᵈ 2㧕* ශኸᴺߪࠫࡦᱷࠅࠍ߹ߕޕ ᵈ 3㧕┵ሶ߅ࠃ߮┵ሶෘߐߪࡔ࠶ࠠෘࠍޕ ᵈ 4㧕┵ሶߪ࠲ࠗࡃಾᢿᱷࠅࠍ߹ߕޕ +.010 +0.03 *1 5.05 –0.20 .199 –.008 0.22 –0.07 +.001 .009 –.003 8 5 *2 3.90±0.30 6.00±0.20 (.154±.012) (.236±.008) Details of "A" part 45° 1.55±0.20 (Mounting height) (.061±.008) 0.25(.010) 0.40(.016) 1 "A" 4 1.27(.050) 0.44±0.08 (.017±.003) 0.13(.005) 0~8° M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.15±0.10 (.006±.004) (Stand off) 0.10(.004) C 2002-2012 FUJITSU SEMICONDUCTOR LIMITED F08004S-c-5-10 DS05–13109–10 න㧦mm 㧔inches㧕 ᵈᗧ㧦ᒐౝߩ୯ߪෳ⠨୯ߢߔޕ 17 MB85RC64 ■ [MB85RC64PNF-G-JNE1] [MB85RC64PNF-G-JNERE1] RC64 E11000 300 [FPT-8P-M02] 18 DS05–13109–10 MB85RC64 ■ 1. 1.1 ( ( ) ) 520 mm , / SOP, 8 (2) FPT-8P-M02 / 95 7600 / 30400 1.8 2.6 7.4 6.4 4.4 C ©2006-2010 FUJITSU SEMICONDUCTOR LIMITED 2006 FUJITSU LIMITED F08008-SET1-PET:FJ99L-0022-E0008-1-K-1 F08008-SET1-PET:FJ99L-0022-E0008-1-K-3 t 0.5 ( DS05–13109–10 mm) 19 MB85RC64 1.2 IC SOP Index mark 1 ( ( 1 2 3 ( 3 -B 3 E1 , ) 2 , , ) ) 3 1 -A *3 , G Pb , , , 20 DS05–13109–10 MB85RC64 1.3 ( (50mm×100mm) [C-3 , (20mm×100mm)] ) 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ :::::::::::::: C-3 ㋦㩖㩢㨺㩙㨺㩂 ::: ⸥ຠဳᩰຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 㧽㧯ޓ㧼㧭㧿㧿 0:::::::::::::: 0:::::::::: :::::: ᬌᩏޓᷣ ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 ຠᢙ㊂ :::REU :::::::::::::: 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ ⸥ຠဳᩰߩ㩔㩨㨺㩄㨺㩎㩨 :::::::: ൮ⵝᐕᣣ #55'/$.'&+0ZZZZZ ::::::::::::::: 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 :::: :::::::::: ൮ⵝㅊ⇟ :::::::::: :::::::::: ን჻ㅢ▤ℂ⇟ภ ຠ㩥㨹㩎ᖱႎ㧗ຠᢙ㊂ :::::::::::::: ․⸥㗄 -A [D ] (100mm×100mm) ⊒ᵈ⠪ޓޓ::::::::::::: ㅍઃవฬ %756 ን჻ㅢ ࡒࠦࡦ࠳ࠢ࠲ᩣᑼળ␠ ฃᷰ႐ᚲฬޓޓ::::::::: ㅍઃవᚲ &'.+8'4;21+06㧕 ⚊ຠࠠ⇟ภޓ:::::::::::::: 64#0501 ຠฬ㩄㨺㩎㩨ޓޓޓ:::::::::::::: 2#4601 ޓޓޓຠဳᩰ ຠฬ 2#460#/':::::::::::::: ຠဳᩰ :::㧛::: ᢙ㧛⚊ᢙ㊂ 36;616#.36; %7561/'454'/#4-5 ⊒ᵈ⠪↪⠨ :::::::::::::::::::: D ฃᵈ⠪ 8'0&14 ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::::::::::: ޓຠဳᩰ න 70+6 :: ᪿ൮ᢙ 2#%-#)'%1706 :::㧛::: 0::::::::::::::::: ን჻ㅢ▤ℂ⇟ภຠᢙ㊂ 0::::::::::::::::: ຠဳᩰຠᢙ㊂ ን჻ㅢ▤ℂ⇟ภຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 ຠဳᩰຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 ን჻ㅢ▤ℂ⇟ภ 0:::::::::: ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 -B ::::::::::::::㧔ຠဳᩰ㧕 㧔▫ᢙ㧕ޓޓޓ㧔ᢙ㊂㧕 ޓ:▫ޓޓޓޓޓ::: ޓ:▫ޓޓޓޓޓ::: ޓޓޓޓޓ⸘ޓޓ::: 㧔ຠ㩥㨹㩎ᖱႎ㧕 ޓޓޓ::::::: ޓޓޓ::::::: ( ) DS05–13109–10 , -A, B 21 MB85RC64 1.4 (1) H W L L W H 540 125 75 ( mm) (2) H W L L W H 565 270 180 ( 22 mm) DS05–13109–10 MB85RC64 2. 2.1 No FPT-8P-M02 3 / / / 1500 1500 10500 ø1.5 +0.1 –0 8±0.1 1.75±0.1 2±0.05 4±0.1 B 0.3±0.05 A B A 5.5±0.1 12 +0.3 –0.1 5.5±0.05 ø1.5 +0.1 –0 SEC.B-B 2.1±0.1 6.4±0.1 0.4 3.9±0.2 SEC.A-A C 2012 FUJITSU SEMICONDUCTOR LIMITED SOL8-EMBOSSTAPE9 : NFME-EMB-X0084-1-P-1 mm DS05–13109–10 23 MB85RC64 2.2 IC Index mark ER ( ) ( ) ( ) 2.3 ࡞ⓣኸᴺ E D W2 C B A W1 12 13 14 15 56 12 16 24 r W3 㧦ࡂࡉㇱߩኸᴺ mm No 1 2 3 8 A 254 ±2 4 5 12 254 ±2 6 7 16 330 ±2 254 ±2 330 ±2 254 ±2 10 11 32 44 330 ±2 330±2 100 +2 -0 150 +2 -0 100 +2 -0 150 +2 -0 100 +2 -0 100±2 C 13±0.2 13 +0.5 -0.2 D 21±0.8 20.5 +1 -0.2 E W1 W2 W3 r 24 9 24 100 +2 -0 B 8 2±0.5 8.4 +2 -0 14.4 7.9 10.9 12.4 +2 -0 18.4 11.9 16.4 +2 -0 22.4 15.4 15.9 24.4 +2 -0 30.4 19.4 23.9 32.4 +2 -0 38.4 27.4 31.9 44.4 +2 -0 50.4 35.4 43.9 47.4 56.4 +2 -0 12.4 +1 -0 +0.1 16.4 +1 -0 24.4 -0 62.4 18.4 22.4 30.4 55.9 59.4 12.4 14.4 16.4 18.4 24.4 26.4 1.0 DS05–13109–10 MB85RC64 2.4 (φ330mm ) φ330 mm 1, 1, 4 1, 4 4 1, 4 ( -A 1 2 3 4 ( E1 4 -B ) 2, 3 4 , G Pb , , ) , , , , , DS05–13109–10 25 MB85RC64 2.5 ( (50mm×100mm) [C-3 , (20mm×100mm)] ) 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ :::::::::::::: 0:::::::::::::: ㋦㩖㩢㨺㩙㨺㩂 ::: ⸥ຠဳᩰຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 㧽㧯ޓ㧼㧭㧿㧿 0:::::::::: :::::: C-3 ᬌᩏޓᷣ ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 ຠᢙ㊂ :::REU :::::::::::::: 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ ⸥ຠဳᩰߩ㩔㩨㨺㩄㨺㩎㩨 :::::::: ൮ⵝᐕᣣ #55'/$.'&+0ZZZZZ ::::::::::::::: 㘈ቴຠဳᩰޓߪޔን჻ㅢຠဳᩰ ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 :::: :::::::::: ൮ⵝㅊ⇟ :::::::::: :::::::::: ን჻ㅢ▤ℂ⇟ภ ຠ㩥㨹㩎ᖱႎ㧗ຠᢙ㊂ :::::::::::::: ․⸥㗄 -A [D ] (100mm×100mm) ⊒ᵈ⠪ޓޓ::::::::::::: ㅍઃవฬ %756 ን჻ㅢ ࡒࠦࡦ࠳ࠢ࠲ᩣᑼળ␠ ฃᷰ႐ᚲฬޓޓ::::::::: ㅍઃవᚲ &'.+8'4;21+06㧕 ⚊ຠࠠ⇟ภޓ:::::::::::::: 64#0501 ຠฬ㩄㨺㩎㩨ޓޓޓ:::::::::::::: 2#4601 ޓޓޓຠဳᩰ ຠฬ 2#460#/':::::::::::::: ຠဳᩰ :::㧛::: ᢙ㧛⚊ᢙ㊂ 36;616#.36; %7561/'454'/#4-5 ⊒ᵈ⠪↪⠨ :::::::::::::::::::: D ฃᵈ⠪ 8'0&14 ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::: ን჻ㅢ▤ℂ⇟ภ ::::::::::::::: ޓຠဳᩰ න 70+6 :: ᪿ൮ᢙ 2#%-#)'%1706 :::㧛::: 0::::::::::::::::: ን჻ㅢ▤ℂ⇟ภຠᢙ㊂ 0::::::::::::::::: ຠဳᩰຠᢙ㊂ ን჻ㅢ▤ℂ⇟ภຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 ຠဳᩰຠᢙ㊂ߩ㩔㩨㨺㩄㨺㩎㩨 ን჻ㅢ▤ℂ⇟ภ 0:::::::::: ን჻ㅢ▤ℂ⇟ภߩ㩔㩨㨺㩄㨺㩎㩨 -B ::::::::::::::㧔ຠဳᩰ㧕 㧔▫ᢙ㧕ޓޓޓ㧔ᢙ㊂㧕 ޓ:▫ޓޓޓޓޓ::: ޓ:▫ޓޓޓޓޓ::: 㧔ຠ㩥㨹㩎ᖱႎ㧕 ޓޓޓ::::::: ޓޓޓ::::::: ( 26 ) , ޓޓޓޓޓ⸘ޓޓ::: -A, B DS05–13109–10 MB85RC64 2.6 (1) H W L L W H 12, 16 40 24, 32 365 44 50 345 65 56 75 ( mm) (2) H W L L W H 415 400 315 ( DS05–13109–10 mm) 27 MB85RC64 ■ , 10 11 “H” 1. “L” (typ “H” ) “L” 15 17 28 DS05–13109–10 MB85RC64 MEMO DS05–13109–10 29 MB85RC64 MEMO 30 DS05–13109–10 MB85RC64 MEMO DS05–13109–10 31 MB85RC64 富士通セミコンダクター株式会社 0120-198-610 222-0033 2-100-45 : http://jp.fujitsu.com/fsl/ 9 PHS 17 ( , ) , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ,