FUJITSU SEMICONDUCTOR FACT SHEET NP501-00018-2v0-E FRAM MB85RC04V MB85RC04V is a 4K-bits FRAM LSI with serial interface (I2C), using the ferroelectric process and CMOS process technologies for forming the nonvolatile memory cells. Because FRAM is able to write high-speed even though a nonvolatile memory, it is suitable for the log management and the storage of the resume data, etc. ■ FEATURES Bit configuration ：512 words × 8 bits Two-wire serial interface ：Fully controllable by two ports: serial clock (SCL) and serial data (SDA). Operating frequency ：1 MHz (Max.) Read/write endurance ：1012 times / byte Data retention ：10 years (+85°C), 95 years (+55°C), over 200 years ( + 35 °C) Operating power supply voltage ：3.0V to 5.5V Low power consumptio ：Operating current 90μA (Typ:＠1MHz), Standby current 5μA (Typ) Operation ambient temperature range：-40°C to +85°C Package ：8-pin Plastic SOP (FPT-8P-M02) RoHS compliant ■ ORDERING INFORMATION Product name Package Shipping form MB85RC04VPNF-G-JNE1 8-pin Plastic SOP (FPT-8P-M02) 3.90mm×5.05mm,1.27mm pitch Tube MB85RC04VPNF-G-JNERE1 8-pin Plastic SOP (FPT-8P-M02) 3.90mm×5.05mm,1.27mm pitch Embossed Carrier tape ■ PACKAGE EXAMPLE OF REFERENCE 8-pin Plastic SOP (FPT-8P-M02) May 2013 1/2 Copyright©2012-2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved MB85RC04V ■ PIN ASSIGNMENT (TOP VIEW) (FPT-8P-M02) Pin No. Pin name 1 NC 2,3 A1,A2 4 VSS 5 SDA 6 SCL 7 WP 8 VDD Description No Connect pin Leave it unconnected. Device Address pins MB85RC04V can be connected to the same data bus up to 4 devices. Device addresses are used in order to identify each of these devices. Connect these pins to VDD pin or VSS pin externally. Only if the combination of VDD and VSS pins matches Device Address Code inputted from the SDA pin, the device operates. In the open pin state, A1 and A2 pins are internally pulled-down and recognized as the “L” level. Ground pin Serial Data I/O pin This is an I/O pin which performs bidirectional communication for both memory address and writing/reading data. It is possible to connect multiple devices. It is an open drain output, so a pull-up resistor is required to be connected to the external circuit. Serial Clock pin This is a clock input pin for input/output timing serial data. Data is sampled on the rising edge of the clock and output on the falling edge. Write Protect pin When the Write Protect pin is the "H" level, the writing operation is disabled. When the Write Protect pin is the "L" level, the entire memory region can be overwritten. The reading operation is always enabled regardless of the Write Protect pin input level. The Write Protect pin is internally pulled down to VSS pin, and that is recognized as the "L" level (write enable) when the pin is the open state. Supply Voltage pin ■ BLOCK DIAGRAM ■ I2C The MB85RC04V has the two-wire serial interface; the I2C bus, and operates as a slave device. The I2C bus defines communication roles of “master” and “slave” devices, with the master side holding the authority to initiate control. Furthermore, the I2C bus connection is possible where a single master device is connected to multiple slave devices in a party-line configuration. In this VDD case, it is necessary to assign a unique device address to the slave device, the master side starts communication after specifying the slave to communicate by addresses. Pull-up Resistors SCL SDA I2C Bus Master I2C Bus MB85RC04V A2 0 A1 0 I2C Bus MB85RC04V A2 0 Device address May 2013 2/2 Copyright©2012-2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved A1 1 I2C Bus MB85RC04V A2 1 ... A1 0 NP501-00018-2v0-E