Integrated Circuits Inc. aMTPxxM Series aMTPxxM Datasheet Multi-time program voice IC APLUS INTEGRATED CIRCUITS INC. Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http://www.aplusinc.com.tw Technology E-mail: [email protected] Sales E-mail: [email protected] Ver 1.1 1/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series FEATURES Standard CMOS process. 8-bit PCM voice quality. Support 6KHz to 20KHz sampling. Support multi-sampling voice in one chip. 660 sec voice length at 6KHz sampling or 200 sec voice length at 20KHz sampling. Up to 100,000 time for ROM program/erase cycles. Combination of voice building blocks to extend playback duration. Table entries are available for voice slice combinations. Five standard triggering modes are available (controlled by software): Key Trigger Sequential CPU Parallel CPU Serial MP3 Voice section trigger options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger. Built-in oscillator with fixed Rosc, software control sampling frequency 2.7V ~ 3.6V single power supply and < 15uA stand-by current. PWM Vout1 and Vout2 drive speaker directly. D/A COUT with ramp-up ramp-down option to drive speaker through external BJT or amplifier. RSTB provides external controlled reset to the chip. DESCRIPTION Aplus’ aMTPxxM series is multi-time program voice IC. It is fabricated with Standard CMOS process with voice storage flash memory. Offer five trigger modes: Key trigger mode, sequential mode, CPU parallel mode, CPU serial mode and MP3 mode, facilitate different user interface. User selectable triggering and output signal options provide maximum flexibility to various applications. External resistor ROSC control oscillator, 8-bit resolution current mode D/A output and PWM direct speaker driving minimize the number of external components. Ver 1.1 2/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series PIN CONFIGURATION PIN CONFIGURATION Pin Names Description VOUT1 PWM output to drive speaker directly VOUT2 PWM output to drive speaker directly D/A current output VSS VSSA VSSB OSC Ground Oscillator input VDD VDDA VDDB VPP /HOLD /WP CE-A, CE-B Supply voltage Supply voltage for firmware programming Data memory hold Data memory write protect Data memory enable SCK-A, SCK-B Data memory serial data clock SO-A, SO-B Data memory serial data output SI-A, SI-B Data memory serial data input PB0~PB3 I/O Port-B PD0~PD2 I/O Port-D RSTB Low active reset pin Pins for data memory programming are: VDDB, VSSB, WP, HOLD, CE-B, SCK-B, SI-B, SO-B and RSTB. Ver 1.1 3/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series TRIGGER MODES There are five trigger modes available for aMTP32M series: Key Trigger Sequential CPU Parallel CPU Serial MP3 Mode Below lists the how many I/Os will be use and simple description for every modes: Ver 1.1 Random Section Section Option Trigger Support Yes Yes Yes 256 Yes No Yes 6 32 Yes Yes Yes CPU Serial Command 2 256 Yes Yes No MP3 5 256 Yes No No Input Pin Maximum Section Busy Output Key Trigger 6 31 Sequential 1 CPU Parallel Trigger 4/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Key Trigger Mode Support simple random voice trigger. Can play up to 31 voice section by key combination. It also provides a BUSY output, the BUSY pin will output VIH when voice playing. When Section Option pin is VIL, up to 31 Voice Sections can be triggered by 6 TG pins showing at Table 1 . Section Option pin default is VIL. Ver 1.1 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description TG TG TG TG Pin Name PD0 PD1 PD2 Description BUSY TG TG 5/30 12/16/2014 Integrated Circuits Inc. Example Trigger Table aMTPxxM Series Voice Section TG Pin Ver 1.1 PB0 PB1 PB2 PB3 PD1 PD2 0 HIGH NC NC NC NC NC 1 NC HIGH NC NC NC NC 2 NC NC HIGH NC NC NC 3 NC NC NC HIGH NC NC 4 NC NC NC NC HIGH NC 5 NC NC NC NC NC HIGH 6 HIGH HIGH NC NC NC NC 7 NC HIGH HIGH NC NC NC 8 NC NC HIGH HIGH NC NC 9 NC NC NC HIGH HIGH NC 10 NC NC NC NC HIGH HIGH 11 HIGH NC NC NC NC HIGH 12 HIGH HIGH HIGH NC NC NC 13 NC HIGH HIGH HIGH NC NC 14 NC NC HIGH HIGH HIGH NC 6/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Voice Section TG Pin PB0 PB1 PB2 PB3 PD1 PD2 15 NC NC NC HIGH HIGH HIGH 16 HIGH NC NC NC HIGH HIGH 17 HIGH HIGH NC NC NC HIGH 18 HIGH HIGH HIGH HIGH NC NC 19 NC HIGH HIGH HIGH HIGH NC 20 NC NC HIGH HIGH HIGH HIGH 21 HIGH NC NC HIGH HIGH HIGH 22 HIGH HIGH NC NC HIGH HIGH 23 HIGH HIGH HIGH NC NC HIGH 24 HIGH HIGH HIGH HIGH HIGH NC 25 NC HIGH HIGH HIGH HIGH HIGH 26 HIGH NC HIGH HIGH HIGH HIGH 27 HIGH HIGH NC HIGH HIGH HIGH 28 HIGH HIGH HIGH NC HIGH HIGH 29 HIGH HIGH HIGH HIGH NC HIGH 30 HIGH HIGH HIGH HIGH HIGH HIGH Table 1. Trigger Table When Section Option Is VIL Ver 1.1 7/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Sequential Mode Support play up to 256 voice section sequentially by 1 TG pin. It also provides a BUSY output, the BUSY pin will output VIH when voice playing. When TG pin rising edge, chip will play voice. Rising edge again, then play next voice section. When last voice section is played, chip will return to voice section 0. Ver 1.1 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description TG N.C. N.C. N.C. Pin Name PD0 PD1 PD2 Description BUSY N.C. N.C. Example 8/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series CPU Parallel Mode Summary Support up to 32 voice section random play by 5 Addr pins and a TG pin. User assign voice section by Addr pins, and voice will play when TG pin rising edge. It also provides a BUSY output, the BUSY pin will output VIH when voice playing. Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Addr[0] Addr[1] Addr[2] Addr[3] Pin Name PD0 PD1 PD2 Description BUSY Addr[4] Trigger P.S. 1. Addr[0] ~ Addr[4] are Section number in binary digit. 2. Addr[0] is the LSB (least signification bit), Addr[4] is the MSB (most signification bit). Ver 1.1 9/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Example Addr[4] ~ Addr[0] = 00000 => Play Section #0 Addr[4] ~ Addr[0] = 00001 => Play Section #1 … Addr[4] ~ Addr[0]= 11110 => Play Section #30 Addr[4] ~ Addr[0]= 11111 => Play Section #31 Ver 1.1 10/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series CPU Serial Mode The CPU serial mode is designed for CPU interface. The host CPU can send data to control aMTPxxM. Serial Clock and Serial Data are used to input section number. BUSY is output from the chip to the host CPU for feedback response. Maximum 256 voice section are available. Ver 1.1 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Serial Clock Serial Data N.C. N.C. Pin Name PD0 PD1 PD2 Description BUSY N.C. N.C. Example 11/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series MP3 Mode User can start to play the voice or pause current voice by Play/Pause pin, and forward or backward play by Forward pin or Backward pin, up to 256 Voice Sections. User can enable repeat function by Repeat Enable pin. When repeat enable, it will loop play the current voice section by Repeat Ranges pin is VIL; It will loop play all the voice section sequentially by Repeat Range pin is VIH. Repeat Enable pin and Repeat Range pin default is VIL. Ver 1.1 Pin Defined Pin Name PB0 Description Forward Pin Name PD0 Description BUSY PB1 Play Pause PB2 PB3 Backward N.C. PD1 PD2 Repeat Repeat Enable Range 12/30 12/16/2014 Integrated Circuits Inc. Ver 1.1 aMTPxxM Series Example 13/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series RAMP UP / RAPM DOWN When playback in DAC, Ramp Up /Ramp Down will enabled. This function eliminates the ‘POP’ noise at the begin and end of voice playback. Fig. 1 Ramp-up-down Enable VOICE TABLE One voice section can include many voice slices. User can use voice slices to save memory usage. For example, we have 3 voice file store in the memory: File 1: “How are You?” File 2: Sound Effect File 3: Music Voice slices are grouped together using Voice Table to form Voice Section for playback: Voice Section No. Ver 1.1 Voice Group Contents Voice Table Entries Section 0 “How are You? File 1. Section 1 Sound Effect + “How are You?” File 2, File 1. Section 2 “How are You?” + Music File 1, File 3. Section 3 Music File 3. 14/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series SECTION OPIONS In Key, Sequential and CPU parallel mode, the software provide selectable options that affect each individual group are called “Section Options”. They are: Edge or Level trigger Unholdable or Holdable trigger Re-triggerable or non-retriggerable Fig. 2 to Fig. 7 show the voice playback with different combination of triggering mode and the relationship between outputs and voice playback. Fig. 2 Level, Unholdable, Non-retriggerable Fig. 3 Level Holdable Fig. 4 SBT sequential trigger with Level Holdable and Unholdable Ver 1.1 15/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Fig. 5 Edge, Unholdable, Non-retrigger Fig. 6 Edge, Holdable Fig. 7 SBT sequential trigger with Edge Holdable and Unholdable Ver 1.1 16/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series TRIGGER TIMING Key Trigger, Sequential, CPU Parallel and MP3 Mode Symbol Min. Typ. Max Unit Trigger debounce time 20 ─ ─ mS Trigger delay after ramp down ─ 0 ─ mS tUP Ramp up time 0 32 ─ mS tDN Ramp down time 0 ─ 64 mS tBS BUSY output set up time 0 ─ 1 mS tBH BUSY output set down time 0 ─ 1 mS Address set-up / hold time 1 ─ ─ mS tKD tKDD tASH Ver 1.1 Parameter 17/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series CPU Serial Mode Symbol Min. Typ. Max Unit Serial data stay / hold time 1 ─ ─ us TRAMPH Ramp up time ─ ─ 64 ms TRAMPL Ramp down time ─ ─ 64 ms TBUSYH BUSY output set up time ─ ─ 1 ms TBUSYL BUSY output set down time ─ ─ 1 ms TSD Ver 1.1 Parameter 18/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series BLOCK DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDD - VSS Ver 1.1 Rating -0.5 ~ +4.0 Unit V VIN VSS - 0.3<VIN<VDD + 0.3 V VOUT VSS <VOUT<VDD V ~ +85 ℃ -40 ~ +125 ℃ -55 ~ +125 ℃ T (Operating): 0 T (Junction) T (Storage) 19/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series DC CHARACTERISTICS ( TA = 0 to 70℃, VDD = 3.0V, VSS = 0V. ) Symbol Parameter Min. Typ. Max. Unit VDD Operating Voltage 2.7 3.0 3.6 V ISB Standby current 10 15 µA I/O properly terminated IOP Operating current 17 22 mA I/O properly terminated VIH "H" Input Voltage 2.7 3.0 3.5 V VDD=3.0V VIL "L" Input Voltage -0.5 0 0.3 V VDD=3.0V IVOUTL_ N VOUT low O/P Current (Normal Volume) 130 mA Vout=1.0V IVOUTL_ H VOUT low O/P Current 200 mA Vout=1.0V IVOUTH_ N VOUT high O/P Current -130 mA Vout=2.0V IVOUTH_ H VOUT high O/P Current -200 mA Vout=2.0V ICO COUT O/P Current -2 mA Data = 80h IOH O/P High Current -10 mA VOH=2.5V IOL O/P Low Current 17 mA VOL=0.3V ROSC Oscillator resistance 200K 240K Ω Built-in oscillator adjust RNVOUT VOUT pull-down resistance 100K Ω VOUT pin set to internal pull-down Ver 1.1 (High Volume) (Normal Volume) (High Volume) 20/30 Conditions 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Symbol Parameter Min. Typ. Max. Unit RNPIO Programmable IO pin pull-down resistance 1M Ω PBx, PDx set to internal pull-down RUPIO Programmable IO pin pull-up resistance 3.3K 4.7K Ω PBx, PDx set to internal pull-up ∆Fs/Fs Frequency stability -3 +3 % ∆Fc/Fc Chip to chip Frequency Variation Ver 1.1 -5 21/30 +5 % Conditions VDD = 3V +/- 0.4V Also apply to lot to lot variation 12/16/2014 Integrated Circuits Inc. aMTPxxM Series TYPICAL APPLICATIONS Key Trigger Mode Using 3.0V Battery And Key Trigger With PWM Driver Speaker Ver 1.1 22/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Using 4.5V Battery And Key Trigger With DAC Driver Speaker Note 1. 2. 3. 4. Ver 1.1 PB0, PB1, PB2, PB3, PD1, PD2 are trigger pins (input). PD0 is busy pin (output). C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off. 23/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Sequential Mode Using 4.5V Battery And Sequential Trigger With DAC Driver Speaker Note Ver 1.1 1. 2. 3. PB0 is trigger input pin (input). PD0 is busy pin (output). C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB 4. pins of the chip. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off. 24/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series CPU Parallel Mode Using 3.3V Supply And CPU Parallel Trigger With DAC Driver Speaker Note 1. 2. 3. 4. PB0, PB1, PB2, PB3, PD1 are address pins (input). PD2 is trigger pin (input). PD0 is busy pin (output). C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. Ver 1.1 25/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series CPU Serial Mode Using 3.3V Supply And CPU Serial Trigger With DAC Driver Speaker Note 1. 2. 3. 4. PB0 is serial clock pin (input). PB1 is serial data pin (input). PD0 is busy pin (output). C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. Ver 1.1 26/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series MP3 Mode Using 4.5V Battery And MP3 Mode Trigger With DAC Driver Speaker Note Ver 1.1 1. 2. 3. PB0 is forward pin (input). PB1 is play / pause pin (input). PB2 is backward pin (input). 4. 5. 6. 7. PD1 is repeat enable option pin (input). PD2 is repeat mode select pin (input). PD0 is busy pin (output). C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB 8. pins of the chip. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off. 27/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Package Information Ver 1.1 DIP 28-PIN 28/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series Package Information Ver 1.1 SOP 28-PIN 29/30 12/16/2014 Integrated Circuits Inc. aMTPxxM Series HISTORY Ver 1.0 The 1St version datasheet for aMTPxxM. 2011/12/07 Ver 1.1 Remove LQFP data 2014/12/16 Ver 1.1 30/30 12/16/2014