DataSheet - Aplus Integrated Circuits Inc.

Integrated Circuits Inc.
aP89021/010
APLUS MAKE YOUR PRODUCTION A-PLUS
VOICE OTP IC
aP89021 – 21sec
aP89010 – 10sec
APLUS
INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路一段 32 號 3 樓之 10.
Sales E-mail:
sales@aplusinc.com.tw
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Ver 4.0
1
Technology E-mail:
service@aplusinc.com.tw
Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
FEATURES
Standard CMOS process.
Embedded 512K/256K bits EPROM.
21/10 Sec Voice Length at 6 KHz sampling and 4-bit ADPCM compression.
Maximum 12 voice groups.
Combination of voice building blocks to extend playback duration.
960 table entries are available for voice block combinations.
User selectable PCM or ADPCM data compress.
Two triggering modes are available by whole chip option during voice compilation.
-
Key Trigger Mode – Combinations of S1 ~ S4 to trigger up to 12 voice groups; SBT
for sequential trigger.
- CPU Parallel Trigger Mode – Combinations of S1 ~S4 with SBT goes HIGH to strobe
start the voice playback.
Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger.
Whole Chip Options: Ramp / No-ramp; Output Options; Key / CPU trigger mode.
16ms (@ 8KHz sampling rate) Debounce Time for both Key and CPU Trigger Modes.
RST pin set to HIGH to stop playback at once.
Three user programmable outputs for STOP plus, BUSY signal and flashing LED.
Built-in oscillator to control sampling frequency with an external resistor.
2.2V – 3.6V single power supply and < 5uA low stand-by current.
PWM Vout1 and Vout2 drive speaker directly.
D/A COUT to drive speaker through an external BJT.
Development System support voice compilation and options selection.
DESCRIPTION
aP89021/010 high performance Voice OTP is fabricated with Standard CMOS process with embedded
512K/256K bits EPROM. It can store up to 21/10 sec voice message with 4-bit ADPCM compression
at 6KHz sampling rate. 8-bit PCM is also available as user selectable option. Two trigger modes,
simple Key trigger mode and Parallel CPU trigger mode facilitate different user interface. User
selectable triggering and output signal options provide maximum flexibility to various applications.
Built-in resistor controlled oscillator, 8-bit current mode D/A output and PWM direct speaker driving
output minimize the number of external components. PC controlled programmer and developing
software are available.
Ver 4.0
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Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
PIN CONFIGURATIONS
OUT1
1
16
RST
VOUT1
2
15
SBT
VOUT2
3
14
S4
VSS
4
13
S3
OUT2
5
12
VDD
OUT3
6
11
S2
COUT
7
10
S1
OSC
8
9
VPP
300 mil DIP
150 mil SOP
PIN NAMES
1
Playback
Mode
OUT1
OTP Program
Mode
OEB
2
VOUT1
-
PWM output to drive speaker directly
3
VOUT2
-
PWM output to drive speaker directly
4
VSS
VSS
5
OUT2
IO
Programmable output (I/O pin)
6
OUT3
-
Programmable output (I/O pin)
7
COUT
-
D/A current output
8
OSC
ACLK
9
VPP
VPP
10
S1
S1
Trigger pin (input with internal pull-down)
11
S2
S2
Trigger pin (input with internal pull-down)
12
VDD
VDD
13
S3
S3
Trigger (input with internal pull-down)
14
S4
S4
Trigger (input with internal pull-down)
15
SBT
PGM
Trigger pin (input with internal pull-down)
16
RST
DCLK
Reset pin (input with internal pull-down)
PIN
Ver 4.0
Description
Programmable output (I/O pin)
Power Ground
Oscillator input
Supply voltage for OTP programming
Positive Power Supply
3
Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
PIN DESCRIPTIONS
S1 ~ S4
Input Trigger Pins:
- S1 to S4 are used to trigger the 12 Voice Groups in both Key and CPU Parallel Trigger Mode.
- In OTP Programming Mode, S1 to S4 are used as program enable pins.
SBT
Input Trigger Pin:
- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one
sequentially.
- In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to
S4 and starts the voice playback.
- In OTP Programming Mode, this pin is used as PGM signal.
VDD
Power Supply Pin.
VSS
Power Ground Pin
VOUT1 and VOUT2
Digital PWM output pins which can drive speaker and buzzer directly for voice playback.
OSC
During voice playback, an external resistor is connected between this pin and the VDD pin to set
the sampling frequency. In OTP Programming Mode, this is the ACLK input signal.
VPP
Connection to VDD is required during voice playback. In OTP Programming Mode, this pin is
connected to a separate 6.5V power supply.
OUT1, OUT2 and OUT3
- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins
for the STOP pulse, BUSY and LED signals.
- During OTP programming, OUT1 serves as OEB while OUT2 serves as data IO.
COUT
Analog 8-bit current mode D/A output for voice playback
RST
Chip reset in playback mode or DCLK pin in OTP programming mode.
Ver 4.0
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Integrated Circuits Inc.
aP89021/010
VOICE SECTION COMBINATIONS
Voice files created by the PC base developing system are stored in the built-in EPROM of the
aP89021/010 chip as a number of fixed length Voice Blocks. Voice Blocks are then selected and
grouped into Voice Groups for playback. Up to 12 Voice Groups are allowed. A Voice Block Table
is used to store the information of combinations of Voice Blocks and then group them together to
form Voice Group.
Chip
aP89021
aP89010
512K bits
256K bits
Max no. of Voice Block
126
124
No. of bytes per Voice Block
512
256
Max. no. of Voice Group
12
12
No. of Voice Table entries
960
960
21 sec
10 sec
Memory size
Voice Length (@ 6KHz 4-bit ADPCM)
Example of Voice Block Combination
Assume here we have three voice files, they are “How are You?”, Sound Effect and Music. Each of
the voice file is divided into a number of fixed length Voice Block and stored into the memory.
Voice File 1 - “How are You?” is stored in Voice Block B0 to B12.
Voice File 2 - Sound Effect is stored in Voice Block B13 to B15.
Voice File 3 - Music is Voice Block B16 to B40.
Voice Blocks are grouped together using Voice Table to form Voice Group for playback:
Group no.
Voice Group contents
Voice Table Entries
Group 1
“How are You?”
B0 … B12
Group 2
Sound Effect + “How are You?”
B13 … B15 + B0 … B12
Group 3
“How are You?” + Music
B0 … B12 + B16 … B40
Group 4
Music
B16 … B40
Voice Data Compression
Voice File data is stored in the on-chip EPROM as either 4-bit ADPCM or 8-bit PCM format. Voice
data stored as 4-bit ADPCM provides 2:1 data compression which can save 50% of memory space.
On the other hand, voice data are stored as 8-bit PCM format means no data compression is employed
but voice playback quality will be better.
Ver 4.0
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Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
Programmable Options
In both Key Trigger Mode and CPU Parallel Trigger Mode, user can select different trigger functions
and output signals to be sent out from the pins OUT1, OUT2 and OUT3.
Options affect all Voice Group playback are called Whole Chip Options. Options only affect the
playback of individual Voice Group are called Group Options.
Whole Chip Options
•
Key or CPU Parallel Trigger Mode.
•
Ramp-up-down enable or disable:
When COUT is used for playback, Ramp-up-down should be enabled.
This function
eliminates the ‘POP’ noise at the beginning and end of voice playback.
When VOUT1 and VOUT2 are used to drive speaker directly, Ramp-up-down should be
disabled.
Fig. 1 Ramp-up-down Enable
•
Fig.2 Ramp-up-down Disable
Output Options:
This option sets up the three output pins OUT1 and OUT2 to send out different signals during
voice playback. Four settings are allowed:
OUT1
OUT2
OUT3
Option 1
LED2
LED1
BUSY
Option 2
STOP
LED1
LED2
Option 3
LED1
BUSY
STOP
Note: Stop plus must be set to enable in order to have STOP plus to come
out. The BUSY output is always HIGH during voice playback.
Fig. 3 Output waveforms
Ver 4.0
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Integrated Circuits Inc.
aP89021/010
Group Options
User selectable options that affect each individual group are called Group Options. They are:
•
Edge or Level trigger
•
Unholdable or Holdable trigger
•
Re-triggerable or non-retriggerable
•
Stop pulse disable or enable
Fig. 4 to Fig. 9 show the voice playback with different combination of triggering mode and the
relationship between outputs and voice playback.
Fig. 4 Level, Unholdable, Non-retriggerable
Fig. 5 Level Holdable
Fig. 6 SBT sequential trigger with Level Holdable and Unholdable
Ver 4.0
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Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
Fig. 7 Edge, Unholdable, Non-retrigger
Fig. 8 Edge, Holdable
Fig. 9 SBT sequential trigger with Edge Holdable and Unholdable
Ver 4.0
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Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
Overlap trigger is supported with Level/Unholdable trigger options:
Fig. 10 Overlap trigger
Ver 4.0
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Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
TRIGGER MODES
There are two triggering modes available for aP89021/010.
Key or CPU Trigger modes are determined by setting the EPORM programmable options during voice
data compilation.
Key Trigger Mode
With this trigger mode, up to 12 Voice Groups are triggered by setting S1 to S4 to HIGH or NC (not
connected) in different combinations. Each Voice Group can have its only independent trigger
options (See Fig. 4, 5, 7 and 8 for trigger options definition).
Voice Groups can also be triggered sequentially by setting SBT pin to HIGH.
CPU Parallel Trigger Mode
In this mode, S1 to S4 are set to HIGH or LOW according to the table on the following page and
followed by setting the SBT input pin to HIGH, the corresponding Voice Group will be triggered.
Trigger options defined in Fig. 4, 5, 7 and 8 are valid for this mode.
Fig. 11 CPU Parallel Trigger Mode
Note that SBT pin cannot be used as Single Button Sequential trigger in this mode. In stead, it acts as
a Strobe input to clock-in the data input from S1 to S4 into the chip.
Ver 4.0
10
Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
Key Trigger Mode
Up to 12 Voice Groups can be triggered by S1 to S4.
Voice Group
S1
S2
S3
S4
1
HIGH
NC
NC
NC
2
NC
HIGH
NC
NC
3
NC
NC
HIGH
NC
4
NC
NC
NC
HIGH
5
HIGH
HIGH
NC
NC
6
NC
HIGH
HIGH
NC
7
NC
NC
HIGH
HIGH
8
HIGH
NC
NC
HIGH
9
HIGH
HIGH
HIGH
NC
10
NC
HIGH
HIGH
HIGH
11
HIGH
NC
HIGH
HIGH
12
HIGH
HIGH
NC
HIGH
CPU Trigger Mode
Up to 12 Voice Groups can be triggered by supplying address to [S4:S1] with SBT as strobe signal.
Voice Group
1
2
S4
0
0
S3
0
0
S2
0
0
S1
0
1
3
0
0
1
0
4
0
0
1
1
5
0
1
0
0
6
0
1
0
1
7
0
1
1
0
8
0
1
1
1
9
1
0
0
0
10
1
0
0
1
11
1
0
1
0
12
1
0
1
1
Ver 4.0
11
Aug 23, 2010
Integrated Circuits Inc.
aP89021/010
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Unit
VDD - VSS
-0.5 ~ +4.5
V
VIN
VSS - 0.3<VIN<VDD + 0.3
V
VOUT
VSS <VOUT<VDD
V
T (Operating):
-40 ~ +85
℃
T (Junction)
-40 ~ +125
℃
T (Storage)
-55 ~ +125
℃
Ver 4.0
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Integrated Circuits Inc.
aP89021/010
DC CHARACTERISTICS ( TA = 0 to 70℃, VDD = 3.3V, VSS = 0V )
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
VDD
Operating Voltage
2.2
3.0
3.6
V
ISB
Standby current

1
5
µA
I/O open
IOP
Operating current


15
mA
I/O open
VIH
"H" Input Voltage
2.5
3.0
3.5
V
VDD=3.0V
VIL
"L" Input Voltage
-0.3
0
0.5
V
VDD=3.0V
IOL
VOUT low O/P Current

120

mA
Vout=0.3V, VDD=3.0V
IOH
VOUT high O/P Current

-120

mA
Vout=2.5V, VDD=3.0V
ICO
COUT O/P Current

-3

mA
VCOUT=1.0V, VDD=3.0V
IOH
O/P high Current

-8

mA
VOH=2.5V, VDD=3.0V
IOL
O/P low Current

8

mA
VOL=0.3V, VDD=3.0V
∆F/F
Ver 4.0
Frequency Stability
-5

+5
13
%
Fosc(2.7V) - Fosc(3.4V)
Fosc(3V)
Aug 23, 2010
Integrated Circuits Inc.
AC CHARACTERISTICS
aP89021/010
( TA = 0 to 70℃
℃, VDD = 3.3V, VSS = 0V, 8KHz sampling )
KEY Trigger Mode
S1~S4,
SBT
tKDD
tKD
tDN
COUT
tUP
tSTPD
tSTPW
STOP
BUSY
tBD
tBH
CPU Parallel Mode
Addr.
S1~S4
tASH
SBT
tASH
tSBTW
Symbol
Parameter
Min.
Typ.
Max.
Unit
Note
tKD
Key trigger debounce time
16


ms
1
tKD
Key trigger debounce time – retrigger
24


ms
1
tUP
Ramp up time
0
128/Fs
−−
s
3
tDN
Ramp down time
0
−−
256/Fs
s
3
tKDD
Key trigger delay after ramp down
−−
0
−−
ms
tSTPD
STOP pulse output delay time


256
µs
tSTPW
STOP pulse width

64

ms
tBD
BUSY signal output delay time


100
ns
tBH
BUSY signal output hold time

100

ns
tASH
Address set-up /hold time
100


ns
tSBTW
SBT stroke pulse width
16


ms
1
tLEDC
LED flash frequency

3

Hz
2
1
Notes : 1. This parameter is inversely proportional to the sampling frequency.
2. This parameter is proportional to the sampling frequency.
3. Fs is sampling frequency in Hz
Ver 4.0
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aP89021/010
OSCILLATOR RESISTANCE TABLE
Sampling Frequency
KHz
4.90
5.26
5.88
6.09
6.33
6.67
6.85
7.14
7.46
7.70
8.06
8.47
8.93
9.26
9.80
10.42
ROSC
KOhm
ROSC
KOhm
140
130
120
110
100
91
82
75
68
62
56
51
43
300
290
280
270
260
250
240
230
220
210
200
190
180
170
160
150
Sampling Frequency
KHz
11.00
11.76
12.50
13.33
14.51
15.63
16.95
18.18
19.23
20.83
22.22
23.81
25.00
Note: The data in the above tables are within 3% accuracy and measured at VDD = 3.0V. Oscillator frequency
is subjected to IC lot to lot variation.
Ver 4.0
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Integrated Circuits Inc.
aP89021/010
TYPICAL APPLICATIONS
Key Trigger Mode
C1
0.1uF
8Ω 1/4W
Speaker
VDD,VPP
RST
ROSC
Rb
S1
S2
S3
3.3V
T
COUT
OS
VOUT1
VOUT2
S4
8 / 16Ω
Speaker
OUT1
SBT
VSS
Fig. 12 Using 3.3V Battery
HT7335
C1
0.1uF
8Ω 1/4W
Speaker
VDD,VPP
ROSC
RST
Rb
S1
S2
S3
S4
4.5V
T
COUT
OS
VOUT1
VOUT2
8 / 16Ω
Speaker
OUT1
SBT
VSS
Output driving of HT LDO:
HT7136 (30mA, 3.6V)
HT7133 (30mA, 3.3V)
HT7536 (100mA, 3.6V)
HT7335 (250mA, 3.5V)
Fig. 13 Using 4.5V Battery
Ver 4.0
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Integrated Circuits Inc.
aP89021/010
CPU Parallel Mode
Fig. 14 5V CPU Control with COUT
Note:
1. C1 is capacitor from 0.1uF to 4.7uF depends on the kind of Vdd source and sound loudness.
2. Rb is base resistor from 120 Ohm to 390 Ohm depends on Vdd value and transistor gain.
3. T is an NPN transistor with beta larger than 150.
4. Reference value for the above components are C = 2.2uF, Rb = 390 Ohm and T = 8050D.
5. Refer to the Oscillator Resistor Table for suitable value of Rosc.
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aP89021/010
6. Bonding Diagram (aP89021)
Bonding Diagram (aP89010)
Note: Substrate should be connected to Vss.
Bonding pad size: 80um x 90um
Ver 4.0
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Aug 23, 2010