AK4117

[AK4117]
AK4117
Low Power 192kHz Digital Audio Receiver
AK4117
192kHz, 24
*AC-3
(DIR)
AC-3/MPEG
Non-PCM
CODEC(AK4527B, AK4529)
AC-3
µP I/F
AK4117
24
VSOP
Dolby Laboratories
† AES3, IEC60958, S/PDIF, EIAJ CP1201
†
PLL
† PLL
: 32kHz ∼ 192kHz
† PLL/X'tal
†
2
†
†
- Non-PCM
- DTS-CD
(32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz)
- Unlock & Parity Error
- Validity
† 24
†
I/F:
,
(16bit, 18bit, 20bit, 24bit), I2S
†
40
† Non-PCM
Pc, Pd
† CD Q-subcode
†4
µP I/F
† 128fs/256fs/512fs
†
: 2.7 to 3.6V
†
: 24
VSOP
† Ta: -40 ∼ 85°C
MS0157-J-03
2010/08
-1-
[AK4117]
■
AVSS
RX0
RX1
2 to 1
Input
Selector
AVDD
R
XTI
XTO
X'tal
Clock
Recovery
Oscillator
Clock
Generator
DAIF
Decoder
Audio
I/F
DVDD
DVSS
MCKO
LRCK
BICK
SDTO
DAUX
PDN
AC-3/MPEG
Detect
Error &
STATUS
Detect
Q-subcode
µP I/F
buffer
CSN
CCLK
CDTI
CDTO
UOUT
INT0 INT1
MS0157-J-03
2010/08
-2-
[AK4117]
■
AK4117VF
-40 ~ +85 °C
24pin VSOP (0.65mm pitch)
■
R
1
24
AVSS
AVDD
2
23
PDN
RX1
3
22
INT0
NC
4
21
INT1
RX0
5
20
CSN
DVDD
6
19
CCLK
DVSS
7
18
CDTI
XTI
8
17
CDTO
XTO
9
16
UOUT
LRCK
10
15
NC
BICK
11
14
MCKO
SDTO
12
13
DAUX
Top
View
MS0157-J-03
2010/08
-3-
[AK4117]
No.
I/O
1
R
-
2
3
AVDD
RX1
I
PVSS
12kΩ-5% ~ 13kΩ+5%
1
(
)
No Connect
4
NC
-
5
6
7
8
9
10
11
12
13
14
RX0
DVDD
DVSS
XTI
XTO
LRCK
BICK
SDTO
DAUX
MCKO
I
I
O
O
O
O
I
O
15
NC
-
16
UOUT
O
17
18
19
20
21
22
CDTO
CDTI
CCLK
CSN
INT1
INT0
O
I
I
I
O
O
23
PDN
I
AVSS
-
RX0
0
RX1
AVSS
(
)
No Connect
U
UOUTE bit = “0”
UOUT pin
“L”
1
0
&
“L”
“L”
24
Note 1:
MS0157-J-03
2010/08
-4-
[AK4117]
(AVSS=DVSS=0V; Note 2)
Parameter
Power Supplies:
Analog
Digital
|AVSS-DVSS| (Note 3)
Input Current (Any pins except supplies)
Input Voltage (Except RX0, RX1 pins)
(RX0, RX1 pins)
Ambient Temperature (Power applied)
Storage Temperature
Note 2.
Note 3. AVSS, DVSS
:
(AVSS= DVSS=0V; Note 2)
Parameter
Power Supplies:
Analog
Digital
Note 2.
Symbol
AVDD
DVDD
ΔGND
IIN
VIN1
VIN2
Ta
Tstg
Symbol
AVDD
DVDD
min
-0.3
-0.3
max
4.6
4.6
0.3
±10
DVDD+0.3
AVDD+0.3
85
150
-0.3
-0.3
-40
-65
Units
V
V
V
mA
V
V
°C
°C
min
2.7
2.7
typ
3.3
3.3
max
3.6
AVDD
Units
V
V
min
350
32
typ
10
max
-
-
192
Units
kΩ
mVpp
kHz
S/PDIF
(Ta=25°C; AVDD=DVDD=2.7~3.6V)
Parameter
Input Resistance
Input Voltage
Input Sample Frequency
Symbol
Zin
VTH
fs
DC
Ta=25°C; AVDD=DVDD=2.7~3.6V)
Parameter
Symbol
min
typ
max
Power Supply Current
Normal operation (PDN= “H”) (Note 4)
14
LP= “0”, CM1-0= “00”
(Note 5)
28
LP= “1”, CM1-0= “00”
(Note 6)
7
14
LP= “1”, CM1-0= “01”
(Note 7)
2
Power down (PDN = “L”)
(Note 8)
10
100
High-Level Input Voltage
VIH
70%DVDD
DVDD+0.3
Low-Level Input Voltage
VIL
DVSS-0.3
30%DVDD
VOH
DVDD-0.4
High-Level Output Voltage
(Iout=-400μA)
VOL
0.4
Low-Level Output Voltage
(Iout=400μA)
Input Leakage Current
Iin
± 10
Note 4. AVDD=DVDD=3.3V.
Note 5. fs=192kHz, X'tal=24.576MHz, PCKS1-0= “10” , CL=20pF. AVDD=5mA (typ), DVDD=9mA (typ).
Note 6. fs=48kHz, X'tal=24.576MHz, CL=20pF. AVDD=4mA (typ), DVDD=3mA (typ).
Note 7. fs=48kHz, X'tal=24.576MHz.
Note 8. RX
DVDD
DVSS
(
MS0157-J-03
Units
mA
mA
mA
μA
V
V
V
V
μA
2010/08
-5-
[AK4117]
(Ta=25°C; AVDD=DVDD=2.7~3.6V; CL=20pF)
Parameter
Master Clock Timing
Crystal Resonator
Frequency
External Clock
Frequency
Duty Cycle
MCKO Output
Frequency
Duty Cycle
(Note 9)
PLL Clock Recover Frequency (RX0, RX1)
LRCK Timing
Frequency
PLL mode
X’tal mode
External Clock mode
Duty Cycle
Audio Interface Timing
BICK Frequency
BICK Duty
BICK “↓” to LRCK
BICK “↓” to SDTO
DAUX Hold Time
DAUX Setup Time
Control Interface Timing
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
CSN “↑” to CDTO Hi-Z
Reset Timing
PDN Pulse Width
Note 9.
Symbol
min
fXTAL
fECLK
dECLK
fMCK
dMCK
fpll
11.2896
2.048
40
1.024
40
32
fs
fs
fs
dLCK
32
44.1
8
45
fBCK
dBCK
tMBLR
tBSD
tDXH
tDXS
50
50
-
max
Units
24.576
24.576
60
24.576
60
192
MHz
MHz
%
MHz
%
KHz
192
192
192
55
kHz
kHz
kHz
%
20
15
Hz
%
ns
ns
ns
ns
64fs
50
-20
20
20
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tDCD
tCCZ
200
80
80
50
50
150
50
50
tPW
150
MS0157-J-03
typ
45
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2010/08
-6-
[AK4117]
■
1/fECLK
VIH
XTI
VIL
tECLKH
tECLKL
dECLK = tECLKH x fECLK x 100
= tECLKL x fECLK x 100
1/fMCK
MCKO
50%DVDD
tMCKH
tMCKL
dMCK = tMCKH x fMCK x 100
= tMCKL x fMCK x 100
1/fs
VIH
LRCK
VIL
tLRH
tLRL
dLCK = tLRH x fs x 100
= tLRL x fs x 100
Figure 1.
LRCK
50%DVDD
tMBLR
50%DVDD
BICK
tBSD
50%DVDD
SDTO
tDXS
tDXH
VIH
DAUX
VIL
Figure 2.
MS0157-J-03
2010/08
-7-
[AK4117]
VIH
CSN
VIL
tCSS
tCCK
tCCKL tCCKH
VIH
CCLK
VIL
tCDH
tCDS
C0
C1
CDTI
A4
R/W
VIH
VIL
Hi-Z
CDTO
Figure 3. WRITE/READ
tCSW
VIH
CSN
VIL
tCSH
VIH
CCLK
CDTI
VIL
D3
D2
D1
VIH
D0
VIL
Hi-Z
CDTO
Figure 4. WRITE
VIH
CSN
VIL
VIH
CCLK
VIL
CDTI
A1
VIH
A0
VIL
tDCD
CDTO
Hi-Z
D7
Figure 5. READ
D6
D5
50%DVDD
1
MS0157-J-03
2010/08
-8-
[AK4117]
tCSW
VIH
CSN
VIL
tCSH
VIH
CCLK
VIL
VIH
CDTI
VIL
tCCZ
CDTO
D3
D2
D1
Figure 6. READ
50%DVDD
D0
2
tPW
PDN
VIL
Figure 7.
MS0157-J-03
2010/08
-9-
[AK4117]
■ Non-PCM/DTS-CD
AK4117 Non-PCM
Dolby “AC-3 Data Stream in IEC60958 Interface”
32
Mode Non-PCM
NPCM
“1”
96
sync code 0x0000, 0x0000, 0x0000, 0x0000, 0xF872 and 0x4E1F
NPCM
“1”
4096
4096
sync code
NPCM= “0”
sync code
NPCM
“0”
(
: Figure
27, Figure 28
)
sync code
2
(Pc: burst information,
Pd: length code; Table 10, Table 11
)
DTS-CD
DTSCD
“1”
4096
sync code
DTSCD= “0”
sync code
DTSCD
“0”
NPCM
DTSCD
OR AUTO
AK4117 DTS-CD
14bit Sync Word
16bit Sync Word (0x7FFE8001)
■ 192kHz
PLL 32kHz
192kHz
20ms
(32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz)
UNLCK
“1”
■
AK4117
2
1) RX
2) DAUX
PLL
X’tal
CM1-0
X'tal
(Table 1) Mode 2
PLL
Mode 3
Mode 2, 3
PLL X'tal
RX
Mode
0
1
CM1
0
0
2
1
3
1
Note: X’tal
XTI
CM0
0
1
Unlock (UNLCK= “1”)
X’tal
UNLCK
PLL
X'tal
Clock source
ON
ON(Note)
PLL
OFF
ON
X'tal
0
ON
ON
PLL
0
1
ON
ON
X'tal
1
ON
ON
X'tal
ON:
(Power-up), OFF:
(Power-Down)
(XTL1-0= “11”)
SDTO
RX
DAUX
RX
DAUX
DAUX
Default
OFF
Table 1.
MS0157-J-03
2010/08
- 10 -
[AK4117]
■
AK4117
PLL
512fs 192kHz
256fs,512fs
(Default)
(Table 2) 96kHz
“1”
48kHz
MCKO
X’tal
MCKO
X’tal
(x1 or x1/2)
LP
1
LP
256fs
fs
XCKS1-0
(Table 3)
PCKS1
0
0
1
1
x
0
PCKS1-0
MCKO= “L”
PLL
DIV
PCKS0
0
1
0
1
x
MCKO
512fs
256fs
128fs
N/A
256fs
fs [kHz]
32 ∼ 48
32 ∼ 96
32 ∼ 192
N/A
32 ∼ 48
X’tal
Default
Table 2.
(PLL mode: Clock operation mode 0, 2(UNLCK=0))
XCKS1
0
0
1
1
XCKS0
0
1
0
1
X’tal
or
EXT
128fs
256fs
512fs
1024fs
fs [kHz]
MCKO
DIV=0
128fs
256fs
512fs
1024fs
DIV=1
64fs
128fs
256fs
512fs
EXTCLK [MHz]
2.048
16
8
N/A
N/A
4.096
32
16
8
N/A
8.192
64
32
16
8
11.2896
88.2
44.1
N/A
N/A
X’tal [MHz]
12.288 24.576
96
192
48
96
N/A
48
N/A
N/A
Default
Table 3.
(X’tal mode: Clock operation mode 1, 2(UNLCK=1), 3)
MS0157-J-03
2010/08
- 11 -
[AK4117]
■
AK4117 XTI
1) X’tal
XTI
XTO
(X’tal)
XTI
AK4117
XTO
Figure 8. X’tal
(EXCK= “0”)
(Typ.10-40pF)
Note:
2)
EXCK
“1”
XTI
XTO
XTI
External Clock
AK4117
XTO
Figure 9.
3) XTI/XTO
CM1-0
XTI
“00”
XTL1-0
(EXCK= “1”)
“11”
XTI, XTO
XTI
AK4117
XTO
Figure 10. OFF
(CM1-0= “00”, XTL1-0= “11”)
MS0157-J-03
2010/08
- 12 -
[AK4117]
■
AK4117
2
1) X’tal
X’tal
RX
RX
X’tal
FS3-0
XTL1-0
(Table 4)
2) RX
XTL1-0= “11”
FS3-0
XTL1
0
0
1
1
XTL0
0
1
0
1
X’tal Frequency
11.2896MHz
12.288MHz
24.576MHz
Default
Table 4.
XTL1-0= “11”
XTL1-0= “11”
Register output
fs
Clock comparison
(Note 10)
FS3
FS2
0
0
0
0
1
1
1
1
Note 10.
0
0
0
0
0
0
1
1
FS1
FS0
0
0
1
1
0
1
0
1
±3%
0
1
0
1
0
0
0
0
44.1kHz
Reserved
48kHz
32kHz
88.2kHz
96kHz
176.4kHz
192kHz
44.1kHz ± 3%
Reserved
48kHz ± 3%
32kHz ± 3%
88.2kHz ± 3%
96kHz ± 3%
176.4kHz ± 3%
192kHz ± 3%
Consumer
mode
(Note 11)
Byte3
Bit3,2,1,0
0000
0001
0010
0011
(1000)
(1010)
(1100)
(1110)
Professional mode
Byte0
Bit7,6
01
10
11
00
00
00
00
32kHz∼192kHz
Note 11.
Byte3 Bit3-0
Byte4
Bit6,5,4,3
0000
(Others)
0000
0000
1010
0010
1011
0011
FS3-0= “0001”
FS3-0
Table 5.
PEM
(CS12=0
)
1
CS12
= “1”
2
PEM
Pre-emphasis
0
1
OFF
ON
Consumer mode
Professional mode
Byte 0
Bits 3-5
≠ 0X100
0X100
Byte 0
Bits 2-4
≠110
110
Table 6.
MS0157-J-03
2010/08
- 13 -
[AK4117]
■
AK4117
PDN
PWN
RSTN
PDN
PDN
“L”
:
“L”
RSTN
“0”
(
00H D0):
RSTN, PWN, XTL1-0, EXCK
“0”
SDTO
“L”
RSTN, PWN, XTL1-0,
EXCK
PWN
(
00H D1):
“0”
PLL
X’tal
■
AK4117 2
(RX0, RX1)
IPS
(Table 7)
UOUTE= “1”
350mVpp
U-
(User data) UOUT
IPS
0
1
INPUT Data
RX0
RX1
Default
Table 7.
UOUT
SDTO
R191
R190
L0
R0
L191
L31
L1
L0
R191
L30
R31
R30
L32
L31
LRCK
2
(except I S)
LRCK
(I2S)
Figure 11. UOUT
MS0157-J-03
2010/08
- 14 -
[AK4117]
■
0.1uF
RX
75Ω
Coax
75Ω
AK4117
Figure 12.
Note: Coaxial
50mV
(Coaxial
)
RX
3.3V
3.3V
470
Optical
Fiber
RX
O/E
Optical Receiver
AK4117
Figure 13.
(
, 3.3V
MS0157-J-03
Optical Receiver
)
2010/08
- 15 -
[AK4117]
■ U-
(Q-subcode)
U
1)
2)
3)
4)
CD Q-subcode
Subcode sync word (S0,S1)
Start
“1”
Q-W 7
start
Start
8-16
Q-subcode
“0”
QINT
S0
S1
S2
S3
:
S97
S0
S1
S2
S3
:
1
0
0
1
1
:
1
0
0
1
1
:
Q3 Q4
CTRL
Q5
Q6
QINT
“0”
2
3
4
5
6
7
8
*
0
0
0
0
0
0
0
0…
0
0
0
0
0
0
0
0…
Q2 R2 S2
T2
U2 V2 W2 0…
Q3 R3 S3
T3
U3 V3 W3 0…
:
:
:
:
:
:
:
:
Q97 R97 S97 T97 U97 V97 W97 0…
0
0
0
0
0
0
0
0…
0
0
0
0
0
0
0
0…
Q2 R2 S2
T2
U2 V2 W2 0…
Q3 R3 S3
T3
U3 V3 W3 0…
:
:
:
:
:
:
:
:
↑
Q
Q2
16
Q7 Q8
ADRS
(*) number of "0" : min=0; max=8.
Figure 14. U(CD)
Q9
Q10 Q11 Q12 Q13 Q14 Q15 Q16 Q17 Q18 Q19 Q20 Q21 Q22 Q23 Q24 Q25
TRACK NUMBER
INDEX
Q26 Q27 Q28 Q29 Q30 Q31 Q32 Q33 Q34 Q35 Q36 Q37 Q38 Q39 Q40 Q41 Q42 Q43 Q44 Q45 Q46 Q47 Q48 Q49
MINUTE
SECOND
FRAME
Q50 Q51 Q52 Q53 Q54 Q55 Q56 Q57 Q58 Q59 Q60 Q61 Q62 Q63 Q64 Q65 Q66 Q67 Q68 Q69 Q70 Q71 Q72 Q73
ZERO
ABSOLUTE MINUTE
ABSOLUTE SECOND
Q74 Q75 Q76 Q77 Q78 Q79 Q80 Q81 Q82 Q83 Q84 Q85 Q86 Q87 Q88 Q89 Q90 Q91 Q92 Q93 Q94 Q95 Q96 Q97
ABSOLUTE FRAME
CRC
G(x)=x16+x12+x5+1
Figure 15.
Addr
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
Q
Register Name
D7
D6
Q-subcode Address / Control
Q9
Q8
Q-subcode Track
Q17
Q16
Q-subcode Index
···
···
Q-subcode Minute
···
···
Q-subcode Second
···
···
Q-subcode Frame
···
···
Q-subcode Zero
···
···
Q-subcode ABS Minute
···
···
Q-subcode ABS Second
···
···
Q-subcode ABS Frame
Q81
Q80
Figure 16. Q-subcode
MS0157-J-03
D5
···
···
···
···
···
···
···
···
···
···
D4
···
···
···
···
···
···
···
···
···
···
D3
···
···
···
···
···
···
···
···
···
···
D2
···
···
···
···
···
···
···
···
···
···
D1
Q3
Q11
···
···
···
···
···
···
···
Q75
D0
Q2
Q10
···
···
···
···
···
···
···
Q74
2010/08
- 16 -
[AK4117]
■
INT1-0
“H”
1. UNLCK: PLL
8
UNLCK= “1”
2. PAR:
“1”
3. AUTO:
Non-Linear PCM
NPCM, DTSCD
DTS-CD
OR
4. V:
5. AUDION:
AUDIO
6. STC:
FS3-0, PEM
7. QINT:
U
“1”
Sync
U-
“1”
8. CINT:
Sync
Sync
“1”
1
8
INT
OR
INT
(
05H
1024/fs (EFH1-0
) INT0
“H”
)
INT1
“L”
UNLCK, AUTO, V, AUDION
“1”
“H”
PAR
Operation Mode 1)
PAR, STC, QINT, CINT
INT
05H
1
“L”
INT1 AUTO, V, AUDION
INT1-0
“L”
UNLCK
1
0
0
Event
PAR
x
1
0
PLL OFF
Others
x
x
x
INT0 UNLCK,
(Clock
SDTO Pin
“L”
Previous Data
Output
Table 8.
MS0157-J-03
2010/08
- 17 -
[AK4117]
Interrupt
(UNLCK, PAR,..)
(Interrupt)
INT0 pin
Hold Time (max: 4096/fs)
INT1 pin
Hold Time = 0
Register (PAR,STC,
CINT,QINT)
Reset
Hold ”1”
Register
(others)
Command
MCKO,BICK,LRCK
(UNLCK)
READ 05H
Free Run
(fs: around 20kHz)
MCKO,BICK,LRCK
(except UNLCK)
SDTO
(UNLCK)
SDTO
(PAR error)
Previous Data
SDTO
(others)
Normal Operation
Figure 17. INT1-0
MS0157-J-03
2010/08
- 18 -
[AK4117]
PDN pin ="L" to "H"
Initialize
Read 05H
INT0/1 pin ="H"
No
Yes
Release
Muting
Mute DAC output
Read 05H
(Each Error Handling)
Read 05H
(Resets registers)
No
INT0/1 pin ="H"
Yes
Figure 18.
1
MS0157-J-03
2010/08
- 19 -
[AK4117]
PDN pin ="L" to "H"
Initialize
Read 05H
No
INT1 pin ="H"
Yes
Read 05H
and
Detect QSUB= “1”
(Read Q-buffer)
QCRC = “0”
No
New data
is invalid
Yes
INT1 pin ="L"
No
Yes
New data
is valid
Figure 19.
(Q/CINT)
MS0157-J-03
2010/08
- 20 -
[AK4117]
■
6
(Table 9)
BICK 64fs
Mode 3-5
20
4
DIF2-0
SDTO BICK
SDTO
Aux
Parity Error
MSB
DAUX
(Mode 0-2)
Figure 20
SDTO
LSB
“L”
PLL
unlock
Clock Mode 2
Mode 5
2’s
“0”
Clock Mode 3
24
, Left justified
Mode 5
I2S
DAUX
Clock Mode 1 PLL
DAUX
SDTO
DAUX
SDTO
sub-frame of IEC60958
0
3 4
preamble
7 8
11 12
27 28 29 30 31
Aux.
V U C P
LSB
MSB
MSB
LSB
23
0
AK4117 Audio Data (MSB First)
Figure 20.
Mode
0
1
2
3
4
5
6
7
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
0
1
0
1
0
1
0
1
DAUX
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, I2S
SDTO
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
LRCK
H/L
H/L
H/L
H/L
H/L
L/H
Default
Reserved
Table 9.
MS0157-J-03
2010/08
- 21 -
[AK4117]
LRCK
0
1
2
15
16
17
31
0
1
2
15
16
17
31
0
1
0
1
0
1
BICK
(64fs)
15
14
1
0
15
14
1
0
SDTO
15:MSB, 0:LSB
Rch Data
Lch Data
Figure 21. Mode 0
LRCK
0
1
2
9
10
12
11
31
0
1
2
9
10
11
12
31
BICK
(64fs)
23
22
21
20
1
0
23
22
21
20
1
0
SDTO
23:MSB, 0:LSB
Rch Data
Lch Data
Figure 22. Mode 3
LRCK
0
1
2
21
22
24
23
31
0
1
2
21
22
23
24
31
BICK
(64fs)
23
22 21
2
1
0
23 22
3
2
1
0
23 22
SDTO
23:MSB, 0:LSB
Rch Data
Lch Data
Figure 23. Mode 4
LRCK
0
1
2
22
24
23
25
31
0
1
2
21
22
23
24
25
31
0
1
BICK
(64fs)
SDTO
23
22 21
2
1
23 22
0
3
2
1
0
23
23:MSB, 0:LSB
Rch Data
Lch Data
Figure 24. Mode 5
MS0157-J-03
2010/08
- 22 -
[AK4117]
■
4
I/F (CSN, CCLK, CDTI, CDTO)
I/F
Chip address (2bits, AK4117
“00”
Read/Write (1bit), Register address (MSB first, 5bits) Control Data (MSB first, 8bits)
CCLK
“↓”
“↑”
CSN
“↑”
CSN “↑”
Hi-Z
CCLK
5MHz (max)
PDN
= “L”
),
CSN
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CCLK
CDTI
WRITE
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
CDTO
CDTI
READ
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
CDTO
C1,C0:
R/W:
A4-A0:
D7-D0:
D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
Chip Address (Fixed to “00”)
READ/WRITE (0:READ, 1:WRITE)
Register Address
Control Data
Figure 25. 4
I/F
MS0157-J-03
2010/08
- 23 -
[AK4117]
■
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H
Power Down Control
0
0
0
EXCK
XTL1
XTL0
PWN
RSTN
01H
Clock Control
LP
PCKS1
PCKS0
DIV
XCKS1
XCKS0
CM1
CM0
02H
Input/Output Control
IPS
UOUTE
CS12
EFH1
EFH0
DIF2
DIF1
DIF0
03H
INT0 MASK
MULK0
MPAR0
MAUT0
MV0
MAUD0
MSTC0
MCIT0
MQIT0
04H
INT1 MASK
MULK1
MPAR1
MAUT1
MV1
MAUD1
MSTC1
MCIT1
MQIT1
05H
Receiver status 0
UNLCK
PAR
AUTO
V
AUDION
STC
CINT
QINT
06H
Receiver status 1
0
DTSCD
NPCM
PEM
FS3
FS2
FS1
FS0
07H
Receiver status 2
0
0
0
0
0
0
CCRC
QCRC
08H
RX Channel Status Byte 0
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
09H
RX Channel Status Byte 1
CR15
CR14
CR13
CR12
CR11
CR10
CR9
CR8
0AH
RX Channel Status Byte 2
CR23
CR22
CR21
CR20
CR19
CR18
CR17
CR16
0BH
RX Channel Status Byte 3
CR31
CR30
CR29
CR28
CR27
CR26
CR25
CR24
0CH
RX Channel Status Byte 4
CR39
CR38
CR37
CR36
CR35
CR34
CR33
CR32
0DH
Burst Preamble Pc Byte 0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
0EH
Burst Preamble Pc Byte 1
PC15
PC14
PC13
PC12
PC11
PC10
PC9
PC8
0FH
Burst Preamble Pd Byte 0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
10H
Burst Preamble Pd Byte 1
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
11H
Q-subcode Address / Control
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
12H
Q-subcode Track
Q17
Q16
Q15
Q14
Q13
Q12
Q11
Q10
13H
Q-subcode Index
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
14H
Q-subcode Minute
Q33
Q32
Q31
Q30
Q29
Q28
Q27
Q26
15H
Q-subcode Second
Q41
Q40
Q39
Q38
Q37
Q36
Q35
Q34
16H
Q-subcode Frame
Q49
Q48
Q47
Q46
Q45
Q44
Q43
Q42
17H
Q-subcode Zero
Q57
Q56
Q55
Q54
Q53
Q52
Q51
Q50
18H
Q-subcode ABS Minute
Q65
Q64
Q63
Q62
Q61
Q60
Q59
Q58
19H
Q-subcode ABS Second
Q73
Q72
Q71
Q70
Q69
Q68
Q67
Q66
1AH
Q-subcode ABS Frame
Q81
Q80
Q79
Q78
Q77
Q76
Q75
Q74
: PDN
RSTN
PWN
“L”
“0”
RSTN, PWN, XTL1-0, EXCK
“0”
MS0157-J-03
2010/08
- 24 -
[AK4117]
■
Addr
Register Name
00H Power Down Control
R/W
Default
D7
0
RD
0
D6
0
RD
0
D5
0
RD
0
D4
EXCK
R/W
0
D3
XTL1
R/W
0
D2
XTL0
R/W
0
D1
PWN
R/W
1
D0
RSTN
R/W
1
RSTN:
0:
1:
&
(RSTN, PWN, XTL1-0, EXCK
(Default)
)
PWN:
0:
1:
(Default)
XTL1-0:
EXCK:
(Table 4; Default: 00)
0:
1:
Addr
Register Name
01H Clock Control
R/W
Default
CM1-0:
XCKS1-0: X’tal
DIV: X’tal
0:
1: 2
PCKS1-0: PLL
LP:
0:
1:
(Default)
(X’tal
D7
LP
R/W
1
)
D6
PCKS1
R/W
0
D5
PCKS0
R/W
1
D4
DIV
R/W
0
D3
D2
XCKS1 XCKS0
R/W
R/W
0
1
D1
CM1
R/W
0
D0
CM0
R/W
0
(Table 1; Default: 00)
(Table 3; Default: 01)
(Default)
(Table 2; Default: 01)
(Table 2)
(Default)
fs
48kHz
MS0157-J-03
2010/08
- 25 -
[AK4117]
Addr
Register Name
02H Format Control
R/W
Default
D7
IPS
R/W
0
D6
UOUTE
R/W
0
D5
CS12
R/W
0
DIF2-0:
D4
EFH1
R/W
0
D3
EFH0
R/W
1
D2
DIF2
R/W
1
D1
DIF1
R/W
0
D0
DIF0
R/W
0
(Table 9; Default: 100)
EFH1-0: INT0
00: 512 LRCK
10: 2048 LRCK
01: 1024 LRCK (Default)
11: 4096 LRCK
CS12:
0: Channel 1 (Default)
1: Channel 2
C
, AUDION, PEM, FS3-0, Pc, Pd, CRC
UOUTE: U
0:
1:
(Default)
UOUT
IPS:
U
(Table 7)
0: RX0 (Default)
1: RX1
MS0157-J-03
2010/08
- 26 -
[AK4117]
Addr
Register Name
03H INT0 MASK
R/W
Default
MQIT0:
MCIT0:
MSTC0:
MAUD0:
MV0:
MAUT0:
MPAR0:
MULK0:
D4
MV0
R/W
1
D3
D2
D1
MAUD0 MSTC0 MCIT0
R/W
R/W
R/W
1
1
1
D0
MQIT0
R/W
1
D4
MV1
R/W
0
D3
D2
D1
MAUD1 MSTC1 MCIT1
R/W
R/W
R/W
0
1
1
D0
MQIT1
R/W
1
QINT
CINT
STC
AUDION
V
AUTO
PAR
UNLOCK
0:
1:
“0”
Addr
Register Name
04H INT0 MASK
R/W
Default
MQIT1:
MCIT1:
MSTC1:
MAUD1:
MV1:
MAUT1:
MPAR1:
MULK1:
D7
D6
D5
MULK0 MPAR0 MAUT0
R/W
R/W
R/W
0
0
1
INT0
D7
D6
D5
MULK1 MPAR1 MAUT1
R/W
R/W
R/W
1
1
0
QINT
CINT
STC
AUDION
V
AUTO
PAR
UNLOCK
0:
1:
“0”
INT1
MS0157-J-03
2010/08
- 27 -
[AK4117]
Addr
Register Name
05H Receiver status 0
R/W
Default
D7
UNLCK
RD
0
D6
PAR
RD
0
D5
AUTO
RD
0
D4
V
RD
0
D3
AUDION
RD
0
D2
STC
RD
0
D1
CINT
RD
0
D0
QINT
RD
0
QINT: Q
0:
Addr=11H
1:
1AH
0:
Addr=08H
0CH
Q
“1”
CINT:
1:
C
“1”
STC:
0:
FS3-0
AUDION: Audio
0: Audio
1:
PEM
STC
“1”
1: Non Audio
V:
0: Valid
AUTO: Non-PCM
0:
1: Invalid
DTS-CD
1:
NPCM, DTSCD
OR
PAR:
0:No Error
1:Error
“1”
UNLCK: PLL
0:
QINT, CINT, STC, PAR
1:
Addr=05H
READ
MS0157-J-03
“0”
2010/08
- 28 -
[AK4117]
Addr
Register Name
06H Receiver status 1
R/W
Default
D7
0
RD
0
FS3-0:
PEM:
D6
DTSCD
RD
0
D5
NPCM
RD
0
D4
PEM
RD
0
D3
FS3
RD
0
D2
FS2
RD
0
D1
FS1
RD
0
D0
FS0
RD
1
D5
0
RD
0
D4
0
RD
0
D3
0
RD
0
D2
D1
CCRC
RD
0
D0
QCRC
RD
0
(Table 5)
0: OFF
1: ON
NPCM: Non-PCM
0:
DTSCD: DTS-CD
0:
1:
1:
Addr
Register Name
07H Receiver status 2
R/W
Default
QCRC: Q
D7
0
RD
0
D6
0
RD
0
0
RD
0
CRC
0:
CCRC:
1:
CRC
0:
1:
CS12
MS0157-J-03
2010/08
- 29 -
[AK4117]
Addr
08H
09H
0AH
0BH
0CH
Register Name
RX Channel Status Byte 0
RX Channel Status Byte 1
RX Channel Status Byte 2
RX Channel Status Byte 3
RX Channel Status Byte 4
R/W
Default
D7
CR7
CR15
CR23
CR31
CR39
D6
CR6
CR14
CR22
CR30
CR38
Addr
0DH
0EH
0FH
10H
(192
Register Name
Burst Preamble Pc Byte 0
Burst Preamble Pc Byte 1
Burst Preamble Pd Byte 0
Burst Preamble Pd Byte 1
R/W
Default
PC15-0:
PD15-0:
Addr
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
Register Name
Q-subcode Address / Control
Q-subcode Track
Q-subcode Index
Q-subcode Minute
Q-subcode Second
Q-subcode Frame
Q-subcode Zero
Q-subcode ABS Minute
Q-subcode ABS Second
Q-subcode ABS Frame
R/W
Default
D4
CR4
CR12
CR20
CR28
CR36
D3
CR3
CR11
CR19
CR27
CR35
D2
CR2
CR10
CR18
CR26
CR34
D1
CR1
CR9
CR17
CR25
CR33
D0
CR0
CR8
CR16
CR24
CR32
D2
PC2
PC10
PD2
PD10
D1
PC1
PC9
PD1
PD9
D0
PC0
PC8
PD0
PD8
RD
Not initialized
CR39-0:
1
D5
CR5
CR13
CR21
CR29
CR37
)
D7
PC7
PC15
PD7
PD15
Byte 4-0
40
D6
PC6
PC14
PD6
PD14
D5
PC5
PC13
PD5
PD13
D4
PC4
PC12
PD4
PD12
D3
PC3
PC11
PD3
PD11
RD
Not initialized
Pc Byte 0, 1
Pd Byte 0, 1
D7
D6
D5
D4
D3
D2
D1
D0
Q9
Q17
Q25
Q33
Q41
Q49
Q57
Q65
Q73
Q81
Q8
Q16
Q24
Q32
Q40
Q48
Q56
Q64
Q72
Q80
Q7
Q15
Q23
Q31
Q39
Q47
Q55
Q63
Q71
Q79
Q6
Q14
Q22
Q30
Q38
Q46
Q54
Q62
Q70
Q78
Q5
Q13
Q21
Q29
Q37
Q45
Q53
Q61
Q69
Q77
Q4
Q12
Q20
Q28
Q36
Q44
Q52
Q60
Q68
Q76
Q3
Q11
Q19
Q27
Q35
Q43
Q51
Q59
Q67
Q75
Q2
Q10
Q18
Q26
Q34
Q42
Q50
Q58
Q66
Q74
RD
Not initialized
Q2-81: Q-subcode (Figure 14 and Figure 15)
U
1
80
MS0157-J-03
2010/08
- 30 -
[AK4117]
■ Non-PCM
sub-frame of IEC60958
0
3 4
preamble
7 8
11 12
Aux.
27 28 29 30 31
LSB
MSB V U C P
16 bits of bitstream
0
Pa Pb Pc Pd
15
Burst_payload
stuffing
repetition time of the burst
Figure 26. IEC60958
Preamble word
Pa
Pb
Pc
Pd
Length of field
16 bits
16 bits
16 bits
16 bits
Table 10.
Contents
sync word 1
sync word 2
Burst info
Length code
MS0157-J-03
Value
0xF872
0x4E1F
see Table 11
numbers of bits
2010/08
- 31 -
[AK4117]
Bits of Pc value
contents
0-4
data type
NULL data
Dolby AC-3 data
reserved
PAUSE
MPEG-1 Layer1 data
MPEG-1 Layer2 or 3 data or MPEG-2 without extension
MPEG-2 data with extension
MPEG-2 AAC ADTS
MPEG-2, Layer1 Low sample rate
MPEG-2, Layer2 or 3 Low sample rate
reserved
DTS type I
DTS type II
DTS type III
ATRAC
ATRAC2/3
reserved
reserved, shall be set to “0”
error-flag indicating a valid burst_payload
error-flag indicating that the burst_payload may contain
errors
data type dependent info
bit stream number, shall be set to “0”
Table 11.
Pc
5, 6
7
8-12
13-15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16-31
0
0
1
0
repetition time of burst
in IEC958 frames
MS0157-J-03
≤4096
1536
384
1152
1152
1024
384
1152
512
1024
2048
512
1024
2010/08
- 32 -
[AK4117]
■ Non-PCM
1) Non-PCM
4096
PDN pin
Bit stream
Pa Pb Pc1 Pd1
Pa Pb Pc2 Pd2
Repetition time
Pa Pb Pc3 Pd3
>4096 frames
AUTO bit
Pc Register
“0”
Pd Register
“0”
Pc1
Pc2
Pd1
Pd2
Figure 27.
2) Non-PCM
Pc3
Pd3
1
(MULK0=0
)
INT0 hold time
INT0 pin
<20mS (Lock time)
Bit stream
Pa Pb Pc1 Pd1
Stop
Pa Pb Pcn Pdn
2~3 Syncs (B,M or W)
<Repetition time
AUTO bit
Pc Register
Pd Register
Pc0
Pc1
Pd0
Pcn
Pd1
Figure 28.
Pdn
2
MS0157-J-03
2010/08
- 33 -
[AK4117]
Figure 29
12k
3.3V Supply
S/PDIF
(see Figure 12-14)
+
10u 0.1u
(Shield)
10u
+
3.3V Supply
1
R
AVSS
24
2
AVDD
PDN
23
3
RX1
INT0
22
4
NC
INT1
21
5
RX0
CSN
20
6
DVDD
CCLK
19
7
DVSS
CDTI
18
8
XTI
CDTO
17
9
XTO
UOUT
16
10
LRCK
NC
15
11
BICK
MCKO
14
12
SDTO
DAUX
13
0.1u
AK4117
Microcontroller
C
(see Figure 8-10)
C
DSP
AD/DA
Figure 29.
Notes:
(1) C
(2) AVSS
(Typ.10-40pF)
DVSS
MS0157-J-03
2010/08
- 34 -
[AK4117]
24pin VSOP (Unit: mm)
1.25±0.2
*7.8±0.15
13
A
7.6±0.2
*5.6±0.2
24
12
1
0.22±0.1
0.65
0.15±0.05
0.1±0.1
0.5±0.2
Detail A
Seating Plane
0.10
NOTE: Dimension "*" does not include mold flash.
0-10°
■
:
:
:
MS0157-J-03
2010/08
- 35 -
[AK4117]
AKM
AK4117VF
AAXXXX
Contents of AAXXXX
AA:
Lot#
XXXX: Date Code
Date (YY/MM/DD)
02/05/27
02/12/12
Revision
00
01
Reason
Page
Contents
3
21
Pin#14: MCLK
MCKO
Audio Serial Interface Format
“The DIF2-0 pins can select...” → “The DIF2-0 bits can select...”
04/04/19
02
16
32
10/08/11
03
11
Figure 16.Q-subcode
Addr = 16H~1FH → 11H~1AH
Table 11.
Pc
Value 7: reserved → MPEG2 AAC ADTS;
repetition time of burst: 1024
Value 14: reserved → ATRAC;
repetition time of burst: 512
Value 15: reserved → ATRAC2/3;
repetition time of burst: 1024
Value 27: (Reserved for MPEG-4 AAC data) → reserved
Value 28: MPEG-2 AAC data → reserved
Table 3. EXTCLK
MS0157-J-03
2010/08
- 36 -
[AK4117]
z
z
z
z
z
z
MS0157-J-03
2010/08
- 37 -