DS89C450-K00 DS89C450 Evaluation Kit www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS89C450-K00 Evaluation Kit is a proven platform to conveniently evaluate the capabilities of the Ultra-High-Speed Flash Microcontroller family. The kit contains the DS89C450 in a DIP-40 socket, 128K of SRAM mapped through a preprogrammed CPLD, a power-supply regulator, two DB-9 serial connectors, and switches and LEDs to control and display board operation. With the addition of a power supply and an RS-232 cable connected to a personal computer, the kit provides a completely functional system ideal for application development and debug. § Easily Load Code Using Bootstrap Loader and Serial 0 Port (DB-9, J2) § Two DB-9 RS-232 Serial Connectors § Two Internal Serial Ports § On-Board Power Supply Regulator § 128K of On-Board Program+Data RAM § Preprogrammed Xilinx CPLD Handles Address Multiplexing and RAM Mapping § LED Display of Port 0 Levels § Push-Button Switches for Reset and Interrupt Generation § Prototyping Area § Board Schematics Included to Provide a Convenient Reference Design The DS89C450-K00 can also be used as a programming and development platform for the DS5000(T). Quick-start instructions and sample programs can be obtained from the DS5000 directory on the software tool disk, or from Dallas Semiconductor technical support. Email us at [email protected]. ORDERING INFORMATION EVALUATION KIT CONTENTS Evaluation Kit Board with Processor and 16.384MHz Crystal Installed PART TEMP RANGE DIMENSIONS DS89C450-K00 Room Approx. 16cm x 10cm 8051-Based Microcontroller Software Eval Disk Figure 1. DS89C450 Evaluation Kit Board 1 of 12 REV: 092704 DS89C450-K00, DS89C450 Evaluation Kit COMPONENT LIST DESIGNATION QTY DESCRIPTION SUPPLIER PART C1, C6 2 100mF, 25V radial capacitors Panasonic ECA-1EM101 C2, C7 C3, C4, C5, C8–C15 C16, C17 2 22mF, 10V tantalum capacitors Panasonic ECS-T1AX226R 11 0.1mF capacitors (0805) Generic 2 22pF capacitors Panasonic ECJ-2VC1H220J J1 J2, J3 J4 J5 JP1, JP2 R1, R4 R2, R3 R5 RN1, RN3, RN4 RN2 SW1, SW4, SW5 SW2, SW3 U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 Y1 1 2 1 1 2 2 2 1 3 1 3 2 1 1 1 1 1 1 — 1 1 1 1 2mm male power-barrel connector DB9 RS-232 female connectors Micro header pins (unpopulated) Spare input header pins (unpopulated) Solder pad jumpers (closed) 1.1kW resistors (0805) 10kW resistors (0805) 680W resistor (0805) Resistor pack (8) – 330W Resistor pack (8) – 3.3kW DIP switch x8 SPST pushbutton 350mA linear regulator (5V) 350mA linear regulator (3.3V) DS89C450 microcontroller (40-PDIP) Quad buffer Preprogrammed 44-pin CPLD 128k x 8 asynchronous cache SRAM Unpopulated RS-232 transceiver (2 Tx, 2 Rx) Inverting octal buffer LED x10 display (Port 1 + power) 16.384MHz crystal (socketed) CUI Inc. Amp/Tyco PJ-002A 745781-4 Generic Generic Generic CTS CTS C&K Panasonic MAXIM MAXIM DALLAS Fairchild Xilinx Cypress — MAXIM Fairchild Lumex Citizen 770101331 770101332 SDA08H1KD EVQ-PAC04M MAX1659ESA MAX1658ESA DS89C450-MNL 74AC125 XC9536XL-10PC44C AS7C1024A-10TJC — MAX233ACWP 74AC540 SSA-LXB10IW-GF/LP HC49US16.384MABJ MAXIM is a registered trademark of Maxim Integrated Products, Inc. DALLAS is a registered trademark of Dallas Semiconductor Corp. 2 of 12 DS89C450-K00, DS89C450 Evaluation Kit TYPICAL OPERATING CIRCUIT Figure 2. DS89C450 Evaluation Kit Board Layout DETAILED DESCRIPTION This evaluation kit must be used with the DS89C430/DS89C440/DS89C450 ultra-high-speed flash microcontrollers data sheet and the Ultra-High-Speed Flash Microcontroller User’s Guide (www.maxim-ic.com/user_guides). A complete description of the bootstrap loader commands and functions is located in Section 15 of the Ultra-HighSpeed Flash Microcontroller User’s Guide. The DS89C450 Evaluation Kit Board and all of its connectors are defined in the schematics provided in the accompanying documentation disk. However, a short description of the major components of the board follows. Power Supplies The evaluation kit accepts a DC input supply at J1. The supply should be a 6V to 9V DC supply, center post positive, with at least 300mA capacity. The exact DC input value of the supply is not important, as the on-board linear MAX1658 and MAX1659 regulators produce fixed 5V and 3.3V for use by the kit circuitry. While it is possible to supply up to 16V at J1 (the maximum input voltage of the MAX1658 and MAX1659), this will result in a large amount of heat dissipation from the board. A small heat-sink plane is provided on the backside of the board beneath the linear regulators, but this may be inadequate at input voltages above 9V. If U1 and U2 are hot, lower the DC input voltage at J1. Note that many unregulated DC wall plug-in supplies may provide an output level much higher than their labeled output value if they are lightly loaded. 3 of 12 DS89C450-K00, DS89C450 Evaluation Kit Serial Ports Both serial ports of the DS89C450 (Serial Port 0 and Serial Port 1) are translated to RS-232 levels and brought out to DB9 connectors at J2 and J3. Serial Port 0 (J2) must always be used when communicating with the bootloader. Memory The external memory of the DS89C450 on this evaluation kit is designed to operate with the address and data bus multiplexed on P0 and P2. A 128K x 8 SRAM is installed, which is accessed as both program and data memory by this multiplexed bus. Note that as the total memory space of the DS89C450 is only 64K of program memory and 64K of data memory, port pin memory banking must be used to access the entire 128K-memory space. CPLD The CPLD device on the evaluation kit board is preprogrammed to perform several functions. · Address latching of the low 8 bits of the external memory address from port P0. · Mapping together program and data memory. · Performing port pin memory banking (optional). The RTL code preprogrammed into the CPLD is as follows. module Eval(AD, nRD, ALE, nPSEN, CFG0, CFG1, SW_IN, P1, A, A16, A17, nOE, SW_OUT); input input input input input input input [7:0] AD; nRD; ALE; nPSEN; CFG0; CFG1; SW_IN; // // // // // // // inout [7:0] P1; // Port 1 from micro output [7:0] A; output A16; output A17; output nOE; output SW_OUT; reg // // // // // Multiplexed low-order address and data from micro Data memory read enable from micro Address latch enable from micro Program memory read enable from micro Configuration input zero (from DIP switch) Configuration input one (from DIP switch) Interrupt switch input (from pushbutton) Demultiplexed low-order address to RAM Address line to RAM Address line to RAM Output enable to RAM Interrupt switch output (to micro) [7:0] A; always @(negedge ALE) begin A <= AD; end assign assign assign assign assign assign assign assign assign assign assign assign A16 A17 P1[0] P1[1] P1[2] P1[3] P1[4] P1[5] P1[6] P1[7] nOE SW_OUT = = = = = = = = = = = = (CFG0 == 0) ? (CFG0 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? (CFG1 == 0) ? nRD & nPSEN; SW_IN; P1[0] : 1'b0; P1[1] : 1'b0; SW_IN : 1'bz; SW_IN : 1'bz; SW_IN : 1'bz; SW_IN : 1'bz; ~SW_IN : 1'bz; ~SW_IN : 1'bz; ~SW_IN : 1'bz; ~SW_IN : 1'bz; endmodule 4 of 12 DS89C450-K00, DS89C450 Evaluation Kit DIP switches SW4.3 and SW4.4 are used as configuration inputs by the CPLD program. Normally, these switches should be OFF for proper operation. Turning DIP switch SW4.3 ON causes the high address lines A16 and A17 to be set to the values at port pins P1.0 and P1.1. This can be used for address banking, but is not required for normal operation. Turning DIP switch SW4.4 on puts the CPLD into a test mode; press SW3 to toggle the LEDs. Pushbuttons Reset and interrupt pushbuttons are provided. The reset button resets the DS89C450, while the interrupt button can be configured to pull down either the INT0 (by setting SW1.4 ON) or T0 (by setting SW1.5 ON) inputs to the microcontroller when pressed. Header Pins and Prototyping Area Header J4 provides access to all pins of the DS89C450, including power and ground. This header is adjacent to a 0.100” spaced grid prototyping area for circuit development. GETTING STARTED Before using the DS89C450 Evaluation Kit, the Microcontroller Tool Kit (MTK) application should be installed. MTK is included on the CD and is available at www.maxim-ic.com/products/microcontrollers/software/index.cfm. 1) Connect the DC 6V–9V, center post positive power supply to the power plug J1. 2) Connect a DB9 straight-through serial cable between the PC COM1 port and connector J2. 3) Set DIP switches SW1.1, SW1.2, SW1.3, SW4.1, and SW4.2 ON. All other DIP switches should be OFF. 4) Turn power ON. All the LEDs should light except for the second from the right. 5) Open MTK. In the initial dialog box, select the type of processor you are using (DS89C430, DS89C440, or DS89C450). 6) Select Options -> Configure Serial Port from the menu. Enter COM1 and 14400 baud. 7) Select Target -> Open COM1 at 14400 baud. 8) Select Target -> Connect to Loader. 9) A loader banner should appear, as shown in Figure 3. Refer to the user’s guide for more details on the bootloader commands for the DS89C450. To load an application into the DS89C450 flash memory, first enter “K” at the bootloader prompt to erase the flash, then select File -> Load Flash and open the .hex file you wish to load. The Help menu in MTK provides additional information. The bootloader also allows you to write to Port 1 directly by entering “W P1 xx,” where xx is a hex byte value. If you enter a value such as “W P1 55” or “W P1 AA,” the LED display will change to reflect the new outputs at Port 1. 5 of 12 DS89C450-K00, DS89C450 Evaluation Kit Figure 3. Microcontroller Tool Kit Output TECHNICAL SUPPORT For additional technical support, e-mail your questions to [email protected]. SCHEMATICS The DS89C450-K00 schematics are featured in the following six pages. 6 of 12 5 4 3 2 VCC5 AD[7..0] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 D VUNREG J1 1 2 3 IN G1 G2 1 2 PJ-002A nEA_IN ALE nPSEN TP9 GND A15 A14 A13 A12 A11 A10 A9 A8 C 1 J4 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A[15..8] VCC P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6 P0.7 EA/VPP ALE/PROG PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 GND XTAL1 XTAL2 P3.7/nRD P3.6/nWR P3.5/T1 P3.4/T0 P3.3/nINT1 P3.2/nINT0 P3.1/TXD0 P3.0/RXD0 RST P1.7/nINT5 P1.6/INT4 P1.5/nINT3 P1.4/INT2 P1.3/TXD1 P1.2/RXD1 P1.1/T2EX P1.0/T2 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 XTAL1 XTAL2 nRD nWR D P3[5..0] P35 P34 P33 P32 P31 P30 RST P17 P16 P15 P14 P13 P12 P11 P10 C P1[7..0] Header 2x20 VUNREG U1 3 6 7 2 4 5 1 8 1 VUNREG 2 1 2 Solder Jumper (closed) U2 3 6 7 2 TP7 VCC5 JP2 MAX1658 IN3 IN6 IN7 SHDN OUT4 OUT5 SET GND 4 5 1 8 1 VCC3 2 1 2 Solder Jumper (closed) TP8 VCC3 B 1 + C6 100uF, 25v 2 C2 22uF 10v 2 2 C1 100uF, 25v 2 + 1 1 OUT4 OUT5 SET GND VCC5 1 B IN3 IN6 IN7 SHDN JP1 MAX1659 C7 22uF 10v 1 VCC5 2 A C14 100nF 10v DS89C4x0 Evaluation Kit - Power and Header Rev B Copyright (C) 2003 - Dallas Semiconductor / MAXIM 5 4 3 Size A Document Number Wednesday, August 25, 2004 Sheet 2 1 of 87-2C420-KIT 6 1 A 5 4 3 2 1 VCC5 P10 P11 P12 P13 P14 P15 P16 P17 1 2 3 4 5 6 7 8 P1.0/T2 P1.1/T2EX P1.2/RXD1 P1.3/TXD1 P1.4/INT2 P1.5/INT3 P1.6/INT4 P1.7/INT5 9 RST 31 nEA_IN 29 nPSEN VCC P3.0/RXD0 P3.1/TXD0 P3.2/INT0 P3.3/INT1 P3.4T0 P3.5/T1 P3.6/WR P3.7/RD RST EA PSEN 20 14 2 7 B AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 21 22 23 24 25 26 27 28 A8 A9 A10 A11 A12 A13 A14 A15 XTAL1 XTAL2 AD[7..0] D A[15..8] 30 ALE 19 XTAL1 18 XTAL2 1 2 1 16.384 MHz SOCKETED 2 3 C Y1 DS89C4X0 DS89C4x0 DIP-40 1 U4A 39 38 37 36 35 34 33 32 ALE nLOADER VCC5 P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 1 C 10 11 12 13 14 15 16 17 C16 22pF 10v 2 nWR n RD P1[7..0] P30 P31 P32 P33 P34 P35 GND P3[5..0] D 40 U3 C17 22pF 10v B VCC5 4 74AC125 14 12 7 10 U 4C 14 5 7 VCC5 13 VCC5 11 74AC125 U4B 74AC125 14 9 7 8 6 U 4D 74AC125 nEA_OUT A Rev B DS89C4x0 Evaluation Kit - Processor Copyright (C) 2003 - Dallas Semiconductor / MAXIM 5 4 3 Size A Document Number Wednesday, August 25, 2004 Sheet 2 2 of 87-2C420-KIT 6 1 A 5 4 3 2 1 D D TP1 TCK 1 TP2 T DI 1 TP4 TDO 1 TP5 TMS 1 VCC3 B nRD ALE nPSEN CFG0 CFG1 SW_IN 6 19 7 28 18 9 13 12 P10 P11 P12 P13 P14 P15 P16 P17 32 41 VCCINTb VCCIO A[7..0] A0 A1 A2 A3 A4 A5 A6 A7 A0 A1 A2 A3 A4 A5 A6 A7 26 1 43 24 3 8 11 14 A16 A17 38 35 A16 A17 nOE 29 nOE 20 SW_OUT SW_OUT C B 10 P1[7..0] 4 5 2 22 40 25 TP3 +3 V GNDc P10 P11 P12 P13 P14 P15 P16 P17 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 GNDb n RD ALE nPSEN CFG0 CFG1 SW _IN 36 37 34 33 39 42 27 44 31 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 23 AD[7..0] C TCK TDI TDO TMS VCCINTa 17 15 30 16 GNDa U5 21 1 XC9536XL 1 A TP6 GND Rev B DS89C4x0 Evaluation Kit - CPLD Copyright (C) 2003 - Dallas Semiconductor / MAXIM 5 4 3 Size A Document Number W ednesday, August 25, 2004 Sheet 2 3 of 87-2C420-KIT 6 1 A 5 4 3 2 1 D D OPTIONAL SECOND RAM AD[7..0] AD[7..0] nWR 29 A[15..8] B 1 22 A17 A16 12 11 10 9 8 7 6 5 27 26 23 25 4 28 3 31 2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 D0 D1 D2 D3 D4 D5 D6 D7 13 14 15 17 18 19 20 21 D0 D1 D2 D3 D4 D5 D6 D7 nOE 24 nWR 29 A[15..8] nOE nWE 1 NC nCE1 AS7C1024 22 32 C 13 14 15 17 18 19 20 21 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 nOE nWE B NC nCE1 AS7C1024 A VCC CE2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 GND nOE 24 C A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 30 A[7..0] 16 A16 12 11 10 9 8 7 6 5 27 26 23 25 4 28 3 31 2 CE2 GND A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 16 30 A[7..0] U7 A17 VCC U6 VCC5 32 VCC5 Rev B DS89C4x0 Evaluation Kit - RAM Copyright (C) 2003 - Dallas Semiconductor / MAXIM 5 4 3 Size A Document Number W ednesday, August 25, 2004 Sheet 2 4 of 87-2C420-KIT 6 1 A 5 4 3 2 1 J2 VCC5 TX0 TX1 RX0 RX1 VCC 2 1 RX0_232 7 U11 D T1IN T2IN T1OUT T2OUT 5 18 3 20 R1OUT R2OUT R1IN R2IN 4 19 13 14 10 17 8 C1+ C1VVbV+ C2+ C2b+ C2C2b- 12 15 16 11 GNDb 9 6 DTR0 CTS0 GNDa RTS0 TX0_232 DSR0 D CD0 DB9 RS232 FEMALE SERIAL PORT 0 LOADER D TX1_232 RX1_232 J3 DTR1 CTS1 RX1_232 RTS1 TX1_232 MAX203ECWP DSR1 D CD1 C 5 9 4 8 3 7 2 6 1 DB9 RS232 FEMALE SERIAL PORT 1 C P10 P11 P12 P13 P14 P15 P16 P17 2 3 4 5 6 7 8 9 10 RESISTOR SIP - 330 OHM P10 P11 P12 P13 P14 P15 P16 P17 SW DIP-8 2 3 4 5 6 7 8 9 I0 I1 I2 I3 I4 I5 I6 I7 TURN ON TO PULL PORT 1 LINES LOW U10 nO0 nO1 nO2 nO3 nO4 nO5 nO6 nO7 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 74AC540 VCC5 R N4 1 2 3 4 5 6 7 8 9 10 2 3 4 5 6 7 8 9 10 LXB10XX 1 B 1 1 VCC3 R5 680 Ohm 2 SW5 nOE1 nOE2 10 R N3 1 19 VCC U9 GND P1[7..0] 20 VCC5 nLED B 5 9 4 8 3 7 2 6 1 RESISTOR SIP - 330 OHM 10-SEGMENT RED LED A Rev B DS89C4x0 Evaluation Kit - Serial / Port 1 Copyright (C) 2003 - Dallas Semiconductor / MAXIM 5 4 3 Size A Document Number W ednesday, August 25, 2004 Sheet 2 5 of 87-2C420-KIT 6 1 A 5 4 3 2 1 J5 1 D 1 2 3 4 nLOADER nLED CFG0 CFG1 VCC5 SPARE INPUTS D R1 1.1 K 2 SW1 R N1 nEA_OUT RX0 TX0 SW_OUT nEA_IN P30 P31 P32 P34 P12 P13 RX1_232 RX1 TX1 TX1_232 SW DIP-8 C 1 SW4 2 3 4 5 6 7 8 9 10 2 3 4 5 6 7 8 9 10 RESISTOR SIP - 330 OHM SW 1.1 - ON FOR DS89C4x0 SW 1.2 - ON TO USE SERIAL PORT 0 / LOADER SW 1.3 - ON TO USE SERIAL PORT 0 / LOADER SW 1.4 - ON TO CONNECT SW 3 AND nINT0 SW 1.5 - ON TO CONNECT SW 3 AND T0 SW 1.6 - ON TO USE SERIAL PORT 1 SW 1.7 - ON TO USE SERIAL PORT 1 SW 1.8 - OFF FOR NORMAL USE VCC5 R N2 SW DIP-8 1 RESISTOR SIP - 3.3 K C SW 1.1 - ON FOR LOADER MODE SW 1.2 - ON TO ENABLE LEDs SW 1.3 - OFF FOR NORMAL USE SW 1.4 - OFF FOR NORMAL USE SW 1.5 - UNUSED SW 1.6 - UNUSED SW 1.7 - UNUSED SW 1.8 - UNUSED 1 VCC5 R3 10k B SW2 2 R2 10k SW _IN 2 1 2 4 1 3 INTERRUPT PUSHBUTTON B3FS-1000 3 4 1 2 RST RESET PUSHBUTTON B3FS-1000 2 R4 1.1k B 1 SW3 VCC5 A Rev B DS89C4x0 Evaluation Kit - Switches/Config Copyright (C) 2003 - Dallas Semiconductor / MAXIM Size A 5 4 3 87-2C420-KIT Document Number W ednesday, August 25, 2004 2 Sheet 6 6 of 1 A