67A Hall Effect Joystick I2C User Manual

67A Hall Effect Joystick I2C User Manual
rev. 1.0
67A Hall Effect Joystick
I2C User Manual
Features
• Proportional digital output
• Shaft and panel seal to IP67
• Compact: 1-inch square flange
• Minimal 0.73-inch depth behind panel
• Long operational life > 1 million cycles
Applications
• Medical
• Material handling vehicles
• Mobile electronics for outdoor use
1 Introduction
The 67A joystick is a proportional output joystick which provides an X,Y coordinate (approx., 0-80)
proportional to the joystick location. The X,Y coordinates are read from the joystick via an I2C bus.
Features include:
•
•
•
•
Proportional Joystick
I2C Interface (other interfaces available)
Low Operating Current (3 mA, [email protected] VDD = 3.3V)
Low Power “Sleep Mode” (100 µA, max. @ VDD = 3.3V)
2 Hardware Interface
2.1
Connector - Two options are available – header or ribbon cable with connector.
A. Ribbon cable with Tyco 7-215083-6 connector (Mating header: Tyco 7-215079-6).
B. Header (1x6) – 0.05” centers with 0.025” sq. pins.
Pin #
1
2
3
4
5
6
Signal
SDA
VDD
VSS
SCL
INTn
A1n
I/O
I/O
In
Out
In
Description
I2C Data Line
Power Supply. 3.0V – 3.6VDC
Ground
I2C Clock Line
Interrupt Out. Open Drain. Active Low.
A1n (LSB) of 7 bit I2C address
Table 1: 67A Connector Signals
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
The 67A is an I2C (Slave) with 7 bit I2C address of 80h (A1n floating) or 82h (A1n tied to Gnd).
I2C speed: up to 400 KHz.
External pull-up resistors are required for I2C signals (SDA & SCL- See Sec 2.3 for recommended pull-up
resistors for I2C signals) and INTn (Recommended value 2K-10K).
(See Fig. 1)
INTn – Interrupt Out (Active Low) - Goes low only when a different X, Y value is available. Reading the Y
value causes INTn to go high (inactive). For most efficient use of the I2C bus and processor resources it is
recommended that the INTn signal be used to trigger reading of the X, Y value from the joystick. If INTn is
not used, X, Y values should be read continuously at a rate of 50 samples/sec. An external pull-up
resistor in the range of 2K - 10K (see Fig. 1) is required for INTn.
VDD
HOST CPU
67A JOYSTICK
VDD
Hall
Effect
Sensor
I²C
Slave
µC
Rp*
SDA
VDD
GND
SCL
INTn
A1n
1
2
3
4
5
6
1
2
3
4
5
6
Rp*
VDD
2K 10K*
SDA
SCL
I²C
Master
INTn
µC
SELECT I2C ADDRESS
JUMPER OUT = 80H
JUMPER IN = 82H
* PULL-UP RESISTORS REQUIRED
FIG 1 – 67A Electrical Connection Diagram
2.2
Cable/PCB Trace Length
Cable/PCB Trace Length: Varies with I2C frequency. The I2C Spec. specifies a max. capacitance per
signal line (SCL or SDA) of 400 pF. The bus capacitance is the total of wire, PCB traces and pins. The
longer the cable/PCB trace length the higher the bus capacitance and thus, the lower the operating
frequency that can be used.
2.3
Pull-up Resistors
2.3.1 I2C Signals (SCL, SDA) Pull-up Resistors
The two I2C signals (SDA & SCL) must be pulled up to the power supply voltage at the Host CPU. The
pull-up resistor value depend on the bus capacitance and SCL frequency. See Table 2 below for
recommended pull-up resistor values vs. SCL frequency and bus capacitance:
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
SCL Frequency
Standard Mode (100 KHz)
Fast Mode (400 KHz)
Rp recommended
Bus Load Capacitance
100 pF
200 pF
300 pF
400 pF
6.49KΩ
3.48KΩ
2.49KΩ
2KΩ
2.26KΩ
1.4KΩ
1.1KΩ
Table 2 - Recommended Pull-up Resistors for SCL, SDA vs. Frequency & Bus Capacitance
To determine if a proper pull-up value is being check the low and high voltage levels for SCL and SDA
during I2C bus activity. The signal levels should meet the following requirements with at least a 0.1V
margin:
VL, MAX < 0.3 VDD
VH, MIN > 0.7 VDD
For more on choosing the I2C pull-up resistors see: Sec. 7.1 in I2C-bus specification and user manual,
Rev. 03 (NXP UM10204).
2.3.2 INTn Pull-up Resistor
The pull-up for the INTn signal should be between 2K-10KΩ.
3 I2C Interface
The 67A joystick communicates over an I²C bus (2-wire bi-directional serial interface). The host CPU
(master) must initiate the data transfers, as the 67A is a slave device.
I²C address - The I²C address consists of 7 bits (D7-D1) and a bit (D0) indicating whether it is a Read (1)
or Write (0) cycle. The 67A is shipped from the factory with the 7-bit device I²C address of 80H (‘1000
000X’) when A1n (pin 6) is left floating (not connected). The I²C address may be changed to 82H by
pulling A1n to Gnd. If A1n is changed after power-up then a reset command needs to be sent to the
joystick to make active the new value (A1n is only read by the joystick after a power-up or reset
command). Changing the I2C address would be necessary if two 67A joysticks are connected to the same
I2C bus or if another component connected to the I2C bus shared the same I2C address. To request a
custom I²C address contact Grayhill.
.
SDA is a bi-directional signal and is used to read and write the serial data. The SCL signal is the clock
generated by the host CPU, to synchronize the SDA data in read and write mode. The maximum I²C clock
frequency is 400 KHz with data triggered on the rising edge of SCL.
Clock Stretching - Clock stretching occurs when a device on the bus holds the SCL line low effectively
pausing communication. The joystick (slave) may stretch the clock to allow more time to load data to be
read by the master device. It is important that the I2C Master interfacing with the 67A implement clock
stretching on a byte level for reliable operation with the joystick. See Sec. 5.1.1 for more on clock
stretching.
I2C Registers
3.1
3.1.1
X Register
Bit 7
X(7) sign
R
Bit 6
X(6) MSB
R
Bit 5
X(5)
R
Bit 4
X(4)
R
Bit 3
X(3)
R
3
Bit 2
X(2)
R
Bit 1
X(1)
R
Bit 0
X(0) LSB
R
67A Hall Effect Joystick I2C User Manual
rev. 1.0
Reset value: 0000 0000
• Bit7-0: X coordinate
X coordinate, 2’s complement format (signed –128 to +127).
Note: After every complete I2C transaction the register pointer in the joystick is set to point at the X
register so that X register value can be read without writing to register pointer (See Sec. 3.2).
IMPORTANT: In order to keep X & Y values paired together or “in synch.”, X register data should be read
in an I2C sequence which reads both the X & Y registers as described in Sec. 3.2.1. and Fig. 2.
3.1.2
Y Register
Bit 7
Y(7) sign
R
Bit 6
Y(6) MSB
R
Bit 5
Y(5)
R
Bit 4
Y(4)
R
Bit 3
Y(3)
R
Bit 2
Y(2)
R
Bit 1
Y(1)
R
Bit 0
Y(0) LSB
R
Reset value: 0000 0000
• Bit7-0: Y coordinate
Y coordinate, 2’s complement format (signed –128 to +127)
Reading the Y register will reset INTn output to Hi-Z.
The Y register should be read in a single I2C sequence that reads the X Register first immediately
followed by the Y register as described in Sec. 3.2.1. and Fig. 2.
3.1.3
Control Reg. (76h)
Bit 7
X
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
X
Bit 1
Reset
Bit 0
X
W
X = Do Not Care
Reset value: 1001 1010 (9Ah)
Writing to this register with Reset (Bit 1) high resets joystick and sets all registers to default values. The
Reset bit is set low by the joystick after completing the reset sequence. Note: there is a start-up time
(TP,W) which must be observed after resetting the joystick.
3.2
3.2.1
I2C Read and Write Cycles
Read X & Y Values – When INTn goes low there are new X & Y values available. To read the X
& Y values the external I2C Master should perform a read sequence of 2 bytes without providing a
register address (Joystick always sends X register value followed by Y register value for any 2
byte read without a register address). INTn will go high (inactive) at the beginning of the read of
the Y value (see Fig. 2).
I2C Start Command
81h or 83h (Joystick I2C Address with D0 set for read)
X Byte (Data from Joystick)
Y Byte (Data from Joystick)
I2C Stop Command
Important Note: If a new X & Y value is available before the previous values are read the new values will
over-write the old (with the loss of the oldest values). However, in order to keep the X & Y values paired
together or “in sync”, it is important that the user read the X & Y values in the a single I2C sequence as
shown in Fig. 2. This is also the fastest and most efficient use of the I2C bus.
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
SCL
SDA
Start
I2C Address
R/W ACK
X Reg, Value
ACK
Y Reg, Value
ACK
Stop
INTn
FIG. 2 – Read X & Y Values over I2C Bus
3.2.2
Reset Joystick – To reset the joystick the I2C Master should perform a write sequence of 1 byte
and must provide the register address for Control Reg. :
I2C Start Command
80h or 82h (Joystick I2C Address with D0 low for write)
76h (Register Address for Control Reg.)
9Ah (Data)
I2C Stop Command
Note: after sending the reset command the I2C Master must wait 300 ms before attempting to
access the 67A. At the end of the Nominal Startup Time (TP,W ) the 67A generates the first XY
pair of values and sets INTn low. Thereafter INTn goes low only if the X or Y value changes.
SCL
SDA
Start
I2C Address
R/W ACK
Control Reg, Value = 76h
ACK
Data = 9Ah
ACK
Stop
FIG. 3 – Send Reset Command over I2C Bus
4 Power Modes & Sleep Threshold
4.1
Power Up Sequence – During a power-up once the power supply voltage reaches 3.0V the user
must wait the Nominal Startup Time (TP,W ) before communicating with the joystick over the I2C bus
(also applies to a reset joystick command). At the end of the Nominal Wakeup Time the 67A
generates the first pair of XY values and sets INTn low. Thereafter INTn goes low only if the X or Y
value changes
FIG. 4 – Power Up
Sequence
3.3V
3.0V
VDD
INTn
T P,W
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
4.2
Full Power Mode: In this mode an internal measurement occurs every 20 ms. If the X or Y value
changes from the last values ouptut, the INTn output (Pin 5) is set low signaling new X & Y values
are ready to be read. INTn is cleared (Hi-Z) while the Y value is read. Power consumption is higher
in this mode. As long as the joystick position is outside of the Sleep Zone, it will operate in this
mode.
4.3
Low Power (Sleep) Mode: When the joystick position for both X and Y is within a circle defined as
the Sleep Zone for ten consecutive measurements the joystick goes to the Low Power mode where
power is significantly lower. The Sleep Zone typically extends to a joystick shaft angle of 5° from
the center (See Fig. 6). The last XY value output before entering the Low Power mode is (0,0). As
long as the joystick remains within the circle defined by the threshold, the joystick will remain in the
Low Power Mode and INTn will stay high. When the joystick is moved outside of the Sleep Zone
circle, it returns to the Full Power mode, new XY measurements are available every 20 ms and
power consumption increases. Low Power (Sleep Mode) current may be higher if supply voltage
drops below 2.9V.
+Y
(0,80)
(57,57)
45°
(-80,0)
+X
(80,0)
MAX JOYSTICK
OUTPUT
(0,-80)
- LOW POWER (SLEEP ZONE) - ALL VALUES (0,0)
FIG. 5 – Sleep Zone & Max. Output Circle
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
90
80
Output Along +X, -X, +Y or -Y Axis
70
60
50
40
30
20
10
0
0
2
4
6
8
10
12
14
16
18
Shaft Angle (Deg.)
FIG. 6 – Joystick Output Along X or Y Axis vs. Shaft Angle (Typical)
7
20
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
5 SPECIFICATIONS
NOTICE: Stresses above those listed under “Absolute Maximum Ratings may cause permanent damage
to the device. This is a stress rating only and functional operation of the device above those listed in the
operation listings of this specification is not implied. Exposure above maximum ratings conditions for
extended periods may affect device reliability.
Table 3 - Absolute Maximum Ratings (non operating)
Parameter
DC Supply Voltage
Voltage on all other pins with respect to Vss
Max current sunk by any I/O pin
Storage temperature
Sym.
VDD
VIN
Min
-0.3
-0.3
Tstrg
-55
Max
4.0
VDD + 0.3
25
+100
Typ
3.3
Max
3.6
Unit
V
V
mA
°C
Note
Table 4 - Operating Conditions
Parameter
DC Supply Voltage
Sym.
VDD
High level input voltage
VIH
Low level input voltage
VIL
Leakage Current
Low level output voltage
Current Consumption, Full Power
mode (VDD = 3.3V)
Current Consumption, Low Power
(sleep) mode (VDD = 3.3V)
IIL
Min
3.0
V
SCL, SDA
0.25 VDD
+ 0.8
V
A1n
0.3 VDD
V
SCL, SDA
0.15 VDD
V
-
±5
VOL
±125
nA
0.6
V
A1n
VSS ≤ VPIN ≤ VDD, Pin at
high impedance at 85°C
INTn , SDA
IOL = 6mA, VDD = 3.3V
IDD1
2.5
3.0
mA
Average current VDD pin
IDD2
50
100
µA
Average current VDD pin.
Note 3.
Sample
s/sec
50
Response Time (Full Power Mode)
Response Time (Low Power Mode)
Output with Joystick Released
(Center)
Low Power (Sleep) Threshold
Nominal Startup Time
Operating temperature range
Note
0.7 VDD
Measurement Frequency, (Full
Power mode)
Output with Max. Joystick Deflection
Unit
V
XMAX or
YMAX
XMIN, or
YMIN
20
80
ms
ms
±79
±80
±80
Units
-
0
0
Units
300
+85
Deg
ms
°C
5
TP,W
Tamb
-40
Note 2
Note 2
Notes 1, 4
Note 1: Positive value is for movement in the positive X or Y direction. Negative value is for movement in
the negative X or Y direction. Positive Y direction is indicated by the ▲ symbol on the joystick case.
Note 2: Response time is the time from joystick movement to when new X,Y position data is available
(INTn goes low).
Note 3: For VDD <2.9V current will exceed 100 uA .
Note 4: Max. values along X or Y axis in positive and negative directions.
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
I2C Bus Timing Requirements
5.1
THIGH
TF
TR
TLOW
SCL
THD:DAT
TSU:STA
THD:STO
TSU:DAT
THD:STA
TSU:STO
SDA in
TBUF
TAA
TAA
SDA out
FIG. 7 - I2C Bus Data Requirements
Table 5 - I2C Bus Data Requirements
Parameter
Start condition
Hold time
100 kHz mode
Stop condition
Setup time
100 kHz mode
Stop condition
Hold time
100 kHz mode
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
Data input hold time
400 kHz mode
400 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
T
HD:STO
T HIGH
T HIGH
Typ
Max
—
—
600
—
—
4700
—
—
600
—
—
4000
—
—
600
—
—
4.0
—
—
0.6
—
—
4.7
—
—
1.3
—
—
Unit
Note
ns
After this period, the first clock
pulse is generated
ns
ns
µs
µs
—
—
1000
TR
20 + 0.1CB
—
300
ns
CB is specified to be from
10-400 pF
100 kHz mode
400 kHz mode
TF
—
20 + 0.1CB
—
—
250
250
ns
CB is specified to be from
10-400 pF
100 kHz mode
400 kHz mode
Output valid from
clock
100 kHz mode
Bus capacitive loading
T SU:STO
Min
4000
400 kHz mode
100 kHz mode
SCL delay from
Clock Stretching
T HD:STA
100 kHz mode
Data input setup
time
Bus free time
Sym.
400 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
Full Power
Mode
Low Power
Mode
T HD:DAT
T SU:DAT
T AA
T BUF
0
—
—
ns
0
—
0.9
µs
250
—
—
ns
100
—
—
ns
—
—
3.5
µs
—
—
—
ns
4.7
—
—
1.3
—
—
—
20
—
—
45
—
—
—
400
T DEL
CB
(Note 2)
(Note 1)
µs
Time the bus must be free
before a new transmission
can start
µs
See Fig. 8
pF
Note 1: As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
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67A Hall Effect Joystick I2C User Manual
rev. 1.0
Note 2: A Fast mode (400 kHz) I2C bus device can be used in a Standard mode (100 kHz) I2C bus system, but the
requirement TSU:DAT ≥ 250 ns must then be met. This will automatically be the case if the device does not stretch the
low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output the next
data bit to the SDA line TR max. + TSU:DAT = 1000 + 250 = 1250 ns (according to the Standard mode I2C bus
specification), before the SCL line is released.
5.1.1 Clock Stretching
As mentioned previously the I2C Master that interfaces with the joystick must be capable of clock
stretching on a byte level. The joystick is able to transmit a byte of data at a fast rate, but may need more
time to prepare the next byte to be transmitted. The joystick (slave) holds the SCL line LOW after
transmission and acknowledgment of a byte to force the master into a wait state until the slave is ready
for the next byte transfer in a type of handshake procedure (See Fig. 8 below). See I2C Spec. UM10204,
Rev. 3, Sec. 3.9 for more on clock stretching.
TDEL
SCL
SDA
Start
I2C Address or Data
ACK
Data
FIG. 8 – Clock Stretching by Joystick
Revision History
Date
Rev
Name
07/25/12
9/18/12
1.0
1.1
SAK
SAK
9/19/12
1.2
SAK
Description of Changes
Initial Version – Started from V2.3 of Electrical Spec.
Replaced Fig. 6 (Joystick Output vs. Shaft Angle) with
more accurate graph and changed graph labels.
Corrected Fig. 5 graphic
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