What's new in J-BERT N4903B software release 7.40? PCIe® 3.0 handling of SKPOS: when the SER/FER analysis option (N4903B-A02/-UA2) is installed the error counter ignores changes in the number or length of 128/130bit coded PCIe symbols, the so-called skip ordered sets (SKPOS). Error Detector Trigger Output: activated whenever a filler symbol or SKPOS is recognized. This allows the J-BERT pattern sequencer to react on trigger patterns from a device under test. Requires SER/FER analysis option (N4903B-A02/UA2). MIPI M-PHY: in case of synch-loss no errors are counted. Other: • • N4916B de-emphasis signal converter: updated user manuals (zip file rev. 1.1.15.0) N4876A 28.4 Gb/s multiplexer: updated user manuals (zip file rev. 1.0.0.9) Defects fixed in version 7.40 No. Defect # Description 1 SAD00449745 RJ reported wrong value in jitter tolerance compliance 2 SAD00449746 Number of steps is not set back to default setting in jitter tolerance compliance 3 SAD00454710 Create SCPI command to close pop‐up dialog boxes 4 SAD 00449864, SAD 00452509, SAD 00454106 User documentation fixes Known defects in version 7.40 No. Defect # Description 1 SAD00397466 "Preset Instrument State" button does not reset the various Jitter Tolerance settings. 2 SAD00415423 SER != 0 or BER != 0 after a stop/start 3 SAD00454108 N4903B does not work with Agilent IO‐Library 16.2. Users should not install IO lib 16.2 to J‐BERT 4 SAD00454493 Pressing "Output off" does not turn off outputs of connected N4916B and N4876A s January 2013 Software History J-BERT N4903B software release 7.31 Defects fixed in version 7.31 No. 1 Defect # SAD00452788 Description Jitter sources accidentally turned off during jitter tolerance measurement J-BERT N4903B software release 7.30 Error detector bit rate: display of data rate measured by CDR Support of N4903B-L01/L0x: special option Other: • • N4916B de-emphasis signal converter: updated user manuals (zip file rev. 1.1.13.0) N4876A 28.4 Gb/s multiplexer: updated user manuals (zip file rev. 1.0.0.7) Defects fixed in version 7.30 No. Defect # Description 1 SAD00448020 Double and missing points in jitter tolerance compliance measurement for USB3, PCIe3.0 2 SAD00449006 SER accumulated results not saved in the text file 3 SAD00449667 Reduce intrinsic jitter of disabled BUJ source on certain instruments Known defects in version 7.30 No. 1 2 Defect # Description SAD00397466 "Preset Instrument State" button does not reset the various Jitter Tolerance settings. SAD00415423 SER != 0 or BER != 0 after a stop/start J-BERT N4903B software release 7.20 s January 2013 Support of Microsoft Windows XP FES: • Software is now Windows® XP FES (XP For Embedded Systems) compliant New USB3 compliance patterns added • New USB3 Pattern with unique position of detect symbol for faster synchronization of error detector: CP0_2SKP_for_SER_ED.ptrn New USB3 Pattern with unique position of detect symbol for faster synchronization of error detector: CP0_4SKP_for_SER_ED.ptrn • New N4916B De-Emphasis firmware version 1.1.8.0 released • • Bugfix: Amplitude setting below 12.5mV leads to too big amplitude. Reliability improvement by enhanced power-up/down sequencing. Defects fixed in version 7.20 No. Defect # Description 1 SAD00441279 GUI does no longer allow use of 2^31-1 PRBS in sequences 2 SAD00442285 Jitter Tolerance Characterization Doesn't Work in USB Compliance (SER) Mode. Known defects in version 7.20 No. Defect # 1 2 Description SAD00397466 "Preset Instrument State" button does not reset the various Jitter Tolerance settings. SAD00415423 SER != 0 or BER != 0 after a stop/start J-BERT N4903B software release 7.10 PCIe 3.0 receiver test support: • • • PJ jitter sweep curve according to PCIe 3.0 added (requires opt. J10) Added a new type of PRBS 2^23-1 with the polynomial X^23 + X^21 + X^16 + X^8 + X^5 + X^2 + 1 (same as PCIe 3.0 scrambler); named PRBS23P (:SOURce1::PATTern:: [SELect][?] …,PRBS23P,... ; and sequence language by a new keyword (PRBS23P) expanded correspondingly) Added demo patterns for PCIe 3.0 o s 8x compliance pattern (for lane 0..7 and 8..15) January 2013 o 8x modified compliance pattern (for lane 0..7 and 8..15) Pattern editor improvements: • • • • • • • New dynamic insert mode to automatically increase/reduce the pattern length while editing. Indicate illegal pattern length that cannot be rolled out to pattern length granularity within the maximum pattern length. 8b/10b editing o Indicate running disparity errors for 8b/10b applications. o Indicate that the pattern will cause running disparity errors when being looped. o 8b/10b symbols can now be used together with SATA OOB(out-of-band signaling) mode, this allows entry of Z symbols for OOB application using external channel addition of data out and auy data out. o Define running disparity at the start of the pattern. o Optional automatic correction of running disparity while editing. Export even/odd bits to generate Error Detector expected pattern files to be used in half-rate under-sampling applications. Added conversion options that allow to easily convert Standard to Alternate patterns and vice versa. o Assign standard pattern to A or B. o De-multiplexing standard pattern to A and B. o Multiplex alternate pattern to a standard pattern. o Discard either A or B part on conversion of an alternate pattern to a standard pattern. New and improved Block Edit functionality o Same Block Edit capabilities in pattern editor and sequence pattern editor. o Swap, Copy, Reverse traces o Rotate pattern left/right o Rotate pattern to align at an user defined bit sequence or 8b/10b symbol. o Invert running disparity in 8b/10b mode. o Correct running disparity in 8b/10b mode. Find and Replace functionality for binary, hex, 8b/10b, OOB and PAM4 modes. Others: • • • • Added demo patterns for USB3.0 New sequences for DisplayPort added De-emphasis signal converter N4916B Software update (N4916B zip1.1.4.0) 28 Gb/s Multiplexer N4876A Software update (N4876A zip 1.0.0.4) Notes: • IVI-COM driver version 1.2.7.0 does not yet support Win7 64bit OS. Known defects in version 7.10 No. s Defect # Description January 2013 1 2 SAD00397466 "Preset Instrument State" button does not reset the various Jitter Tolerance settings. SAD00415423 SER != 0 or BER != 0 after a stop/start Defects fixed in version 7.10 No. Defect # Description 1 SAD00439923 Manual Error Insertion on Aux-Data Out in Dual-Channel Mode 2 SAD00439001 Self test always shows "Failed" with N4916B connected 3 SAD00435465 USB CP0 for SER Pattern are wrong. 4 SAD00434860 Aux Data - Output Blanking 5 SAD00434422 GUI crashes 6 SAD00430619 N4903B GUI crashes during remote programming J-BERT N4903B software release 7.00: Fully independent PRBS and patterns on AUX data output (second channel mode): • • • • • • Sequence extension to support two channels (with independent patterns but same sequence) Sequence editor supports second channel New type of pattern editor to support two bit streams De-emphasis mode: support of external connected power divider to add two bit streams Cross-talk simulation by generating a PRBS with independent starting phase Out-Of-Band (OOB) signaling: pattern of second channel controls the electrical state of DATA OUT Other: • • • • • Jitter tolerance characterization measurement: ability to enter MIN/MAX curves are not bonded to option J12 (automated jitter compliance suite) anymore Support of 14G version of de-emphasis signal converter N4916B (N4916B zip1.1.0.0) Manual input timing adjustment for 28 Gb/s multiplexer N4876A with stand-alone software (N4876A zip1.0.0.3) Added bit rate presets for Fibre Channel, 100GbE-LR4, UHS-II, MIPI M-PHY, DisplayPort Added demo patterns for MIPI M-PHY Notes: s January 2013 • Software license N4903B-002 is required to use the second data channel capabilities • IVI-COM driver version 1.2.7.0 does not yet support all commands necessary to support the De-emphasis Signal Converter N4916B. IVI-COM driver version 1.2.7.0 does not yet support 8B/10B Symbol Comparison functionality. • Known defects in version 7.00 No. 1 2 Defect # Description SAD00397466 "Preset Instrument State" button does not reset the various Jitter Tolerance settings. SAD00415423 SER != 0 or BER != 0 after a stop/start Defects fixed in version 7.00 No. Defect # Description 1 SAD00425933 J-BERT N4903B operation with MUX: wrong jitter display in ps. 2 SAD00421925 Jitter Tolerance Remote Programming; (bug in the N4903B remote programming interface when performing a jitter tolerance measurement). 3 SAD00422222 Sequencer "Start" button does not appear. J-BERT N4903B Software Release 6.80: Support of 8B/10B Frame Error Ratio (FER), Symbol Counters, and Symbol Pattern Editing which includes: Enhanced Pattern Editor capabilities: • Patterns can be viewed and edited in symbol format. This functionality is provided by Bin/Hex/Symbol Configuration dialog. • Running disparity and invalid symbols can be viewed and edited in pattern editor in Symbol format. • The “Find Pattern” dialog is enhanced to search for symbol pattern. • Pattern files can be viewed and saved in a new file format “symbol format”. The following new error ratios are available besides BER, SER and cBER: • FER (Frame Error Ratio) • FSR (Filler Symbol Ratio) • DER (Disparity Error Ratio) • ISR (Illegal Symbol Ratio) The “Accumulated Results" window now displays additional results, such as: s January 2013 • Calculated Bit/Error count • Compared/Received/Error Symbol count • Received/Error Frame count • Filler Symbol count • Illegal Disparity Change count • Illegal Symbol count • Expected Symbol count • SER (Symbol Error Ratio) • cBER (Calculated BER) • FER (Frame Error Ratio) • FSR (Filler Symbol Ratio) • DER (Disparity Error Ratio) • ISR (Illegal Symbol Ratio) • Data Rate Ratio • Auto Resync count A new cBER setup dialog is introduced which provides the following options: • To select cBER results based on SER, FER, FSR, DER, ISR. • To select Automatic or User defined mode for cBER conversion factor. • Auto align with CDR enabled now supported above 11.5 Gb/s. Does data centre with appropriate threshold settings. Message dialog will pop up. • Wild card for filler primitives. • Support for masking high error counts prior to re-synchronization of the error detector. This option is available in the Error Detector’s Pattern Sync Setup dialog. • Jitter characterization and compliance measurement: if DUT loses 8B/10B alignment, now also in BER mode it is tried to re-establish alignment when sequence supports it. Better cursor accuracy of N4916B De-emphasis signal converter • To improve cursor accuracy calibration of N4916B a calibration table is added. This is only usefull for N4916B’s shipped after the release of J-BERT N4903B SW 6.8 or N4916B’s that have been returned for factory recalibration. • Software license N4903B-A02 (or UA2) is required to use the 8B/10B SER capabilities • IVI-COM driver version 1.2.7.0 does not yet support all commands necessary to support the Deemphasis Signal Converter N4916B. • IVI-COM driver version 1.2.7.0 does not yet support 8B/10B Symbol Comparison functionality. Notes: Known defects in version 6.80 No. s Defect # Description January 2013 1 SAD00397466 “Preset Instrument State” button does not reset the various Jitter Tolerance settings 2 SAD00415423 SER != 0 or BER != 0 after a stop/start. 3 SAD00421925 N4903B Jitter Tolerance Remote Programming; (bug in the N4903B remote programming interface when performing a jitter tolerance measurement). 4 SAD00422222 Sequencer "Start" button does not appear. 5 SAD00425933 J-BERT with MUX: wrong jitter display in ps. Defects fixed in version 6.80 No. 1 2 3 4 5 6 Defect # Description SAD00419580 Programming Guide: SCPI command must not contain spaces. SAD00422787 User Guide: N4093B User's Guide do not provide directions which applies for the N4916B to connect the Pattern Generator and DUT. SAD00415322 GUI crash on opening the instrument state after running the jitter tolerance measurement. SAD00422503 Auto align in CDR Mode modifies "Fine Adjust" value but does not display the change. na N5990A test automation software issue in which an error message "Specified type of lock could not be obtained" was launched. na N4916B De-Emphasis improvement: calibration table for improved cursor accuracy by droop compensation J-BERT N4903B Software Release 6.70: Multiplexer Control, Second Output Channel (Option 002) • The N4903B supports the Agilent N4876A 28 Gb/s Multiplexer 2:1. All Multiplexer output parameters can be controlled via J-BERT UI. J-BERT’s AUX output provides pattern and PRBS to drive the multiplexer. This allows expanding the pattern generator bit rate of J-BERT up to 28.4 Gb/s and of ParBERT up to 27 Gb/s. N4876A offers excellent output signal performance for accurate characterization up to 28 Gb/s. For more information to setup the N4876A see START - N4900 Series Documents - N4876A Getting Started. • License for Opt. 002 “PRBS and pattern on AUX data” is required for using N4876A Faster automated jitter characterization • Reduce the number of measurements points with the ability to enter jitter start values under Jitter Characterization-Properties-Search Notes: • Power Cycle of N4876A is mandatory after updating its software. s January 2013 Version 6.60: Symbol Error Ratio Analysis (Option A02) • Integrated receiver tolerance testing capability for USB3, SATA, SAS, MIPI M-Phy by analyzing coded, packetized data and filters filler symbols; • Presets for filler and align symbols for USB3, SATA, MIPI, • Filtering of up to four user-definable filler symbols, • Filtering of consecutive occurrences up to 12.5 Gb/s without dead time; • Display of calculated bit error or symbol error ratio in real-time; • Ability to enter and monitor sent and received patterns in 8B/10B coded or uncoded bit or symbol format; • Handles running disparity automatically, • Supports Block Masking in SER mode. Sequences / Patterns • A sequence now can consist of up to 120 blocks. It depends on the number and the kind of loops used. • Updated USB3/SATA loopback sequence/patterns. Notes: • IVI-COM driver version 1.2.7.0 does not yet support all commands necessary to support the De-emphasis Signal Converter N4916B. • IVI-COM driver version 1.2.7.0 does not yet support SER functionality. Known defects in version 6.50 and 6.60 S. No. 1 Parameter Description SAD00397466 “Preset Instrument State” button does not reset the various Jitter Tolerance settings Defects fixed in version 6.60 . No. Parameter Description 1 SAD00412975 Programming Guide: SOURce8:CONFigure:DISTribution OFF does not work 2 SAD00412976 Programming Guide: SOURce8:CONFigure:DISTribution OFF Resolved 3 SAD00412977 Programming Guide: SOURce2:DIVider8 4 SAD00412756 N4916B remote control sometimes doesn't update post Version 6.51: • Optimize hardware driver for option D14 s January 2013 Version 6.50: • The N4903B supports the De-emphasis Signal Converter N4916B. Accurately characterize your multi-gigabit serial interface with the 4-tap de-emphasis signal converter with optional clock multiplier. For more information see START→ N4900 Series Documents → N4916B ReadMe. • Trigger pulses at AUX IN input are detected down to a pulse width of 5 ns typ. when used as sequence trigger Defects fixed in version 6.50 • SAD00397013 eye-diagram measurement fails to autoscale correctly • SAD00397463 eye-diagram measurement fails to autoscale correctly • SAD00408298 Delay Control Input can't be enabled without option J10 installed • SAD00395370 Support for PRBS2^9 Version 6.10: • The GUI mainframe design has been changed to improve usability of the instrument. o The list bar on the left hand side of the GUI has been replaced by a menu, which is opened by pressing the menu button in the upper left corner. o The complete Pattern Generator and Error Detector status information is displayed at the bottom of the GUI. • The Spread Spectrum Clocking has been enhanced: o SSC and SJ can now be activated and used simultaneously o In addition to downspread, also up- and centerspread are available now o Non-triangular SSC-profile has been added, which can be specified using a simple text-file o The SSC deviation reset value changed from BOTH to DATA. • The Jitter Tolerance Measurement has been adapted to the new jitter capabilities o The Jitter Tolerance Measurements no longer automatically activates PJ-1 and SJ. o The user must setup all jitter parameters on the jitter setup page before starting the test o The Firmware performs a plausibility check on the jitter setup before starting the measurement New key capabilities of J-BERT N4903B (initial release): • Supports testing of forwarded clock devices: o Half-rate clock with variable duty-cycle o Jitter on clock and data o Delay of jitter between clock and data • PCIe 2.0 compliant jitter injection: o LF-RJ and HF-RJ o Dual-tone PJ o Residual SSC o Electrical idle s January 2013 • Variable output levels on trigger and aux data outputs • Wider PJ range of up to 300MHz • Built-in tunable CDR is always included • Pattern sequencer with up to 60 blocks Operating and Programming Hints • The following must be taken into account for all differential outputs of the PG and differential inputs of the ED: if only the normal or complement port is used in your test setup, the unused output ports must be terminated with 50Ω. • The N4900 Series Family comprises of several products, which require different application software. If a software update is required, please make sure your device is updated with the correct software version released for your instrument. Installing software intended for a different device may result in unpredictable issues, and may even permanently damage it. Agilent does not cover such damages under warranty. • If a new Microsoft Windows user login is created, the user must have administrator privileges to run the instrument firmware. Otherwise the firmware cannot access the instrument hardware. • In order to access the instrument from another computer, e.g. by a remote program, the Windows Firewall must be configured to allow remote access to the Agilent Firmware Server (due to security considerations, this access is disabled by default). To allow remote access to the firmware server, use the Windows Firewall applet from Control Panel: in the Exceptions tab, click on the Add program button, and browse for C:\Program Files\Agilent\N4903A\FirmwareServer\n490xfw.exe. To minimize risk, we recommend enabling access just from your subnet (use the Change scope button, from the same dialog box). Please note that some dialog boxes are taller than the height of the screen of the instrument, and the Ok and Cancel buttons might not be visible. You can move the dialogs upper on the screen, by dragging their title bar (using a mouse makes this much easier; simply plug an USB mouse in the front panel of the instrument). • Alternate Pattern Trigger Level requires minimum pattern length: When the trigger is configured to be level sensitive (i.e. high for Pattern B) there is a latency from start of pattern B until the trigger goes high. To see the trigger going high, a minimum pattern length of 1024 bits is required. • Performing Jitter Tolerance Measurements The automated jitter tolerance measurements makes use of both, SJ and PJ, to sweep the modulation frequency of the jitter. Which one is used is selected automatically depending on the required jitter amplitude, its frequency and the capability of the jitter source. To avoid unnecessary restarts of the pattern generator and to provide continuous data and clock to the device under test during a Jitter Tolerance Measurement, the following workflow is recommended: • 1. Turn off Spread Spectrum Clocking (SSC) and residual Spread Spectrum Clocking (rSSC) 2. Set all jitter sources (RJ, PJ1/2, SJ and BUJ) to 0mUI 3. Turn on global jitter switch 4. Setup and turn on RJ, PJ2 and BUJ, if required 5. Turn on PJ 6. Turn on SJ 7. Restart pattern sequence (if required to synchronize DUT) 8. Perform an auto alignment to adjust the sampling point of the error detector 9. Start the measurement If the N4916A is connected via USB to a N4903B instrument, while the N4916A is powered off, it is possible that the N4916A is not recognized by Windows as a valid USB device, not even after switching it on. If this happens, remove and reinsert the USB cable without powering off the N4916A. If this still doesn't solve the problem, restart N4903A without powering off the N4916A. s January 2013 Output protection when operating into open or wrongly adjusted external termination voltage The generator module offers a huge flexibility for external termination schemes and external termination voltage levels to address common technologies. For details, please refer to the Technical Data Sheet. An internal protection circuit continuously monitors the voltage levels of clock, data, aux data and trigger output. It becomes active if the termination voltage is wrongly adjusted. The output protection circuit may become active if the output voltage Vout becomes higher than Vhi+0.5V or lower than Vlo-0.5V. The output protection circuit is shared among two output drivers each. Data Out and Clock Out as well as Aux Data Out and Trigger/Ref Clock Out are supervised by one circuit together. As a consequence, if an output voltage violation occurs, both outputs are disabled together for a short period of time. If an output voltage violation occurs, the output voltages Vhi, Vlo and Vterm are re-programmed to safe values, typically to the externally measured termination voltage: Vhi = Vlo = Vterm = externally measured termination voltage. Afterwards the output drivers are reenabled. How to avoid an open condition in an automated test environment like IC or wafer test? The monitoring of an open condition is based on 100ms intervals. Earliest detection of missing termination is 200ms after setting the output levels. Earliest detection of correct termination will be 100ms after detecting unterminated operation. To optimize the test throughput by avoiding the protection circuit to become active, it is recommended to perform the DUT change in the following manner: 1. End of previous test. DUT is ready to be exchanged. 2. Adjust a High Level, which is less than 1V above Vterm. This will avoid the protection circuit to be activated. If Vterm is above 1.5V, the levels do not have to be changed. 3. Remove the tested DUT. 4. Insert next DUT. 5. Adjust new user levels. 6. Start test of next DUT. s January 2013