Si5419DU-T1-GE3

Si5419DU
Vishay Siliconix
P-Channel 30 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
- 30
RDS(on) ()
ID (A)
0.020 at VGS = - 10 V
- 12a
0.033 at VGS = - 4.5 V
- 12a
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• New Thermally Enhanced PowerPAK®
ChipFET® Package
- Small Footprint Area
- Low On-Resistance
- Thin 0.8 mm profile
• Compliant to RoHS Directive 2002/95/EC
Qg (Typ.)
15.5 nC
PowerPAK ChipFET Single
1
2
0.8
APPLICATIONS
D
mm
3
D
D
4
D
D
8
G
D
7
S
• Load Switch
G
S
6
Marking Code
S
BF
5
XXX
Lot Traceability
and Date Code
Part #
Code
Bottom View
D
P-Channel MOSFET
Ordering Information: Si5419DU-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Symbol
VDS
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
IDM
Pulsed Drain Current
TC = 25 °C
TA = 25 °C
TC = 25 °C
TC = 70 °C
Maximum Power Dissipation
TA = 25 °C
TA = 70 °C
Operating Junction and Storage Temperature Range
Continuous Source-Drain Diode Current
Soldering Recommendations (Peak Temperature)
ID
d, e
IS
PD
TJ, Tstg
Limit
- 30
± 20
- 12a
- 12a
- 9.9b, c
- 7.9b, c
- 40
- 12a
- 2.6b, c
31
20
3.1b, c
2b, c
- 55 to 150
260
Unit
V
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
RthJA
t5s
34
40
Maximum Junction-to-Ambientb, f
°C/W
RthJC
3
4
Maximum Junction-to-Case (Drain)
Steady State
Notes:
a. Package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. See solder profile (www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 90 °C/W.
Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
www.vishay.com
1
Si5419DU
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 30
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS/TJ
VDS Temperature Coefficient
VGS(th) Temperature Coefficient
VGS(th)/TJ
Gate-Source Threshold Voltage
V
- 20
ID = - 250 µA
mV/°C
5
VGS(th)
VDS = VGS , ID = - 250 µA
- 2.5
V
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = - 30 V, VGS = 0 V
-1
VDS = - 30 V, VGS = 0 V, TJ = 55 °C
-5
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
VDS  - 5 V, VGS = - 4.5 V
- 1.2
- 20
µA
A
VGS - 10 V, ID = - 6.6 A
0.016
0.020
VGS - 4.5 V, ID = - 5.1 A
0.027
0.033
VDS = - 10 V, ID = - 6.6 A
20

S
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-on Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Rg
1400
VDS = - 15 V, VGS = 0 V, f = 1 MHz
tr
pF
200
VDS = - 15 V, VGS = - 10 V, ID = - 9.9 A
VDS = - 15 V, VGS = - 4.5 V, ID = - 9.9 A
30
45
15.5
24
4.5
f = 1 MHz
47
VDD = - 15 V, RL = 1.9 
ID  - 7.9 A, VGEN = - 4.5 V, Rg = 1 

6.7
70
33
50
30
45
tf
16
25
td(on)
10
15
10
15
40
60
12
20
tr
td(off)
nC
7.5
td(on)
td(off)
240
VDD = - 15 V, RL = 1.9 
ID  - 7.9 A, VGEN = - 10 V, Rg = 1 
tf
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
TC = 25 °C
- 12
40
IS = - 7.9 A, VGS = 0 V
- 0.85
- 1.2
A
V
Body Diode Reverse Recovery Time
trr
25
40
ns
Body Diode Reverse Recovery Charge
Qrr
15
25
nC
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
IF = - 7.9 A, dI/dt = 100 A/µs, TJ = 25 °C
11
14
ns
Notes:
a. Pulse test; pulse width  300 µs, duty cycle  2 %
a. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
Si5419DU
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
20
40
VGS = 10 V thru 5 V
16
I D - Drain Current (A)
I D - Drain Current (A)
32
VGS = 4 V
24
16
12
8
TC = 25 °C
4
8
VGS = 2 V
0
0.0
VGS = 3 V
TC = 125 °C
TC = - 55 °C
0
0.5
1.0
1.5
2.0
2.5
0
3.0
1
2
3
4
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
2100
0.10
0.06
0.04
VGS = 4.5 V
Ciss
1500
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
1800
0.08
1200
900
600
Coss
VGS = 10 V
0.02
300
Crss
0
0
0
10
20
30
0
40
10
15
20
25
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
30
1.6
10
ID = 9.9 A
ID = 6.6 A
1.4
8
6
VDS = 15 V
VDS = 24 V
4
VGS = 10 V
(Normalized)
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
5
VGS = 4.5 V
1.2
1.0
0.8
2
0
0
5
10
15
20
Qg - Total Gate Charge (nC)
Gate Charge
Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
25
30
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
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Si5419DU
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
0.06
100
ID = 6.6 A
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
0.05
10
TJ = 25 °C
TJ = 150 °C
0.04
0.03
TJ = 125 °C
0.02
TJ = 25 °C
0.01
0
1
0.0
0.2
0.4
0.6
0.8
1.0
0
1.2
2
VSD - Source-to-Drain Voltage (V)
4
6
8
10
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
2.2
50
2.0
40
Power (W)
VGS(th) (V)
ID = 250 µA
1.8
1.6
30
20
1.4
1.2
- 50
10
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
1
10
TJ - Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power
100
1000
100
Limited by RDS(on)*
100 µs
I D - Drain Current (A)
10
1 ms
10 ms
1
100 ms
1s
10 s
0.1
TA = 25 °C
Single Pulse
DC
BVDSS Limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
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Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
Si5419DU
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
35
35
30
Power Dissipation (W)
I D - Drain Current (A)
28
21
Package Limited
14
25
20
15
10
7
5
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating*
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
www.vishay.com
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Si5419DU
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 90 °C/W
0.02
3. TJM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
10-4
0.02
Single Pulse
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?69001.
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Document Number: 69001
S11-0184-Rev. B, 07-Feb-11
Package Information
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Vishay Siliconix
PowerPAK® ChipFET® Case Outline
D
(7)
(6)
(5)
(1)
(2)
(3)
(4)
E
(8)
Pin #1
indicator
Side view of single
e
b
H
D1
D(2)
D2
K
D(3)
L
G(4)
K1
D2
SI(1)
GI(2)
S2(3)
D1(8)
D1(7)
D2(6)
Detail Z
G2(4)
K2
L
D(1)
A1
C
A
Z
Side view of dual
E1
E2
E3
H
D3
D(8)
D(7)
D(6)
S(5)
K3
Backside view of dual pad
Backside view of single pad
DIM.
D2(5)
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.70
0.75
0.85
0.028
0.030
0.033
A1
0
-
0.05
0
-
0.002
b
0.25
0.30
0.35
0.010
0.012
0.014
C
0.15
0.20
0.25
0.006
0.008
0.010
D
2.92
3.00
3.08
0.115
0.118
0.121
D1
1.75
1.87
2.00
0.069
0.074
0.079
D2
1.07
1.20
1.32
0.042
0.047
0.052
D3
0.20
0.25
0.30
0.008
0.010
0.012
E
1.82
1.90
1.98
0.072
0.075
0.078
E1
1.38
1.50
1.63
0.054
0.059
0.064
E2
0.92
1.05
1.17
0.036
0.041
0.046
E3
0.45
0.50
0.55
0.018
0.020
0.022
e
0.65 BSC
0.026 BSC
H
0.15
0.20
0.25
0.006
0.008
0.010
K
0.25
-
-
0.010
-
-
K1
0.30
-
-
0.012
-
-
K2
0.20
-
-
0.008
-
-
K3
0.20
-
-
0.008
-
-
L
0.30
0.35
0.40
0.012
0.014
0.016
C14-0630-Rev. E, 21-Jul-14
DWG: 5940
Note
• Millimeters will govern
Document Number: 73203
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revision: 21-Jul-14
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single
0.225
(0.009)
0.350
(0.014)
0.650
(0.026)
0.200
(0.008)
0.300
(0.012)
0.300
(0.012)
0.100
(0.004)
1.500
(0.059)
1.900
(0.075)
0.250
(0.010)
0.500
(0.020)
0.350
(0.014)
0.350
(0.014)
1.870
(0.074)
0.305
(0.012)
2.575
(0.101)
Recommended Minimum Pads
Dimensions in mm/(Inches)
Return to Index
APPLICATION NOTE
Document Number: 69948
Revision: 21-Jan-08
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000