SiP32431 Datasheet

SiP32431
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Vishay Siliconix
1 A Slew Rate Controlled Load Switch with Reverse Blocking
DESCRIPTION
FEATURES
The SiP32431 is a slew rate controlled high side switch with
reverse blocking capability. The switch is of a low ON
resistance p-channel MOSFET that supports continuous
current up to 1 A.
The SiP32431 operates with an input voltage from 1.5 V to
5.5 V.
The SiP32431 features low input logic level to interface with
low control voltage from microprocessors. This device has a
very low operating current, typically 50 pA.
The SiP32431 is available in lead (Pb)-free package options
including 6 pin SC70-6, and 4 pin TDFN4 1.2 mm x 1.6 mm
DFN4 packages. The operation temperature range is
specified from -40 °C to +85 °C.
The SiP32431 compact package options, operation voltage
range, and low operating current make it a good fit for
battery power applications.
• 1.5 V to 5.5 V input voltage range
• Very low RDS(on), typically 105 mΩ at 5 V and
135 mΩ at 3 V for TDFN4 1.2 mm x 1.6 mm
package
• Typical 147 mΩ at 5 V and 178 mΩ at 3 V for
SC70-6 package
Available
• Slew rate controlled turn-on time: 100 μs
• Low quiescent current < 1 μA
• Low shutdown current < 1 μA
• Reverse blocking capability
• SC70-6 and TDFN4 1.2 mm x 1.6 mm packages
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• Cellular telephones
• Digital still cameras
• Personal digital assistants (PDA)
• Hot swap supplies
• Notebook computers
• Personal communication devices
• Portable Instruments
TYPICAL APPLICATION CIRCUIT
VIN
IN
OUT
VOUT
SiP32431
C IN
1 µF
C OUT
0.1 µF
ON/OFF
GND
ON/OFF
GND
GND
Fig. 1 - SiP32431 Typical Application Circuit
ORDERING INFORMATION
TEMPERATURE RANGE
-40 °C to 85 °C
PACKAGE
MARKING
PART NUMBER
SC70-6
MAxx
SiP32431DR3-T1GE3
TDFN4 1.2 mm x 1.6 mm
Dx
SiP32431DNP3-T1GE4
Notes
• x = lot code
• -GE3 denotes halogen-free and RoHS-compliant
• Please use the SiP32431DR3-T1GE3 to replace SiP32431DR3-T1-E3
S15-1821-Rev. C, 10-Aug-15
Document Number: 66597
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32431
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ABSOLUTE MAXIMUM RATINGS
PARAMETER
LIMIT
Supply Input Voltage (VIN)
Enable Input Voltage (VON/OFF)
-0.3 to VIN +0.3
SC70-6 package
1.2
TDFN4 1.2 mm x 1.6 mm
1.4
VIN ≥ 2.5 V
3
Maximum Pulsed Current (IDM) VIN
(pulsed at 1 ms, 10 % duty cycle)
VIN < 2.5 V
Junction Temperature (TJ)
Power Dissipation (PD) a
A
1.6
ESD Rating (HBM)
Thermal Resistance (θJA) a
V
-0.3 to 6
Output Voltage (VOUT)
Maximum Continuous Switch Current (Imax.)
UNIT
-0.3 to 6
4000
V
-40 to 125
°C
6 pin SC70-6 b
220
4 pin TDFN4 1.2 mm x 1.6 mm c
170
6 pin SC70- 6 b
250
4 pin TDFN4 1.2 mm x 1.6 mm c
324
°C/W
mW
Notes
a. Device mounted with all leads and power pad soldered or welded to PC board.
b. Derate 4.5 mW/°C above TA = 70 °C.
c. Derate 5.9 mW/°C above TA = 70 °C, see PCB layout.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
PARAMETER
LIMIT
UNIT
Input Voltage Range (VIN)
1.5 to 5.5
V
Operating Temperature Range
-40 to 85
°C
S15-1821-Rev. C, 10-Aug-15
Document Number: 66597
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32431
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SPECIFICATIONS
PARAMETER
Operating Voltage c
Quiescent Current
Off Supply Current
Off Switch Current
Reverse Blocking Current
VIN
IQ
IQ(off)
ISD(off)
IRB
On-Resistance
RDS(on)
On-Resistance Temp.-Coefficient
On/Off Input Low Voltage c
LIMITS
-40 °C TO 85 °C
TEST CONDITIONS UNLESS SPECIFIED
VIN = 5, TA = -40 °C to 85 °C
(Typical values are at TA = 25 °C)
SYMBOL
On/off = active
On/off = inactive, out = open
On/off = inactive, out = 0
VOUT = 5.5 V, VIN = 0, Von/off = inactive
SC70-6
VIN = 5 V, IL = 500 mA, TA = 25 °C
TDFN4
SC70-6
VIN = 4.2 V, IL = 500 mA, TA = 25 °C
TDFN4
SC70-6
VIN = 3 V, IL = 500 mA, TA = 25 °C
TDFN4
SC70-6
VIN = 1.8 V, IL = 500 mA, TA = 25 °C
TDFN4
SC70-6
VIN = 1.5 V, IL = 500 mA, TA = 25 °C
TDFN4
TDRDS
VIN ≥ 1.5 V to < 1.8 V
VIN ≥ 1.8 V to < 2.7 V
VIN ≥ 2.7 V to ≤ 5.5 V
VIN ≥ 1.5 V to < 2.7 V
VIN ≥ 2.7 V to < 4.2 V
VIN ≥ 4.2 V to ≤ 5.5 V
VOn/Off = 5.5 V
VIL
On/Off Input Low Voltage c
VIH
On/Off Input Leakage
Output Turn-On Delay Time
Output Turn-On Rise Time
Output Turn-Off Delay Time
ISINK
td(on)
t(on)
td(off)
VIN = 5 V, Rload = 10 Ω, TA = 25 °C
UNIT
MIN. a
TYP. b
MAX. a
1.5
1.3
1.5
1.8
-
0.00005
0.13
147
105
155
110
178
135
275
230
395
350
2800
20
140
4
5.5
1
1
1
1
V
μA
230
250
290
mΩ
480
520
0.3
0.4
0.6
1
40
180
10
ppm/°C
V
μA
μs
Notes
a. The algebriac convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
c. For VIN outside this range consult typical on/off threshold curve.
PIN CONFIGURATION
1
OUT
6
N/C
ON/OFF
GND
2
5
GND
ON/OFF
3
4
IN
4
1
OUT
2
GND
GND
IN
3
Bottom View
Top View
Fig. 2 - SC70-6 Package
Fig. 3 - TDFN4 1.2 mm x 1.6 mm Package
PIN DESCRIPTION
PIN NUMBER
SC70-6
TDFN4
4
3
2, 5
2
3
4
1
1
S15-1821-Rev. C, 10-Aug-15
NAME
FUNCTION
IN
GND
ON/OFF
OUT
This pin is the p-channel MOSFET source connection. Bypass to ground through a 1 μF capacitor
Ground connection
Enable input
This pin is the p-channel MOSFET drain connection. Bypass to ground through a 0.1 μF capacitor
Document Number: 66597
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32431
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Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
300
0.12
VIN = 5 V
ISD(OFF) - Off Switch Current (nA)
IQ - Quiescent Current (nA)
0.10
0.08
0.06
0.04
0.02
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
200
150
100
50
0
- 40
5.5
- 20
0
20
40
60
80
100
VIN (V)
Temperature (°C)
Fig. 4 - Quiescent Current vs. Input Voltage
Fig. 7 - Off Switch Current vs. Temperature
350
550
for SC70-6 package
500
300
IL = 1.2 A
450
RDS - On-Resistance (mΩ)
ISD(OFF) - Off Switch Current (nA)
250
250
200
150
100
400
IL = 500 mA
350
300
250
200
150
IL = 100 mA
50
100
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
50
1.0
6.0
1.5
2.0
2.5
VIN (V)
3.0 3.5
VIN (V)
4.0
4.5
5.0
5.5
Fig. 8 - RDS(on) vs. VIN for SC70-6 Package
Fig. 5 - Off Switch Current vs. Input Voltage
10
550
500
for TDFN4 package
RDS - On-Resistance (mΩ)
IQ - Quiescent Current (nA)
450
1
0.1
VIN = 5 V
0.01
400
IL = 1.2 A
350
300
IL = 500 mA
250
200
150
IL = 100 mA
VIN = 3 V
0.001
- 40
- 20
0
20
40
100
60
80
100
Temperature (°C)
Fig. 6 - Quiescent Current vs. Temperature
S15-1821-Rev. C, 10-Aug-15
50
1.5
2.0
2.5
3.0
3.5
4.0
VIN (V)
4.5
5.0
5.5
Fig. 9 - RDS(on) vs. Input Voltage
Document Number: 66597
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SiP32431
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
180
ILOAD = 500 mA
for TDFN4 package
VIN = 0 V
160
100
RDS - On-Resistance (mΩ)
IRB - Reverse Blocking Current (nA)
1000
10
1
VIN = 3 V
120
100
VIN = 5 V
0.1
80
0.01
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
60
- 40
5.5
- 20
0
20
40
60
80
VOUT (V)
Temperature (°C)
Fig. 10 - Reverse Blocking Current vs. VOUT
Fig. 12 - RDS(on) vs. Temperature
ILOAD = 500 mA
for SC70-6 package
IRB - Reverse Blocking Current (nA)
210
200
190
180
170
160
100
600
220
RDS - On-Resistance (mΩ)
140
VIN = 3 V
VIN = 5 V
150
140
500
VOUT = 5.5 V
VIN = 0 V
400
300
200
100
130
120
- 40
- 20
0
20
40
60
80
0
- 40
100
- 20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
Fig. 11 - RDS(on) vs. Temperature
Fig. 13 - Reverse Blocking Current vs. Temperature
1.6
On/Off Threshold Voltage (V)
1.4
1.2
VIH
1.0
VIL
0.8
0.6
0.4
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VIN (V)
Fig. 14 - On/Off Threshold vs. Input Voltage
S15-1821-Rev. C, 10-Aug-15
Document Number: 66597
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SiP32431
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TYPICAL WAVEFORMS
Fig. 15 - Switching (VIN = 3 V)
Fig. 17 - Turn-Off (VIN = 3 V)
Fig. 16 - Switching (VIN = 5 V)
Fig. 18 - Turn-Off (VIN = 5 V)
BLOCK DIAGRAM
Reverse
Blocking
OUT
IN
Turn-On
Slew Rate
Control
Level
Shift
ON/OFF
GND
Fig. 19 - Functional Block Diagram
S15-1821-Rev. C, 10-Aug-15
Document Number: 66597
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SiP32431
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PCB LAYOUT
Fig. 20 - Top, TDFN4 1.2 mm x 1.6 mm PCB Layout
Fig. 21 - Bottom, TDFN4 1.2 mm x 1.6 mm PCB Layout
DETAILED DESCRIPTION
The SiP32431 is a p-channel MOSFET power switches
designed for high-side slew rate controlled load-switching
applications. Once turned on, the slew-rate control circuitry
is activated and current is ramped in a linear fashion until it
reaches the level required for the output load condition. This
is accomplished by first elevating the gate voltage of the
MOSFET up to its threshold voltage and then by linearly
increasing the gate voltage until the MOSFET becomes fully
enhanced. At this point, the gate voltage is then quickly
increased to the full input voltage to reduce RDS(on) of the
MOSFET switch and minimize any associated power losses.
APPLICATION INFORMATION
Input Capacitor
While a bypass capacitor on the input is not required, a 1 μF
or larger capacitor for CIN is recommended in almost all
applications. The bypass capacitor should be placed as
physically close as possible to the SiP32431 to be effective
in minimizing transients on the input. Ceramic capacitors are
recommended over tantalum because of their ability to
withstand input current surges from low impedance sources
such as batteries in portable devices.
Output Capacitor
A 0.1 μF capacitor or larger across VOUT and GND is
recommended to insure proper slew operation. COUT may
be increased without limit to accommodate any load
transient condition with only minimal affect on the SiP32431
turn on slew rate time. There are no ESR or capacitor type
requirement.
Enable
The on/off pin is compatible with both TTL and CMOS logic
voltage levels.
S15-1821-Rev. C, 10-Aug-15
Protection Against Reverse Voltage Condition
The SiP32431 contains a body snatcher that normally
connect the body to the source (IN) when the device is
enable. In case where the device is disabled but the VOUT is
higher than the VIN, the n-type body is switched to OUT,
reverse bias the body diode to prevent the current from
going back to the input.
Thermal Considerations
The SiP32431 is designed to maintain a constant output
load current. Due to physical limitations of the layout and
assembly of the device the maximum switch current is 1 A,
as stated in the Absolute Maximum Ratings table. However,
another limiting characteristic for the safe operating load
current is the thermal power dissipation of the package. To
obtain the highest power dissipation (and a thermal
resistance of 170 °C/W) the power pad of the device should
be connected to a heat sink on the printed circuit board.
The maximum power dissipation in any application is
dependent on the maximum junction temperature,
TJ (max.) = 125 °C, the junction-to-ambient thermal resistance
for the TDFN4 1.2 mm x 1.6 mm package, θJ-A = 170 °C/W,
and the ambient temperature, TA, which may be
formulaically expressed as:
T J (max.) – T A
125 – T A
P (max.) = --------------------------------- = ---------------------θJ – A
170
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to
about 324 mW.
So long as the load current is below the 1 A limit, the
maximum continuous switch current becomes a function
two things: the package power dissipation and the RDS(on) at
the ambient temperature.
Document Number: 66597
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As an example let us calculate the worst case maximum
load current at TA = 70 °C. The worst case RDS(on) at 25 °C
occurs at an input voltage of 1.5 V and is equal to 520 mΩ.
The RDS(on) at 70 °C can be extrapolated from this data using
the following formula
RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x ΔT)
Where TC is 3300 ppm/°C. Continuing with the calculation
we have
RDS(on) (at 70 °C) = 520 mΩ x (1 + 0.0033 x (70 °C - 25 °C)) =
597 mΩ
The maximum current limit is then determined by
P (max.)
I LOAD (max.) < ---------------------R DS ( on )
which in case is 0.74 A. Under the stated input voltage
condition, if the 0.74 A current limit is exceeded the internal
die temperature will rise and eventually, possibly damage
the device.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?66597.
S15-1821-Rev. C, 10-Aug-15
Document Number: 66597
8
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Package Information
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Vishay Siliconix
TDFN4 1.2 x 1.6 Case Outline
D
4
D2
b
3
Pin #1 ID
(Optional)
4
K
E
E2
3
1
2
e
Index Area
(D/2 x E/2)
Bottom View
A
A1
Top View
A3
1
L
2
Side View
MILLIMETERS
INCHES
DIM.
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.50
0.55
0.60
0.020
0.022
0.024
A1
0.00
-
0.05
0.00
-
0.002
A3
0.15 REF.
0.006
b
0.20
0.25
0.30
0.008
0.010
0.012
D
1.15
1.20
1.25
0.045
0.047
0.049
D2
0.81
0.86
0.91
0.032
0.034
0.036
e
0.50 BSC
0.020
E
1.55
1.60
1.65
0.061
0.063
0.065
E2
0.45
0.50
0.55
0.018
0.020
0.022
0.35
0.010
K
L
0.25 TYP.
0.25
0.30
0.010 TYP.
0.012
0.014
ECN: S11-2099-Rev. B, 07-Nov-11
DWG: 5995
Revision: 07-Nov-11
1
Document Number: 65734
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SC-70:
3/4/5/6-LEADS (PIC ONLY)
0.15 (0.006)
D
C
e1
A
A
D
N5
N4
N3
E/2
E1/2
E
E/1
0.15 (0.006)
C
Pin 1
N1
N2
B
e
See Detail A
C
0.10 (0.004)
M
C
A
b
B
U1
A2
A
SEATING
PLANE
0.10 (0.004)
C
A1
C
H
(b)
0.15 (0.0059)
b1
c1
GAGE PLANE
c
Base Metal
DETAIL A
SECTIION A-A
Pin
Code
N1
N2
N3
N4
N5
U
L
LEAD COUNT
NOTES:
3
4
5
6
1.
Dimensioning and tolerancing per ANSI Y14.5M-1994.
−
−
2
2
2.
2
2
3
3
Controlling dimensions: millimeters converted to inch dimensions are
not necessarily exact.
−
3
4
4
3.
3
−
−
5
Dimension “D” does not include mold flash, protrusion or gate burr.
Mold flash, protrusion or gate burr shall not exceed 0.15 mm
(0.006 inch) per side.
−
4
5
6
4.
The package top shall be smaller than the package bottom.
Dimension “D” and “E1” are determined at the outer most extremes
of the plastic body exclusive of mold flash, tie bar burrs, gate burrs
and interlead flash, but including any mismatch between the top and
bottom of the plastic body.
Document Number: 73201
19-Nov-04
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Package Information
Vishay Siliconix
MILLIMETERS
INCHES
Dim
Min
Nom
Max
Min
Nom
Max
A
0.80
−
1.10
0.031
−
0.043
A1
0.00
−
0.10
0.000
−
0.004
A2
0.80
0.90
1.00
0.031
0.035
0.040
b
0.15
−
0.30
0.006
−
0.012
b1
0.15
0.20
0.25
0.006
0.008
0.010
c
0.08
−
0.25
0.003
−
0.010
c1
0.08
0.13
0.20
0.003
0.005
0.008
D
1.90
2.10
2.15
0.074
0.082
0.084
E
2.00
2.10
2.20
0.078
0.082
0.086
E1
1.15
1.25
1.35
0.045
0.050
0.055
e
0.65 BSC
0.0255 BSC
e1
1.30 BSC
0.0512 BSC
L
0.26
0.36
0.46
0.010
0.014
0.018
U
0_
−
8_
0_
−
8_
U1
4_
10_
4_
10_
ECN: S-42145—Rev. A, 22-Nov-04
DWG: 5941
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Document Number: 73201
19-Nov-04
PAD Pattern
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TDFN4 1.2 x 1.6
0.86
0.50
3
1
2
2.0
0.55
0.20
0.50
0.20
4
0.55
0.30
Recommended Minimum Pads
Dimensions in mm
Document Number: 66558
Revision: 05-Mar-10
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technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
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Document Number: 91000