Circuit - Davicom Semiconductor Inc.

5
4
3
2
1
D
D
MII and LOCAL
BUS INTERFACE
PAGE 3
25 MHz
XTAL
PAGE 2
C
SEEPROM
DM9332
MAIN
PAGE 2
PAGE 2
MDI (TP)
and FIBER
INTERFACE
& LED
C
BOARD DIMENSIONS AND COMPONENT PLACEMENT OUTLINE
PAGE 5
RJ-45
RJ-45
XFMR
XFMR
FIBER
MODULE
B
POWER
+5V
IN
+3.3V OUT
+1.8V OUT
BOOTSTRAP PINS
PORT 0
PORT 1
DC
JACK
PAGE 6
B
FIBER CHIP
80mm
POWER
CIRCUIT
LEDS
PAGE 4
MII I/F
100mm
A
A
Davicom Semiconductor Inc.
Title
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
2
Document Number
TOP
Thursday, June 25, 2009
Rev
1.0
Sheet
1
1
of
7
5
4
3
2
1
MII BUS Interface
R72
1.4K/1%
R100 0
C60
22pF/NC
FX0_SD 5
ITX1ITX1+
IRX1IRX1+
ITX0ITX0+
IRX0IRX0+
D
C61
22pF/NC
AVDD_33V
AVDD_18V
DVDD_33V
U6
VCNTL
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
VREF
C20
0.1uF
X1
X2
C
ILNK1_LED
PIN56
ILNK0_LED
PIN58
X1
PIN60
Y1
1
X2
2
PIN62
25MHz/49US
C19
22pF
VCNTL
VREF
VCC3
X1
X2
GND
LNK1_LED
SPD1_LED
LNK0_LED
SPD0_LED
TEST2
SMI_CK
VCCI
SMI_DIO
P2_SEL
GND
TEST
GND
PWRST#
EECS
EECK
EEDIO
VCC3
RXD0
RXD1
GND
RXD2
RXD3
RXDV
RXC
RXER
COL
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
PWRST#
EECSI
EECKI
EEDIOI
PIN_2
PIN_3
PIN_5
PIN_6
PIN_7
PIN_9
PIN_10
PIN_12
PIN_14
PIN_15
PIN_17
PIN_18
PIN_19
PIN_20
PIN_21
PIN_22
PIN_24
PIN_25
PIN_60
PIN_62
3
3
3,6
3,6
3,6
3,6
3,6
3
3,6
3
3
3
3
3
3
3
3
3
3
3,6
D
C64
22pF/NC
C
TP Interface
PIN22
PIN21
PIN20
PIN19
PIN18
PIN17
PLACE BEADS
CLOSE TO
TERMINATION
RESISTORS AND
CHIP
FIBER CHIP
PIN14
PIN15
LNK0_LED 5,6
LNK1_LED 5,6
PIN_56 6
PIN_58 6
PIN12
33
33
33
33
PIN9
PIN10
R125
R126
R127
R128
PIN5
PIN6
PIN7
ILNK0_LED
ILNK1_LED
PIN56
PIN58
PIN2
PIN3
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LED Interface
C65
22pF/NC
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
PIN25
PIN24
VCC3
MDC
MDIO
GND
TXD3
TXD2
TXD1
GND
TXD0
TXE
VCCI
TXC
VCC3
TXER
CRS
GND
C18
22pF
FX_SD0
BGRES
AVDD
RX0RX0+
AGND
TX0TX0+
AVDDI
AVDD
RX1RX1+
AGND
TX1TX1+
AVDDI
4 VCNTL
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
C62
22pF/NC
DVDD_18V
R101
R102
R104
R105
R106
R107
R108
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
PIN2
PIN3
PIN5
PIN6
PIN7
PIN9
PIN10
PIN12
PIN14
PIN15
PIN17
PIN18
PIN19
PIN20
PIN21
PIN22
PIN24
PIN25
PIN60
PIN62
ITX0+ L8
BEAD FERRITE/SM
ITX0- L9
BEAD FERRITE/SM
IRX0+ L10
BEAD FERRITE/SM
IRX0- L11
BEAD FERRITE/SM
ITX1+ L12
BEAD FERRITE/SM
ITX1- L13
BEAD FERRITE/SM
IRX1+ L14
BEAD FERRITE/SM
IRX1- L15
BEAD FERRITE/SM
TX0+
5
TX0-
5
RX0+
5
RX0-
5
TX1+
5
TX1-
5
RX1+
5
RX1-
5
B
1
3
2
AVDD_33V
C58
220UF
A
C31
10UF/NC
AVDD_18V
EECSI R129 33
EECKI R130 33
EEDIOI R131 33
PWRST#
A
EECS
EECK
EEDIO
U8
RESET_IC_(AP1701DW)
2
D8
1N4148
1
R73
10K/NC
K
3
DVDD_33V
SW2
C46
22pF/NC
C27
0.1UF
C28
0.1UF
C36
10UF
C29
0.1UF
C30
0.1UF
C37
10UF
JP18
JP19
JP20
C59
220UF
6
6
6
DVDD_33V
U7
JUMPER
JUMPER
JUMPER
R74 10K
1
2
3
4
CS VCC
SK
DC
DI ORG
DO GND
8
7
6
5
C32
0.1UF
93LC46
PWRST# 3
DVDD_33V
DVDD_18V
A
Davicom Semiconductor Inc
Title
C21
0.1UF
PUSHBUTTON RESET
C22
0.1UF
C23
0.1UF
C24
0.1UF
C34
10UF
C25
0.1UF
C26
0.1UF
C35
10UF
C57
220UF
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
2
Document Number
DM9332_MAIN
Thursday, June 25, 2009
Rev
1.0
2
Sheet
1
of
7
5
4
3
2
1
D
D
MII Interface
/PWRST
R176 0
PWRST# 2
MII Interface
MDC
TXD_0
TXD_1
TXD_2
TXD_3
CRS
COL
TXEN
RXER
TXC
RXC
RXD_0
RXD_1
RXD_2
RXD_3
SMI_DIO
C
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
JP26
DVDD_5V DVDD_33V
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
HEADER_16X2
MDIO
RXDV
SMI_CK
TXER
/PWRST
C66
22pF/NC
C67
22pF/NC
TXD_3
TXD_2
TXD_1
TXD_0
TXEN
TXC
TXER
CRS
COL
RXER
RXC
RXDV
RXD_3
RXD_2
RXD_1
RXD_0
R157
R158
R159
R160
R161
R162
R163
R164
R166
R168
R169
R170
R171
R172
R173
R174
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MDC
MDIO
R58
R71
0
0
PIN_5
PIN_6
PIN_7
PIN_9
PIN_10
PIN_12
PIN_14
PIN_15
PIN_17
PIN_18
PIN_19
PIN_20
PIN_21
PIN_22
PIN_24
PIN_25
2,6
2,6
2,6
2,6
2,6
2
2,6
2
2
2
2
2
2
2
2
2
PIN_2
PIN_3
2
2
C
SMI Interface
JP27
1
2
3
SMI_CK
SMI_DIO
R165 0
R167 0
PIN_60
PIN_62
2
2,6
CON3
B
B
A
A
Davicom Semiconductor Inc.
Title
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
2
Document Number
MII Bus interface
Thursday, June 25, 2009
Rev
1.0
Sheet
3
1
of
7
5
4
3
2
1
Power 5V TO 3.3V
FOR CHIP
DVDD_5V TP1
TP38
A
K
SW_SPST
C48
0.1UF
L7
2
3
2
I
IN
1N5819
C49
0.1UF
C11
0.1UF
C12
22UF
TAB
F.B/120/SO805
TAB
C13
22UF
R19
330
C51
0.1UF
C14
0.1UF
D
A
1
F.B/120/DIP
DVDD_33V
L1
AP1117-3.3V
OUT O
1
1
D
U3
D6
GND
SW1
G
L6
1
P1
DC-JACK
D7
AVDD_33V
F.B/120/DIP
K
PGND
F.B/120/SO805
C50
0.1UF
TP40
C
I
1N5819
C82
0.1UF
C83
22UF
IN
TAB
C
1
K
GND
D17
A
3V3_FIBER
L16
AP1117-3.3V
OUT O
F.B/120/SO805
TAB
C84
22UF
G
U9
LED/GREEN
L2
PLACE SOT223,
TO252 and TO263
PACKAGE ON SAME
LOCATION FOR BOTH
LDOs
Power 5V TO 3.3V
FOR FIBER MODULE
R181
330
C85
0.1UF
C86
0.1UF
A
PGND
D18
K
LED/GREEN
Power 3.3V TO 1.8V
DVDD_33V
ADJUSTABLE LDO CALCULATION
Vout = Vref x ( 1 + RB2 / RB1)
Vref = 1.25 V
OPTION
L17
U11
I
C52
0.1UF
AP1117-3.3V
OUT O
C53
22UF
TAB
TAB
RB1
330
B
For fixed Vout LDO, RB1 = open, RB2 = 0 ohm
G
F.B/120/SO805
IN
GND
B
AVDD_18V TP41
L5
E
2 VCNTL
C55
0.1UF
Q1
2SB1386
CONNECT DGND WITH AGND,
NO MORE GND PLANE
SEPARATION.
C
B
1
F.B/120/SO805
RB2
147
DVDD_18V
TP39
L4
F.B/120/SO805
C15
0.1UF
C16
0.1UF
C89
220UF
C54
0.1UF
Title
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
A
Davicom Semiconductor Inc.
1
A
2
Document Number
Power
Thursday, June 25, 2009
Rev
1.0
Sheet
4
1
of
7
5
4
3
2
TP / LED Interface
D
TX0+
TX0RX0+
RX0TX1+
TX1RX1+
RX1-
TX0+
TX0RX0+
RX0TX1+
TX1RX1+
RX1-
LNK0_LED
SPD0_LED
2
2
2
2
2
2
2
2
LNK0_LED 2,6
SPD0_LED 6
LNK1_LED
SPD1_LED
1
DVDD_33V
LNK1_LED 2,6
SPD1_LED 6
LNK0_LED
K D1
LEDA
R8
330
SPD0_LED
K D2
LEDA
R9
330
LNK1_LED
K D3
LEDA
R10
330
SPD1_LED
K D4
LEDA
R11
330
FIBER MODULE CONNECTION
FIBER MODULE POWER SELECTOR
3V3_FIBER
USE AC COUPLING
FOR VOLTAGE
TRANSLATION
BETWEEN IC AND
FIBER MODULE
R85 ~ R89 and R95 ~ R99 ARE
FOR 3.3V FIBER MODULE
FM0_VCC
R85
127/1%
C
RX0+
RX02 FX0_SD
C42
C43
R183
TX0TX0+
DVDD_5V
R86
127/1%
0
FX0_TXFX0_TX+
0.1UF
0.1UF
R95
83/1%
R96
83/1%
R97
R98
83/1% 83/1%
R99
83/1%
C68
0.1UF
O OHM
NC
R1
49.9 OHM
NC
R2
49.9 OHM
NC
R3
49.9 OHM
NC
R4
49.9 OHM
NC
C42
0.1 UF
O OHM
C43
0.1 UF
O OHM
C44
0.1 UF
O OHM
C45
0.1 UF
O OHM
C
C69
22UF
D9
TVS
D10
TVS
PORT 1 TP
Fiber_3.3v
AVDD_18V
JP2 RJ-45
U2
RX1-
B
D11
TVS
D12
TVS
PORT 0 TP
1
2
3
4
5
6
7
8
RX0+
TX0TX0+
TX1TX1+
JP1 RJ-45
U1
RX0-
RDNC
RD+
NC
CT
TDNC
TD+
8 9
7 10
6
5
4
3
2
1
16
15
14
13
12
11
10
9
RXNC
RX+
MCT
NC
TXNC
TX+
MAGCOM_HS9016
AVDD_18V
A
R184
R2
49.9/1%
R1
49.9/1%
R3
49.9/1%
C2
0.1UF
R186
R4
49.9/1%
C77
0/NC
C4
0.1UF
C3
0.1UF
1
2
3
4
5
6
7
8
RX1+
PORT 0 FIBER MODULE
AVDD_18V
C81
10UF
C78
C79
RDNC
RD+
NC
CT
TDNC
TD+
0/NC
C9
0.1UF
R12
49.9/1%
4
8 9
7 10
6
5
4
3
2
1
16
15
14
13
12
11
10
9
R13
49.9/1%
R14
49.9/1%
C80
C6
0.1UF
C73
C74
C75
0.1UF 0.1UF 0.1UF 0.1UF
C8
0.1UF
D15
TVS
D16
TVS
B
D13
TVS
D14
TVS
C72
R15
49.9/1%
C76
10UF
R178
C7
0.1UF
C10
1M
R16 R177 R17 R18
75/1% 75/1% 75/1% 75/1%
C5 0.01UF/2KV
0.1UF
AVDD_18V
R185
0/NC
R187
0/NC
A
Davicom Semicondutor Inc
Title
R5
R179 R6
R7
75/1% 75/1% 75/1% 75/1%
C1 0.01UF/2KV
DM9332 Fiber = Demo-board
Size
A4
Date:
5
RXNC
RX+
MCT
NC
TXNC
TX+
MAGCOM_HS9016
0.1UF 0.1UF 0.1UF 0.1UF
R180
1M
D
DO NOT PLACE ETHERNET
TRANSFORMER, U1, WHEN USING FIBER
MODULE
FM0_VCC
1
2
3
4
5
6
7
8
9
R186
DC
TERMINATION
NC
R82
0/NC
JP22
R88 R89
127/1% 127/1%
FX0_RX+
FX0_RXFX_SD
0.1UF
0.1UF
C44
C45
R81
0
R87
127/1%
R184
AC
TERMINATION
0 OHM
3
2
Document Number
FIBER and RJ45_LED
Thursday, June 25, 2009
Rev
1.0
5
Sheet
1
of
7
5
4
3
2
IN
OUT
PIN_5
PIN_6
PIN_7
PIN_9
PIN_10
PIN_5
PIN_6
PIN_7
PIN_9
PIN_10
PIN_14
D
PIN_56 2
PIN_58 2
PIN_62
PIN_62 2,3
EECK
EECS
EEDIO
EECK
EECS
EEDIO
LNK0_LED
LNK1_LED
B
TXD3
0
0
1
1
TXD2
0
1
0
1
|
|
|
|
|
PORT 2 INTERFACE
MII
Reverse MII
RMII
RGMII
DVDD_33V
SPD0_LED 5
SPD1_LED 5
2
2
2
DVDD_33V
R39
4.7K
R42
4.7K
R46
4.7K
R51
4.7K
LNK0_LED
EECK
EECS
JP6
JP7
JUMPER R33
JUMPER R34
4.7K
4.7K
(TXER)
(TXEN)
PIN_14
PIN_10
JP8
JP9
JUMPER R38
JUMPER R40
4.7K
4.7K
(TXD3)
(TXD2)
PIN_5
PIN_6
JP10
JP11
JUMPER R43
JUMPER R45
4.7K
4.7K
(TXD1)
PIN_7
JP12
JUMPER R50
4.7K
(TXD0)
PIN_9
JP13
JUMPER R53
4.7K
SPD0_LED
PIN_58
LNK1_LED
SPD1_LED
PIN_56
B
DVDD_33V
R30
NC
DVDD_33V
R35
NC
PIN_62
EEDIO
R36
4.7K
PIN_63
(DSP_MOD)
R31
NC
Optional
SPD0_LED
SPD1_LED
C
DVDD_33V
A
D
LNK0_LED 2,5
LNK1_LED 2,5
MII Mode Strap Pins
EECK : 0= SPD100 in p2 force mode
1= SPD10 in p2 force mode
EECS : 0= p0 in Copper mode
1= p0 in Fiber mode
TXER : 0= p1 in Copper mode
1= p1 in Fiber mode
TXEN : 0= Port 2 normal mode
1= Port 2 force mode
TXD0 : SMI addr bit 0
TXD1 : SMI addr bit 1
2,3
2,3
2,3
2,3
2,3
PIN_14 2,3
PIN_56
PIN_58
C
1
(P2_SEL)
R48
NC
Optional
R49
NC
A
Optional
Davicom Semiconductor Inc.
Title
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
2
Document Number
STRAP PINS
Thursday, June 25, 2009
Rev
1.0
Sheet
6
1
of
7
5
VER
1.0
4
DATE
ENGINEER
3
2
1
NOTE
04/14/2009 WILLIE
NIOU
Initial Circuit creation
D
D
C
C
B
B
A
A
Davicom Semicondutor Inc.
Title
DM9332 Fiber = Demo-board
Size
A4
Date:
5
4
3
2
Document Number
HISTORY
Thursday, June 25, 2009
Rev
1.0
7
Sheet
1
of
7