5 4 3 2 1 Fiber Module RJ 45 1 D 2 D LED JP4 60mm CON2 25 MHz XTAL C 50 MHz OSC FOR RMII JP3 PHY DM9161A/B/C DM9162 C 80mm BOOTSTRAP PINS B B MII/RMII I/F A POWER FROM MII +5V IN +3.3V OUT POWER +3.3V IN +1.8V OUT Title Size A4 Date: 5 A Davicom Semiconductor Inc. 4 3 2 PHY Demo Board (PCB_Overview) Document Number 01TOP Thursday, September 01, 2011 Rev 1.1 Sheet 1 1 of 3 5 4 MII/CRYSTAL MII/OSCILLATOR X X X X X X X X X V V V V V V V V V X X X X X X X V V X X V V V V V X X X X V V V V FOR DM9162, RMII 50MHZ CLOCK OUTPUT AT TXCLK WHEN TXCLK PULL-UP EXIST DO NOT USE WITH ANY OTHER PART V X X X TXC2 V X R34 RXD2_3 RXD2_2 RXD2_1 RXD2_0 R143 R144 R145 R146 R80 4.7K/NC R76 0/NC TXER TXD2_3 TXD2_2 TXD2_1 TXD2_0 TXE2 R170 R32 R33 R64 R65 R66 0/NC 0/NC 0/NC 0 0 0 TXER_I TXD3 TXD2 TXD1 TXD0 TXEN MDC R67 0 MDC_I R63 0/NC Q1 2N3906/NC R35 R68 R36 RXC2 CRS2 COL2 R69 R37 R38 R70 R71 D16 330/NC K A R164 330 A R168 330 A R173 330 D17 0/NC MDIO_I RXD3 RXD2 RXD1 RXD0 25 26 27 28 29 30 31 32 33 34 35 36 0/NC RXC 0/NC CRS 0/NC COL R39 R40 R41 MDIO RXD3/PHYAD3 RXD2/PHYAD2 RXD1/PHYAD1 RXD0/PHYAD0 DVDD LEDMODE MDINTR# DGND RXCLK/SCRAMEN/10BTSER CRS/PHYAD4 COL/RMII 3V3 D LED R175 R176 SELECT TP AND FIBER MODE: OP0 OP1 OP2 1 1 TP MODE 0 = NORMAL OPERATION 1 0 1 0 FIBER MODE 1 = POWERDOWN DVDD_33V 4.7K/NC POWERDOWN 0 MAGCOM HS-9016 DELTA LFE8563-DC DELTA LFE8563T-DC EXT_1V8 SPD2_LED_CHIP FDX2_LED PWRDWN 12 11 10 9 8 7 6 5 4 3 2 1 R78 0/NC R79 0 1 2 3 4 5 6 7 8 RX2RX2+ R51 49.9/1% R52 JP3 RJ-45 T1 TX2TX2+ R50 49.9/1% RDNC RD+ NC CT TDNC TD+ R53 49.9/1% R46 6.8K/1% 8 7 6 12 5 11 4 10 3 9 2 1 16 15 14 13 12 11 10 9 12 11 10 9 C R54 R55 R56 75/1% 75/1% 75/1% C42 U1 PHY/LQFP48 C43 0.1uF RXNC RX+ MCT NC TXNC TX+ ETHERNET XFMR 49.9/1% SD RXDV RXER RESETB D18 AVDD_POWER SPDLED/OP1 FDXLED/OP0 PWRDWN AVDD TXTX+ AGND AGND RXRX+ AVDD AVDD 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 CHOKE/NC 0 0/NC 0/NC 0 330/NC K 0/NC LNK2_LED BGRES R43 R44 R45 R72 R171 0/10K R174 R172 FDX2_LED 4.7K 4.7K 4.7K 0 0/NC 0/NC 0 0 CRS2 RXDV2 RXER2 PHY_RESETN 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 VCC5 R166 0/10K R169 R167 SPD2_LED SPD2_LED_CHIP DVDD_33V L3 HEADER_16X2 R77 0 DVDD_33V MDIO RXD2_3 RXD2_2 RXD2_1 RXD2_0 RXC2 TXC2 RXER2 TXE2 COL2 CRS2 TXD2_3 TXD2_2 TXD2_1 TXD2_0 MDC R163 LNK2_LED 330/NC K 0/NC LED PWRDWN PULL DOWN ONLY FOR DEBUGGING PURPOSE 4.7K/NC 4.7K/NC 4.7K/NC 4.7K/NC 3V3 C44 0.1uF C45 0.1uF C48 0.01uF/2KV C49 0.1uF 0.1uF C40 220uF DVDD_33V R147 R177 4.7K/NC 4.7K/NC AUTO-MDIX 0 = ENABLE 1 = DISABLE PULL DOWN ONLY FOR DEBUGGING PURPOSE PWRST# RXC2 DVDD_33V Power 5V TO 3.3V CHOKE/NC 4 C53 220uF C54 0.1uF 7 1 RA2 549 Vcc OUT 3 NC GND 2 25MHz/49US C46 22pF DVDD_33V C58 220uF R59 10K C59 0.1uF 1 3 2 D19 1N4148/NC DGND COMBINE WITH AGND, NO GND PLANE SEPARATION 5 C50 10uF 1 PHY_RESETN M HOLE1 power on reset (select one use) R159 0R R160 0R R161 3 MH2 MH3 M HOLE1 FD1 FD2 FD3 0R 0R R178 83/1% R179 83/1% R180 182/1% C60 Fiber_3.3V R181 0.1uF 182/1% MH4 M HOLE1 DAVICOM SEMICONDUCTOR INC. Title M HOLE2 4 R158 0R M HOLE1 1 0/NC 0R 1 R61 47K/NC R155 R156 A 1 ADJUSTABLE LDO CALCULATION Vout = Vref x ( 1 + RB2 / RB1) Vref = 1.25 V For fixed Vout LDO, RB1 = open, RB2 = 0 ohm R60 1 PWRST# TX2TX2+ B U2 RESET_IC_(AP1701DW) NC MH1 RB2 147. 0R 0R 2 RB1 330 1 4 JP4 1 2 3 4 5 6 7 8 9 1 1 OUT C57 220uF 3 AP1117-1.8V UT 2 2 DO NOT USE IN GNDO U4 R153 R154 R157 83/1% EXT_1V8 3 C47 22pF RX2+ RX2SD 1 DVDD_33V DVDD_33V R150 127/1% R151 R152 69/1% 69/1% 50MHZ OSC RMII OSCILLATOR, 50MHZ: RIVER FCXO-05 LF (TONSAM CORP) SiTIME SiT8103AI-12-33E-50.00000 R149 127/1% R58 0/NC Y3 Y4 Power 3.3V TO 1.8V C56 0.1uF GND R148 127/1% R57 0/NC 3.3V_50Mhz C55 0.1uF 4 ADJUSTABLE LDO CALCULATION Vout = Vref x ( 1 + RA2 / RA1) Vref = 1.25 V For fixed Vout LDO, RA1 = open, RA2 = 0 ohm NC 0 XT1 8 1 RA1 330 1 C52 220uF OUT 1 OUT C51 0.1uF 1 Vcc 0 XT2 R49 M HOLE2 PHY Demo Board Size A3 1 CHOKE 14 C41 0.1uF R48 M HOLE2 Document Number 02PHY Rev 1.1 1 IN L4 3V3_FIBER Y2 1 3 AP1117-3.3V UT 2 DVDD_33V 3V3_FIBER For FIBER MODULE 0 1 U3 R62 0 4.7K/NC 0 1 L1 GNDO VCC5 R47 R73 R74 1 MDIO RXDV2 TXER A 4.7K/NC R162 0/10K R165 LED 0/NC R35 R68 PHY ID X X 0 X V 1 V X 2 V V 3 C B R75 V Y3 IS NEEDED FOR DM9162 WHEN OUTPUT 50MHZ CLOCK ON TXCLK PIN CON2 SPD2_LED DVDD_33V 24 23 22 21 20 19 18 17 16 15 14 13 X DVDD_33V MDC DVDD TXCLK TXEN TXD0 TXD1 TXD2 TXD3 TXER/TXD4 DGND CABLESTS/LINKSTS LINKLED/OP2 X 1 DVDD_33V DM1961B SPEED LED MODIFICATION ONLY NECESSARY FOR DM9161B FOR OTHER PHY, DO NOT USE TRANSISTOR RXDV RXER/RXD4 AUTO-MDIX# RESET# DVDD XT2 XT1 DGND SD AGND BGRESG BGRES V V V V V V V V V 2 37 38 39 40 41 42 43 44 45 46 47 48 D R32 R33 R170 R34 R37 R38 R39 R40 R41 R43 R44 R45 R36 R47 R48 R49 R57 R58 Y3 Y2/Y4 3 X = DO NOT POPULATE V = POPULATE RMII/OSCILLATOR Date: 2 Thursday, September 01, 2011 Sheet 1 2 of 3 5 VER 4 DATE 1.0 3 ENGINEER 2 1 NOTE 12/12/2007 WILLIE NIOU INITAL CIRCUIT CREATION D D 1.1 4/12/2010 WILLIE NIOU BUG FIX AND ENHANCEMENTS: 1. CON2 GND CONNECT TO BOARD GND 2. LED LAYOUT LIBRARY NOT SAME AS ACUTAL COMPONENT USED. NEED TO CHANGE DIRECTION 180 DEGREES 3. C42 NEED TO CONNECT PIN 2 AND 3 TOGETHER 4. AGND AND DGND CONNECTED 5. ADD SPEED LED CONTROL CIRCUIT, DUE TO DM9161B DESIGN 6. ADD EXTERNAL 1.8V LDO FOR INPUT TO CENTER TAP OF TRANSFORMER TO REDUCE HEAT DISSIPATION BY CHIP C C 2011/7/5 ALLIANG 1: 2: 3: 4: ADD Fiber Module and termination circuit CN2 MII Connector change to 16*2 Pinch 2.54mm Change LED Anode & Cathode Add R63,R80 For TXCLK and RXCLK wire link B B A A Davicom Semiconductor Inc. Title Size A4 Date: 5 4 3 2 PHY Demo Board (History) Document Number HISTORY Thursday, September 01, 2011 Rev 1.1 Sheet 3 1 of 3