AOC4810

AOC4810
30V Common-Drain Dual N-Channel MOSFET
General Description
Product Summary
The AOC4810 uses advanced trench technology to provide
excellent RSS(ON), low gate charge and operation with gate
voltages as low as 4.5V while retaining a 20V VGS(MAX) rating. It
is ESD protected. This device is suitable for use as a unidirectional or bi-directional load switch, facilitated by its
common-drain configuration.
Vss
IS (at VGS=10V)
30V
8A
RSS(ON) (at VGS=10V)
< 8.8mΩ
RSS(ON) (at VGS=4.5V)
< 14.5mΩ
Typical ESD protection
HBM Class 3A
AlphaDFN 3.2x2_8
Top View
Bottom View
Top View
Bottom View
D1
D2
Pin1(G1)
1
8
7
6
2
3
4
5
D1/D2
G1
G2
S1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VSS
S2
Maximum
30
Units
V
VGS
±20
V
IS
8
Source Current (Pulse) Note2
ISM
30
Power Dissipation Note1 T =25°C
A
PD
Junction and Storage Temperature Range
TJ, TSTG
Gate-Source Voltage
Source Current (DC) Note1
TA=25°C
Thermal Characteristics
Parameter
Symbol
t ≤ 10s
Maximum Junction-to-Ambient
RθJA
Steady-State
Maximum Junction-to-Ambient
Note 1. Mounted on minimum pad PCB.
Note 2. PW <300 µs pulses, duty cycle 0.5% max
Rev.3.0: June 2015
A
W
0.9
-55 to 150
Typ
75
120
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°C
Max
90
145
Units
°C/W
°C/W
Page 1 of 5
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVSSS
Source-Source Breakdown Voltage
Conditions
Min
IS=250µA, VGS=0V, Test Circuit 6
Zero Gate Voltage Source Current
IGSS
Gate leakage current
VSS=0V, VGS= ±16V, Test Circuit 2
VGS(th)
Gate Threshold Voltage
VSS=VGS, IS=250µA, Test Circuit 3
Units
V
1
TJ=55°C
5
µA
±10
1.4
VGS=10V, IS=5A, Test Circuit 4
Static Source to Source On-Resistance
Max
30
VSS=30V, VGS=0V, Test Circuit 1
ISSS
RSS(ON)
Typ
TJ=125°C
VGS=4.5V, IS=5A, Test Circuit 4
1.8
2.2
7.2
8.8
10
12.2
11.5
14.5
gFS
Forward Transconductance
VSS=5V, IS=5A, Test Circuit 3
25
VFSS
Diode Forward Voltage
IS=1A,VGS=0V, Test Circuit 5
0.71
DYNAMIC PARAMETERS
Ciss
Input Capacitance
V
mΩ
S
1
V
1130
pF
500
pF
90
pF
1.1
Ω
SWITCHING PARAMETERS
tD(on)
Turn-On DelayTime
8
ns
tr
Turn-On Rise Time
16
ns
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=15V, f=1MHz,
VGS=0V, VSS=0V, f=1MHz
VG1S1=10V, VSS=15V, RL=3Ω, RGEN=3Ω
VG1S1=10V, VSS=15V, IS=5A
25
ns
5
ns
20
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Rev.3.0: June 2015
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Page 2 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
100
4.5V
10V
4V
6V
VSS=5V
80
80
3.5V
60
IS(A)
IS (A)
60
125°C
40
40
3V
25°C
20
20
VGS=2.5V
0
0
0
1
2
3
4
5
0
1
3
4
5
6
1.6
18
Normalized On-Resistance
15
VGS=4.5V
RSS(ON) (mΩ)
2
VGS(Volts)
Figure 2: Transfer Characteristics
VSS (Volts)
Fig 1: On-Region Characteristics
12
9
6
VGS=10V
3
0
VGS=10V
Is=5A
1.4
1.2
VGS=4.5V
Is=5A
1
0.8
0
5
10
15
20
0
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
IS (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage
1.0E+01
24
IS=5A
1.0E+00
20
125°C
1.0E-01
125°C
IS (A)
RSS(ON) (mΩ)
16
12
1.0E-02
25°C
8
1.0E-03
25°C
4
1.0E-04
0
0
2
4
6
8
10
1.0E-05
0.0
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Rev.3.0: June 2015
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0.2
0.4
0.6
0.8
1.0
VSS (Volts)
Figure 6: Body-Diode Characteristics
Page 3 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
1600
VSS=15V
IS=5A
1400
8
Ciss
Capacitance (pF)
VGS (Volts)
1200
6
4
1000
800
Coss
600
400
2
Crss
200
0
0
5
10
15
20
0
25
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
5
10
15
20
100.0
RSS(ON)
limited
TJ(Max)=150°C
TA=25°C
1ms
1.0
10ms
100ms
TJ(Max)=150°C
TA=25°C
0.1
10s
DC
0.0
0.01
40
100µs
0.1
1
10
100
Power (W)
IS (Amps)
30
50
10µs
10.0
25
VDS (Volts)
Figure 8: Capacitance Characteristics
30
20
10
0
0.0001 0.001 0.01
0.1
1
10
100
1000 10000
VSS (Volts)
Pulse Width (s)
VGS> or equal to 4.5V
Figure 10: Single Pulse Power Rating Junction-toAmbient
Figure 9: Maximum Forward Biased Safe
ZθJA Normalized Transient
Thermal Resistance
10
D=Ton/(Ton+T)
TJ,PK=TA+PD.ZθJA.RθJA
RθJA=145°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
PD
Single Pulse
Ton
0.01
0.001
0.01
0.1
1
10
T
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance
Rev.3.0: June 2015
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Page 4 of 5
TEST CIRCUIT 1 Isss
TEST CIRCUIT 2 Igss1,2
POSITIVE VSS FOR ISSS+
POSITIVE VGS FOR IGSS1+
S2
NEGATIVE VSS FOR ISSS-
S2
NEGATIVE VGS FOR IGSS1When FET1 is measured
between GATE and SOURCE
G2
A
G2
of FET2 are shorted
D2
D2
D1
D1
VSS
G1
G1
A
VG
S1
TEST CIRCUIT 3 Vgs(off)
S1
TEST CIRCUIT 4 Rss(on)
S2
S2
When FET1 is measured
Vss/Is
between GATE and SOURCE
of FET2 are shorted
G2
G2
A
Is
D2
D2
D1
D1
VSS
G1
G1
V
VSS
VGS
VGS
S1
TEST CIRCUIT 5 VF(SS)1,2
S1
TEST CIRCUIT 6 BVDSS
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
S2
S2
4.5V
When FET1 measured
G2
G2
IF
FET2 VGS=4.5V
Is
D2
D2
D1
D1
G1
G1
V
V
VSS
VGS=0
S1
S1
TEST CIRCUIT 7 BVGSO1,2
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
S2
When FET1 is measured
between GATE and SOURCE
G2
of FET2 are shorted
D2
D1
G1
V
IG
Rev.3.0: June 2015
S1
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Page 5 of 5