AOT8N50/AOTF8N50

AOT8N50/AOTF8N50
500V, 9A N-Channel MOSFET
General Description
Product Summary
The AOT8N50 & AOTF8N50 have been fabricated using
an advanced high voltage MOSFET process that is
designed to deliver high levels of performance and
robustness in popular AC-DC applications.
By providing low RDS(on), Ciss and Crss along with
guaranteed avalanche capability these parts can be
adopted quickly into new and existing offline power supply
designs.
VDS
ID (at VGS=10V)
[email protected]
9A
RDS(ON) (at VGS=10V)
< 0.85Ω
100% UIS Tested
100% Rg Tested
For Halogen Free add "L" suffix to part number:
AOT8N50L & AOTF8N50L
TO-220
G
D
Top View
TO-220F
D
G
G
D
S
S
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
AOT8N50
Drain-Source Voltage
VDS
500
Gate-Source Voltage
±30
Continuous Drain
Current
VGS
TC=25°C
TC=100°C
AOTF8N50
V
9
ID
Units
V
9*
6
6*
A
Pulsed Drain Current C
IDM
30
Avalanche Current C
IAR
3.2
A
Repetitive avalanche energy C
EAR
154
mJ
Single plused avalanche energy G
Peak diode recovery dv/dt
TC=25°C
Power Dissipation B Derate above 25oC
Junction and Storage Temperature Range
Maximum lead temperature for soldering
purpose, 1/8" from case for 5 seconds
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A,D
EAS
dv/dt
307
5
mJ
V/ns
W
PD
38.5
0.3
TJ, TSTG
-55 to 150
W/ oC
°C
300
°C
TL
Symbol
RθJA
RθCS
AOT8N50
65
AOTF8N50
65
Units
°C/W
0.5
0.65
-3.25
°C/W
°C/W
Maximum Case-to-sink A
Maximum Junction-to-Case
RθJC
* Drain current limited by maximum junction temperature.
Rev7: January 2015
192
1.5
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Page 1 of 6
AOT8N50/AOTF8N50
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
ID=250µA, VGS=0V, TJ=25°C
500
Typ
Max
Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
BVDSS
/∆TJ
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS=±30V
Gate Threshold Voltage
VDS=5V ID=250µA
VGS(th)
ID=250µA, VGS=0V, TJ=150°C
600
ID=250µA, VGS=0V
V
V/ oC
0.56
VDS=500V, VGS=0V
1
VDS=400V, TJ=125°C
10
±100
3.4
µA
4
4.5
nΑ
V
0.85
Ω
1
V
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=4A
0.63
gFS
Forward Transconductance
VDS=40V, ID=4A
10
VSD
Diode Forward Voltage
IS=1A,VGS=0V
S
0.73
IS
Maximum Body-Diode Continuous Current
8
A
ISM
Maximum Body-Diode Pulsed Current
30
A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=25V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
VGS=10V, VDS=400V, ID=8A
694
868
1042
pF
74
93
112
pF
6.2
7.8
9.4
pF
2
4
6
Ω
23.6
28
nC
5.2
6.2
nC
10.6
12.7
nC
19.5
24
ns
VGS=10V, VDS=250V, ID=8A,
RG=25Ω
47
56.4
ns
51.5
62
ns
38.5
46
ns
IF=8A,dI/dt=100A/µs,VDS=100V
206
247
2.1
2.6
ns
µC
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=8A,dI/dt=100A/µs,VDS=100V
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T J(MAX)=150°C. The SOA curve provides a single pulse rating.
G. L=60mH, IAS=3.2A, VDD=150V, RG=25Ω, Starting TJ=25°C
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev7: January 2015
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Page 2 of 6
AOT8N50/AOTF8N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
16
100
10V
14
12
10
10
6V
ID(A)
ID (A)
-55°C
VDS=40V
6.5V
8
125°C
6
1
VGS=5.5V
4
25°C
2
0
0.1
0
5
10
15
20
25
30
2
4
VDS (Volts)
Fig 1: On-Region Characteristics
3
1.4
2.5
Normalized On-Resistance
1.6
1.2
RDS(ON) (Ω )
6
8
10
VGS(Volts)
Figure 2: Transfer Characteristics
1.0
0.8
VGS=10V
0.6
VGS=10V
ID=4A
2
1.5
1
0.5
0
0.4
0
2
4
6
-100
8
10
12
14
16
18
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage
-50
0
50
100
150
200
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
1.0E+02
1.2
40
1.1
1.0E+00
125°C
IS (A)
BVDSS (Normalized)
1.0E+01
1
1.0E-01
25°C
1.0E-02
1.0E-03
0.9
1.0E-04
0.8
1.0E-05
-100
-50
0
50
100
150
200
TJ (°C)
Figure 5: Break Down vs. Junction Temperature
Rev7: January 2015
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0.0
0.2
0.4
0.6
0.8
1.0
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 6
AOT8N50/AOTF8N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10000
VDS=400V
ID=8A
Ciss
Capacitance (pF)
VGS (Volts)
12
9
6
1000
Coss
100
10
3
Crss
0
1
0
5
10
15
20
25
30
Qg (nC)
Figure 7: Gate-Charge Characteristics
35
100
0.1
1
10
VDS (Volts)
Figure 8: Capacitance Characteristics
100
100
10µs
RDS(ON)
limited
RDS(ON)
limited
10
100µs
1ms
1
10ms
ID (Amps)
ID (Amps)
10
10µs
100µs
1ms
1
10ms
DC
0.1
DC
0.1
TJ(Max)=150°C
TC=25°C
TJ(Max)=150°C
TC=25°C
0.01
0.1s
1s
0.01
1
10
100
1000
1
10
100
1000
VDS (Volts)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area for AOT8N50 (Note F)
Figure 10: Maximum Forward Biased Safe Operating
Area for AOTF8N50 (Note F)
10
Current rating ID(A)
8
6
4
2
0
0
25
75
100
125
TCASE (°C)
Figure 11: Current De-rating (Note B)
Rev7: January 2015
50
150
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Page 4 of 6
AOT8N50/AOTF8N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=0.65°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
0.01
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance for AOT8N50 (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=3.25°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
0.01
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 13: Normalized Maximum Transient Thermal Impedance for AOTF8N50 (Note F)
Rev7: January 2015
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Page 5 of 6
AOT8N50/AOTF8N50
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+
VDC
-
VDC
DUT
Qgs
Vds
Qgd
-
Vgs
Ig
Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
+
VDC
90%
Vdd
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LI
Vds
2
AR
BVDSS
Vds
Id
+
Vgs
Vgs
VDC
-
Rg
Vdd
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Tes t Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
Vgs
Ig
Rev7: January 2015
L
Isd
+ Vdd
trr
dI/dt
IRM
Vdd
VDC
-
IF
Vds
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