TJ6813 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator SOP8-PP PKG FEATURES Guaranteed 3A Output Current Efficiency up to 95% Operate from 2.8V to 5.5V Supply Adjustable Output from 0.8V to VIN*0.86 Internal Soft-Start Short-Circuit and Thermal -Overload Protection 1MHz Switching Frequency Reduces Component size ORDERING INFORMATION APPLICATION DFN3X3-8L ASIC/DSP/μP/FPGA Core and I/O Voltages Set-Top Boxes Networking and Telecommunications Cellular Base Stations Servers TVs Device Package TJ6813GDP SOP8-PP TJ6813GQ DFN3X3-8L DESCRIPSION The TJ6813 high-efficiency, DC-DC step-down switching regulator delivers up to 3A of output current The device operates from an input voltage range of 2.8V to 5.5V and provides an adjustable output voltage from 0.8V to VIN*0.86, making the TJ6813 ideal for on-board post regulation applications. The efficiency of TJ6813 at heavy load is up to 95%. The TJ6813 operates at a fixed frequency of 1MHz. The high operating frequency minimizes the size of external components. Internal soft-start circuitry reduces inrush current. Short-circuit and thermal-overload protections improve design reliability. PIN CONFIGURATION VCC 1 Typical Application Circuit 8 VIN REF 2 7 LX VCC REF 2 Exposed PAD GND 3 5 EN SOP8-PP Feb. 2014 – R1.0.2 7 VIN VIN LX VCC FB 10Ω LX 10uF GND 3 6 PGND FB 4 5 EN Output 0.8 to VIN*0.86, Up to 3A 2.2uH R1 0.1uF Top view 6 PGND FB 4 8 1 Input 2.8V to 5.5V TJ6813 EN ON CFB (option) 20uF R2 REF OFF 0.1uF GND PGND R1 V OUT 0.8V 1 R2 DFN3X3-8L -1 - HTC TJ6813 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator Absolute Maximum Ratings SYMBOL MIN. MAX. UNIT VIN, VCC, REF to GND -0.3 6.5 V EN, FB to GND -0.3 VCC+0.3 V PGND to GND -0.3 0.3 V Storage Temp. Range A Lead Temperature (Soldering, 5s) LX current Internally Limited SYMBOL MIN. MAX. UNIT -40 85 ℃ -40 125 ℃ -65 150 ℃ 260 ℃ Operating Ambient Temperature (TA) Operating Junction Temperature Range (TJ) (1) It is recommended for VEN not to exceed VIN Voltage ELECTRICAL CHARACTERISTICS(Note 1) Limits in standard typeface are for TJ=25℃. VIN=VCC=5V, PGND=GND, FB in regulation, CREF=100nF, TA=-40°C to +125°C, unless otherwise noted. Typical values are at TA=+25°C. PARAMETER TEST CONDITION MIN Input Voltage Range TYP MAX UNIT 5.5 V 1 2 mA 1 5 uA 2.8 Supply Current Switching with no load, LX floating VIN=5.0V Shutdown Current EN=GND VCC Undervoltage Lockout Threshold When LX starts/stops switching REF Voltage IREF=0, VIN=2.8V to 5V Output Voltage Range when using external feedback resistors to drive FB Output Voltage Line Regulation VIN = 3V to 5V 0.5 %/V Output Voltage Load Regulation ILOAD = 0A to 3A 0.5 %/A FB Regulation Voltage ILOAD = 0A to 1.5A, VIN = 2.8V to 5.0V VCC Rising 2.45 VCC Falling 2.35 V 0.8 0.8 0.776 FB Input Bias Current VIN*0.86 0.8 - -0.1 V 0.824 V 0.1 uA LX On-Resistance, PMOS VIN = 5V 120 mΩ LX On-Resistance, NMOS VIN = 5V 90 mΩ 4.8 A LX Current-Limit Threshold Duty cycle = 86%, VIN=2.8V to 5.0V 0 A High side 4.1 Low side VLX=5.0V 10 uA LX Leakage Current VIN=5.0V LX Switching Frequency VIN = 2.8V to 5.0V LX Maximum Duty Cycle VFB=GND, LX=High-Z, VIN=2.8V to 5.0V 86 % LX Minimum Duty Cycle VFB=VIN, VIN=2.8V to 5.0V 12 % TJ rising 160 °C TJ falling 145 °C Thermal-Shutdown Threshold 1) VLX=GND -10 - uA 1 - When LX starts/stops switching Logic High 1.7 MHz V EN Enable Threshold Logic Low 1.3 V Note 1). Guaranteed by design, not tested Feb. 2014 – R1.0.2 -2 - HTC TJ6813 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator PIN DESCRIPTION PIN Name Function 1 VCC Analog Supply Voltage. Bypass with 0.1uF capacitor to ground and 10Ω resistor to VIN 2 REF Reference Bypass. Bypass with 100nF capacitor to ground. 3 GND Analog ground 4 FB Feedback input. Connect an external resistor-divider from the output to FB and GND to set the output to a voltage between 0.8V and VIN*0.86 5 EN Enable. (Enable : EN=VCC, Disable : EN=GND) 6 PGND 7 LX Inductor Connection. Connect an inductor between LX and the regulator output. 8 VIN Power-supply voltage. Input voltage range from 2.8V to 5.5V. Bypass with a 10uF(min.) ceramic capacitor to ground and a 10Ω resistor to VCC - Exposed Thermal PAD Power Ground. Keep power ground and analog ground planes separate. Connect to ground Block Diagram VCC EN VIN UVLO Bandgap Reference TSD OCP Enable Detector Current Sensor GND OSC REF EAMP PWM Modulator Control Logic FB LX OVP SHT_PROT Reverse Inductor Current Detector Feb. 2014 – R1.0.2 -3 - PGND HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 TYPICAL OPERATING CHARACTERISTICS PFM OPERATION PWM OPERATION TYPICAL OPERATION(PFM MODE) TYPICAL OPERATION(PWM MODE) LOAD TRANSIENT Feb. 2014 – R1.0.2 LOAD TRASIENT -4 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 TYPICAL OPERATING CHARACTERISTICS(Continued) LINE TRANSIENT LINE TRANSIENT START-UP TIMING START-UP TIMING Feb. 2014 – R1.0.2 -5 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 TYPICAL PERFORMANCE CHARACTERISTICS SWITCHING FREQUENCY vs INPUT VOLTAGE EFFICIENCY vs LOAD CURRENT(VIN=5V) OUTPUT VOLTAGE DEVIATION vs INPUT VOLTAGE OUTPUT VOLTAGE DEVIATION vs LOAD CURRENT SHUTDOWN vs INPUT VOLTAGE SUPPLY CURRENT vs INPUT VOLTAGE Feb. 2014 – R1.0.2 -6 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 Detailed Description The TJ6813 high-efficiency switching regulator is a small, simple, internal compensation, voltage-mode DCDC step-down converter capable of delivering up to 3A of output current. The device operates in pulse-width modulation (PWM) at a fixed frequency of 1MHz from a 2.8V to 5.5V input voltage and provides an output voltage from 0.8V to VIN*0.86, making the TJ6813 ideal for on-board post regulation applications. The high switching frequency allows for the use of smaller external components, and an internal synchronous rectifier improves efficiency and eliminates the typical Schottky free-wheeling diode. Using the on-resistance of the internal high-side MOSFET to sense switching currents eliminates current sense resistors, further improving efficiency and cost. Controller Block Function The TJ6813 step-down converter uses a PWM voltage-mode control scheme. An open-loop comparator compares the integrated voltage-feedback signal against ramp signal. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this on-time, current ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The voltage mode feedback system regulates the peak inductor current as a function of the outputvoltage error signal. Since the average inductor current is nearly the same as the peak inductor current (< 30% ripple current), the circuit acts as a switch-mode transconductance amplifier. During the second half of the cycle, the internal high-side p-channel MOSFET turns off, and the internal low-side n-channel MOSFET turns on. The inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current, and discharges when the inductor current is lower, smoothing the voltage across the load. Under overload conditions, when the inductor current exceeds the current limit (see the Current Limit section), the high-side MOSFET does not turn on at the rising edge of the clock and the low-side MOSFET remains on to let the inductor current ramp down. Current Sense An internal current-sense amplifier produces a current signal proportional to the voltage generated by the high-side MOSFET on-resistance and the inductor current (RDS(ON) x ILX). The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the output from the voltage-error amplifier. Current Limit The internal high-side MOSFET has a current limit of 4.8A (typ). If the current flowing out of LX exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. This lowers the duty cycle and causes the output voltage to drop until the current limit is no longer exceeded. A synchronous rectifier current limit of 0A (typ) protects the device from current flowing into LX. If the negative current limit is exceeded, the synchronous rectifier turns off, forcing the inductor current to flow through the highside MOSFET body diode, back to the input, until the beginning of the next cycle or until the inductor current drops to zero. The TJ6813 utilizes a pulse-skip mode to prevent overheating during short-circuit output conditions. The device enters pulse-skip mode when the FB voltage drops below 300mV, limiting the current to 4.8A (typ) and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition. VCC Decoupling Due to the high switching frequency, decouple VCC with a 1μF capacitor connected from VCC to GND, and a 10Ω resistor connected from VCC to IN. Place the capacitor as close as possible to VCC. Feb. 2014 – R1.0.2 -7 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 Soft Start The TJ6813 employs internal soft-start circuitry to reduce supply inrush current during startup conditions. When the device exits under voltage lockout (UVLO) shutdown mode, or restart following a thermaloverload event or EN is driven high, the digital soft-start circuitry slowly ramps up the voltage to the erroramplifier noninverting input. Undervoltage Lockout If VCC drops below 2.35V, the UVLO circuit inhibits switching. Once VCC rises above 2.45V, the UVLO clear and the soft-start sequence activates. Shutdown Mode Use the enable input, EN, to turn on or off the TJ6813. Connect EN to VCC for normal operation. Connect EN to GND to place the device in shutdown. Shutdown causes the internal switches to stop switching and forces LX into a high-impedance state. In shutdown, the TJ6813 draws under 1μA of supply current. The device initiates a soft-start sequence when brought out of shutdown. Thermal-Overload Protection Thermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds TJ = +160°C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown condition, the softstart sequence begins. Feb. 2014 – R1.0.2 -8 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 Application Information Adjustable Output Voltage The TJ6813 provides an adjustable output voltage between 0.8V and VIN*0.86. Connect FB to output for 0.8V output. To set the output voltage of the TJ6813 to a voltage greater than VFB (0.8V typ) connect the output to FB and GND using a resistive divider, as shown in Typical Application Circuit. Choose R2 between 2kΩ and 20kΩ, and set R1 according to the following equation: R1 = R2 x [(VOUT/VFB) - 1] The TJ6813 PWM circuitry is capable of a stable minimum duty cycle of 12%. This limits the minimum output voltage that can be generated to 0.12*VIN with an absolute minimum of 0.8V. Instability may result for VOUT/VIN ratios below 0.12. An external feed forward capacitor CFB is recommended for optimum load transient response. The value of CFB should recommend in the range between 50pF and 150pF. Output Inductor Selection Use a 2μH inductor with a minimum 3A-rated DC current for most applications. For best efficiency, use an inductor with a DC resistance of less than 20mΩ and a saturation current greater than 5A (min). For most designs, derive a reasonable inductor value (LINIT) from the following equation: LINIT = VOUT x (VIN - VOUT)/(VIN x LIR x IOUT(MAX) x fSW) where fSW is the switching frequency (1MHz typ) of the oscillator. Keep the inductor current ripple percentage LIR between 20% and 40% of the maximum load current for the best compromise of cost, size, and performance. Calculate the maximum inductor current as: IL(MAX) = (1 + LIR/2) x IOUT(MAX) Check the final values of the inductor with the output ripple voltage requirement. The output ripple voltage is given by: VRIPPLE = VOUT x (VIN - VOUT) x ESR/(VIN x LFINAL x fSW) where ESR is the equivalent series resistance of the output capacitors. Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents defined by the following equation: IRMS (1/VIN) (IOUT VOUT (VIN VOUT )) 2 For duty ratios less than 0.5, the input capacitor RMS current is higher than the calculated current. Therefore, use a +20% margin when calculating the RMS current at lower duty cycles. Use ceramic capacitors for their low ESR and equivalent series inductance (ESL). Choose a capacitor that exhibits less than 10°C temperature rise at the maximum operating RMS current for optimum long-term reliability. After determining the input capacitor, check the input ripple voltage due to capacitor discharge when the highside MOSFET turns on. Calculate the input ripple voltage as follows: VIN_RIPPLE = (IOUT x VOUT)/(fSW x VIN x CIN) Keep the input ripple voltage less than 3% of the input voltage. Output Capacitor Selection The key selection parameters for the output capacitor are capacitance, ESR, ESL, and the voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DCDC converter. The output ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor’s ESR, and the voltage drop due to the capacitor’s ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL as: Feb. 2014 – R1.0.2 -9 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator TJ6813 VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) Where the output ripple due to output capacitance, ESR, and ESL is: VRIPPLE(C) = IP-P/(8 x COUT x fSW) VRIPPLE(ESR) = IP-P x ESR VRIPPLE(ESL) = (IP-P/tON) x ESL or (IP-P/tOFF) x ESL, Whichever is greater and IP-P the peak-to-peak inductor current is: IP-P = [(VIN – VOUT )/fSW x L)] x VOUT/VIN Use these equations for initial capacitor selection, but determine final values by testing a prototype or evaluation circuit. As a rule, a smaller ripple current results in less output-voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Use ceramic capacitors for their low ESR and ESL at the switching frequency of the converter. The low ESL of ceramic capacitors makes ripple voltages negligible. Load-transient response depends on the selected output capacitor. During a load transient, the output instantly changes by ESR x ΔILOAD. Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Load Transient graph in the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, thus preventing the output from deviating further from its regulating value. PCB Layout Considerations Careful PCB layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PCB layout: 1) Place decoupling capacitors as close as possible to the IC. Keep the power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. 2) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current (CIN to IN and CIN to PGND) short. Avoid vias in the switching paths. 4) If possible, connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close as possible to the IC. 6) Route high-speed switching nodes away from sensitive analog areas (FB). EVB Schematic L Input 2.8V to 5V VIN RIN R1 VCC CIN VOUT LX CVCC TJ6813 EN CFB (option) FB R2 COUT REF CREF GND Feb. 2014 – R1.0.2 PGND - 10 - HTC 1MHz, 3A Synchronous Step-Down Switching Voltage Regulator Top Layout Feb. 2014 – R1.0.2 TJ6813 Bottom Layer - 11 - HTC