2N4856A, 2N4857A, 2N4858A, 2N4859A, 2N4860A, 2N4861A N

Databook.fxp 1/14/99 12:00 PM Page B-16
B-16
01/99
2N4856A, 2N4857A, 2N4858A, 2N4859A, 2N4860A, 2N4861A
N-Channel Silicon Junction Field-Effect Transistor
Absolute maximum ratings at TA = 25¡C
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Reverse Gate Source Voltage
Reverse Gate Drain Voltage
Continuous Device Dissipation
Continuous Forward Gate Current
Power Derating
2N4856A
2N4859A
At 25°C free air temperature:
Static Electrical Characteristics
Min
Max
2N4856A, 2N4857A, 2N4858A
– 40 V
– 40 V
1.8 W
50 mA
10 mA/°C
2N4857A
2N4860A
Min
Max
2N4858A
2N4861A
Min
2N4859A, 2N4860A, 2N4861A
– 30 V
– 30 V
1.8 W
50 mA
10 mA/°C
Process NJ132
Max
Unit
Test Conditions
Gate Source Breakdown Voltage
2N4856A, 2N4857A, 2N4858A
V(BR)GSS
– 40
– 40
– 40
V
IG = – 1 µA, VDS = ØV
Gate Source Breakdown Voltage
2N4859A, 2N4860A, 2N4861A
V(BR)GSS
– 30
– 30
– 30
V
IG = – 1 µA, VDS = ØV
Gate Reverse Current
2N4856A, 2N4857A, 2N4858A
IGSS
– 250
– 250
– 250
pA
VGS = – 20V, VDS = ØV
– 500
– 500
– 500
nA
VGS = – 20V, VDS = ØV
– 250
– 250
– 250
pA
VGS = – 15V, VDS = ØV
– 500
nA
VGS = – 15V, VDS = ØV
–4
V
VDS = 15V, ID = 0.5 nA
Gate Reverse Current
2N4859A, 2N4860A, 2N4861A
IGSS
Gate Source Cutoff Voltage
VGS(OFF)
–4
Drain Saturation Current (Pulsed)
IDSS
50
Drain Cutoff Current
ID(OFF)
Drain Source ON Voltage
VDS(ON)
– 500
– 10
– 500
–2
20
–6
– 0.8
100
8
80
mA
VDS = 15V, VGS = ØV
250
250
250
pA
VDS = 15V, VGS = – 10V
500
500
500
nA
VDS = 15V, VGS = – 10V
0.75
(20)
0.5
(10)
0.5
(5)
V
(mA)
VGS = ØV, ID = ( )
TA = 150°C
TA = 150°C
TA = 150°C
Dynamic Electrical Characteristics
Common Source ON Resistance
rds(on)
25
40
60
Ω
VGS = ØV, ID = Ø A
f = 1 kHz
Common Source Input Capacitance
Ciss
10
10
10
pF
VDS = ØV, VGS = – 10V
f = 1 MHz
Common Source Reverse
Transfer Capacitance
Crss
4
3.5
3.5
pF
VDS = ØV, VGS = – 10V
f = 1 MHz
td(on)
5
(20)
[–10]
6
(10)
[– 6]
8
(5)
[– 4]
ns
(mA)
[V]
tr
3
(20)
[–10]
4
(10)
[– 6]
8
(5)
[– 4]
ns
(mA)
[V]
25
(20)
[–10]
40
(10)
[– 6]
80
(5)
[– 4]
ns
(mA)
[V]
Switching Characteristics
Turn ON Delay Time
Rise Time
Turn OFF Delay Time
td(off)
VDD = 10V, VGS = ØV
ID(ON) = ( )
VGS(OFF) = [ ]
(2N4856A, 2N4859A) RL = 464Ω
(2N4857A, 2N4860A) RL = 953Ω
(2N4858A, 2N486A1) RL = 1910Ω
TOÐ18 Package
Surface Mount
See Section G for Outline Dimensions
SMP4856A, SMP4857A, SMP4858A,
SMP4859A, SMP4860A, SMP4861A
Pin Configuration
1 Source, 2 Drain, 3 Gate & Case
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(972) 487-1287 FAX (972) 276-3375
www.interfet.com