M74HC51 DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 11ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 51 DESCRIPTION The M74HC51 is an high speed CMOS DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE fabricated with silicon gate C2MOS technology. It contains a 2-WIDE 2-INPUT AND/OR INVERT GATE and a 2-WIDE 3-INPUT AND/OR INVERT GATE. DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC51B1R M74HC51M1R T&R M74HC51RM13TR M74HC51TTR The internal circuit is composed of 3 stages (2 INPUT) or 5 stages (3 INPUT) including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/9 M74HC51 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 12, 13, 9, 10, 11 2, 3, 4, 5 8, 6 7 14 SYMBOL NAME AND FUNCTION 1A to 1F Data Inputs 2A to 2D 1Y to 2Y GND VCC Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE 1A H X 1B 1C 1D 1E H H X X X X H H ALL OTHER COMBINATIONS 1F 1Y X H L L H TRUTH TABLE 2A H X 2B 2C 2D H X X X H H ALL OTHER COMBINATIONS 2Y L L H X : Don’t Care ABSOLUTE MAXIMUM RATINGS Symbol V CC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V ± 50 mA 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 2/9 M74HC51 RECOMMENDED OPERATING CONDITIONS Symbol V CC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Value Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns DC SPECIFICATIONS Test Condition Symbol VIH V IL VOH VOL II ICC Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 Value Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 IO=-20 µA 1.9 2.0 1.9 1.9 Unit V 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 1 10 20 µA V V 3/9 M74HC51 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time Value TA = 25°C VCC (V) Min. -40 to 85°C -55 to 125°C Min. Min. Typ. Max. Max. 2.0 4.5 6.0 2.0 30 8 7 39 75 15 13 100 95 19 16 125 110 22 19 150 4.5 6.0 13 11 20 17 25 21 30 26 Unit Max. ns ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 C PD Power Dissipation Capacitance (note 1) 5.0 32 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC TEST CIRCUIT C L = 50pF or equivalent (includes jig and probe capacitance) R T = ZOUT of pulse generator (typically 50Ω) 4/9 M74HC51 WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 5/9 M74HC51 Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L Z 3.3 1.27 0.130 2.54 0.050 0.100 P001A 6/9 M74HC51 SO-14 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8° (max.) PO13G 7/9 M74HC51 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 8/9 M74HC51 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of STMicroelectronics. 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