ESC 2008: Design Techniques for Power

Design Techniques for
Power-Efficient Motor Control
Ravi Pragasam
Senior Manager, Fusion Product Marketing
April 2008
Agenda
Need
for power-efficient motor control
Improving motor efficiencies using
Programmable System Chips
Integrated Pulse Width Modulation
Power
efficiency schemes
Quadrature encoder interface
Load matching and variable speed control
Slip control
Summary
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Motor Control Power Consumption Profile
Electronic
motors have
become increasingly
ubiquitous
With this growth comes
increasing requirements for
improved performance,
efficiency and flexibility
Electric motors use half of all
US electricity consumed
In 2005, US consumed 4,055 billion
KWh of electrical power
More than 50% of this was consumed
by electric motors
Design Techniques for Power-Efficient Motor Control
Feb 29 08
The Need for Power-efficient Motor
Control
High
cost of control and
power electronics has been
a major barrier to
deployment of intelligent
power management
solutions
Implemented broadly,
efficient electronic motor
control could result in
savings of as much as 15%
of the power consumed in
the U.S.
An annual reduction of as much as
300 billion kWh and $15 billion
saved
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Motors, Motors Everywhere
Consumer
Applications
Type of Motor and
Applied Control
Algorithm
Toys
Model
Aircrafts
DVD/CD
Players
BLDC
Trapezoidal
Stepper
Half/Full Step
Micro Step
Conventional
Shunt
Wound
Control Scheme
Open-Loop
Appliance (White
Goods)
Refrigerators
Washers/Dryers
Dish Washers
PMSM
FOC
Trapezoidal
ACIM
V/F
Slip Optimization
Conventional
Shunt
Wound
Open-Loop
Close-Loop
Sensorless
Design Techniques for Power-Efficient Motor Control
Industrial/HVAC
Pumps
Conveyers
Compressors
Inverters
Meters
PMSM
FOC
Trapezoidal
ACIM
FOC
V/F
Slip Optimization
Stepper
Industrial Servo
Material Handler
Robot
Instrumentation
Office
Equipment
PMSM
FOC
Trapezoidal
ACIM
FOC
Slip Optimization
Stepper
Half/Full/Micro Step
Half/Full/Micro Step
Open-Loop
Close-Loop
Sensor
Sensorless
Close-Loop
Sensor
Sensorless
Feb 29 08
Agenda
Need
for power-efficient motor control
Improving motor efficiencies using
Programmable System Chips
Integrated Pulse Width Modulation
Power-efficiency
schemes
Quadrature encoder interface
Load matching and variable speed control
Slip control
Summary
Design Techniques for Power-Efficient Motor Control
4/29/2008Feb 29Feb
08 29 08
6
Traditional Motor Control
Implementation
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Traditional Motor Control Design
Component selection process
Selection depends on application needs and type of motor being
controlled
‹
‹
‹
‹
‹
ADC – how many bits of resolution, accuracy, sampling rate, conversion time…
Interface – number of input channels, signal conditioning, amplifiers, filters…
Sensors – hall effect, back EMF,…
CPU – processor cores (ARM, 8051, State Machines,…)
Network Interfaces – connectivity needs, what is the interface, how fast is the
data rate transfer, any protocols,…
Traditional solutions offer one or more function, but not all
Determine if some of the above functions can be achieved with a
microcontroller
Designer will need to make a decision based on the following
‹
‹
‹
‹
‹
Power needs
Performance needs
Overall system cost
Design environment knowledge
Design cycle
Once selection made, use the design environment to
generate the application
When design complete, debug and validate to ensure that
the specification is met
Design Techniques for Power-Efficient Motor Control
4/29/2008
8
Changing Motor Control Design
Component
selection process
Ideal solution will integrate several functions into one
Several benefits can be obtained with an integrated solution
Lower overall power
‹ Lower system cost
‹ Less design complexity
‹ Better signal integrity
‹ Single platform that can be scaled
‹
Optional functions can be included based on needs
Platform needs to be flexible to accommodate different needs
Use
design environment to generate the
application
When design complete, debug and validate to
ensure that the specification is met
Design Techniques for Power-Efficient Motor Control
4/29/2008
9
Programmable System Chips - PSCs
Incorporate
analog
functions,
embedded
flash memory
and FPGA
fabric in a
single chip
Flexible
platform for
scalability
Offers benefits
of monolithic
design
environment
Design Techniques for Power-Efficient Motor Control
PSC Offers Analog Integration
Up to 12 bit or 600 Ksps
Better than 1% total channel
accuracy with calibration
Internal reference voltage
GPIO
Analog
Inputs
Ana
Mux
MOSFET
Outputs
A/D
FPGA Fabric
(incl. SRAM,
CCC/PLL, IO)
Successive Approximation
Register (SAR) ADC
Built in sample and hold
Increases accuracy of dynamic
signals
Analog I/O
± 12 V Tolerant
Up to 30 channels input
Current monitor block
‹
FLASH
Memory
Xtal OSC,
RC OSC,
RTC, Vreg
2 mV resolution
Temperature monitor block
‹
‹
+ 3o C accuracy
+ 5O C Offset
MOSFET Gate driver output
JTAG Port
‹
‹
Programmable drive
strength
P and N channel devices
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11
PSC Analog Quad – I/O Structures
Essence of Motor Control
Offers the analog interface,
sensing with signal conditioning
functions required
System management and
motor control benefit from
Integrated current, temperature
and voltage monitoring
Supports up to 30 channels
FET gate driver output to drive
H-Bridge
Unique positive and negative
polarity support
Pre-scaler ranges: 1, 2, 4, 8, 12,
16 Volts
Selectable ADC reference
(internal vs external)
8/10/12-bit selectable resolution
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Methodology For Flexible Functionality
Graphical productivity tools
ADC sampling
Digital low-pass filtering
Threshold comparisons
State filtering
Analog input
High current output
Flash memory access
Automatically connects
FPGA, flash and analog
block with required
functions
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13
Using PSCs for Motor Control
PSC can integrate multiple
functions into a single
platform
Take analog inputs from motor
with the analog interface and
ADC
Leverage CPU for processing
and control (Cortex-M1, 8051)
Utilize flash memory to store
the program and embedded
SRAM blocks to store data
Use clock circuitry for
generating signals needed for
control (RC Oscillator)
Interface to external
components with network and
peripheral interface
Utilize soft PWM cores to
generate current or voltage for
gate drivers
Design Techniques for Power-Efficient Motor Control
Programmable System Chip
PSC
Feb 29 08
PSCs versus Discrete Solutions
Features
Programmable System
Chip (PSC)
PWM Frequency
Control
On-board PLL and clock generators
can target a wide range of motors
Software-generated PWM; Use of
internal timers to generate PWM
frequencies; Algorithm/computing
resources stressed
Sensing &
Protection
Internal threshold flags control and
protect; Drive over-current, overtemperature …
External implementation results in
increased BOM cost
Real Time
Monitoring
System
Internal real-time counter (RTC) to
log/record drive parameters and
characteristics
Would require RTC and NVM
On-board NVM to store
configuration data for fast and
efficient drive operation
Reprogrammable in H/W and S/W
Need external NVM and hardware to
store configuration data
Damping
Dedicated on-board PWM IP
coasting/braking possible
Timer based; Software overhead
BEMF – Zero
Crossing
Sensorless operation using internal
ADCs possible with minimal
external components
External comparator circuit required
for sensorless operation
Multiple Drive
support
Rich I/O features and flexibility to
drive multiple motors on single
platform
Would require additional devices
Configuration
Storage
Design Techniques for Power-Efficient Motor Control
Discrete Solutions
(Microcontroller/DSP)
Pulse Width Modulation (PWM) - Basics
PWM
control works by switching the power
supplied to the motor on and off very rapidly
DC voltage is converted to a square-wave signal,
alternating between fully on and zero, giving the
motor a series of power "kicks"
If switching frequency is high enough, the motor
runs at steady speed due to fly-wheel momentum
By adjusting the signal’s duty cycle, the average
power and motor speed can vary
Used to implement closed loop control of motors
Can be implemented by discrete components
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Integrated Pulse Width Modulation in PSC
Programmable System Chip
Standard
PWM solutions
offer very little flexibility
Not a “one size fits all” for
all motor control apps
Number of windings,
voltage/current ratings, torque
profiles and other parameters
widely vary
PSC
implementation
allows the designer to
customize PWM instead of
“making do” with MCU or
DSP capabilities
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Pulse Width Modulation IP with PSC
8
PWM digital
outputs
Edge control
based on
configurable 8bit PWM period
8-bit pre-scaler
value
Duty cycle – 0% to
100%
Can
perform
closed-loop
control
Combined with
processor or simple
state machine
Design Techniques for Power-Efficient Motor Control
Feb 29 08
PWM Implementation Methodology
Allows
designer to
define parameters
based on need
Number of outputs
Negative or positive edge
of each output
Interrupt mask
Enable PWM
Duty cycle
Effectively
provides
power-sensitive
motor control based
on environmental
need
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Agenda
Need
for power-efficient motor control
Improving motor efficiencies using
Programmable System Chips
Integrated Pulse Width Modulation
Power-efficiency
schemes
Quadrature encoder interface
Load matching and variable speed control
Slip control
Summary
Design Techniques for Power-Efficient Motor Control
Feb
4/29/2008
29 08
20
Quadrature Encoder - Background
A
B
Light Source
Code Track on Disk
Channel A
Channel B
Quadrature Encoder Output
Channel A
10
11
01
00
01
11
10
00
Channel B
90o
Counter Clockwise
Clockwise
Quadrature encoder is composed of a light source, wheel and receptor
Technique uses sinusoidal signal generated from light source to
represent position in BLDC motors
Information is communicated to other machine interfaces
Receptor output can be in the form of pulses based on wheel position
Benefits
Simpler to implement
Improved reliability
Immune to noise
4/29/2008
21
Implementing Quadrature Encoder Interface
CCC/PLL
QEA
Filter
ChA
Index
Filter
ChB
Quadrature
Decoder
DIR(U/D)
Reset
Up/Down
Counter
CNT
QEB
Filter
FPGA
Fusion Block FPGA Logic
Most high-precision motors, like the servo-type stepper
motors, support quadrature-encoder interfaces
Control system must provide quadrature-encoder interface
logic to determine accurate speed, position and
acceleration of the motion rotors
With a PSC, accuracy and dynamic speed can be adjusted,
depending on the characteristics of the motor
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Traditional Quadrature Encoder Interface
Implementation
CCC/PLL
QEA
Filter
ChA
Index
Filter
ChB
Quadrature
Decoder
DIR(U/D)
Reset
Up/Down
Counter
CNT
QEB
Filter
FPGA
Fusion Block FPGA Logic
Uses discrete components
DSP chips (filters)
Timers (clocks)
Quadrature encoder block (Schmitt Triggers or pulse generators)
Logic (counters)
Not optimized for efficiency and power
Higher design complexity with little flexibility
Design Techniques for Power-Efficient Motor Control
Feb 29 08
PSC Quadrature Encoder Interface
Implementation
CCC/PLL
Filter
QEA
ChA
Filter
Index
ChB
Quadrature
Decoder
DIR(U/D)
Reset
Up/Down
Counter
CNT
Filter
QEB
FPGA
Fusion Block FPGA Logic
PSC
used to implement all the above functions in
a single integrated solution
Can be optimized for application to deliver a
power-efficient solution
Each function customized to address the application need
Highly
flexible and less design complexity
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Load Matching and Variable Speed Control
For applications that need to be operated at a constant
speed, intelligent load matching is a great way to deliver
an efficient solution
Load sensed and matched with the proper input power, maximizing
efficiency and minimizing power consumption and operating costs
Variable-Frequency Drives (VFD)
For low-cost drives suitable for applications with known loading, VFDs
used to vary the motor's rotational speed to match current load
condition
Vector Control Schemes (Field oriented)
Use real world feedback (speed or torque) to adjust to load variations
Deals with varying operating conditions and allows responsive and
accurate speed control with a changing load
Offers optimum efficiency even during motor transition
Traditional solutions use microcontrollers and DSPs to implement the
closed loop control for speed and torque
Using PSCs allow a single device to be used to control a range of motor
types, including permanent-magnet AC and brushless DC motors
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Slip Control
Actual
Current
Desired
Torque
Commanded
Current
Current
& Slip
Tables
PI
Controller
Slip Frequency (fs)
Current
Magnitude
Calculation
ia Current
ib Sensor
va
Volts
Frequency
ADC
V/F
to
3φ
vb
Voltage
to
Hightime
PWM
Power
Stage
vc
+
+
Motor Frequency (fr)
Speed
Calculator
Speed
Sensor
Bottleneck
Area
A slip is a percentage of synchronous speed
When none of the motors run with a fixed level of loading,
the load can set a “slip” in the motor and determine the
actual speed of the motor shaft
The slip affects the torque and operation of the motor
In the control algorithm, slip frequency is often the key
variable
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Efficiencies from Slip Control
An optimized slip control mechanism is the key factor in
getting the required torque and efficiency
An optimized slip control compensation system can
benefit power saving in typical AC motors, according to
U.S. Environmental Protection Agency
160
Power Reduction due
to Slip Control
Compensation
(Input Power = 8477W)
Reduction in Input Power
140
120
100
80
60
40
20
0
40:16
50:25
60:36
70:49
80:64
90:81
95:90
Speed:Torque
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Slip Control Using Mixed-signal PSCs
Iq
SRAM
NVM
Id
Ia
S/H
Park
Transformation
Clark
Transformation
ADC
Ib
S/H
+
_+
ID
PID
Controller
Vq
PID
Controller
Vd
Slip
Slip Freq Frequency
Calculator (fs)
+
Desired
torque
Power Stage
Modulator
CPU
_
IQ
PWM
Gate
Drive
PMSM
ACIM
Encoder
Frequency
+
Motor Frequency (fr)
Encoder
Interface
Soft IP
Function
Option in
PSC
PSC Hard
Function
SW on CPU
(option in
PSC)
The slip frequency calculator implemented as software running on CPU
The other functions needed can be optional soft IP on PSC
This scheme will provide an efficient slip control method and deliver a
power-optimized motor
Design Techniques for Power-Efficient Motor Control
Feb 29 08
Agenda
Need
for power-efficient motor control
Improving motor efficiencies using
Programmable System Chips
Integrated Pulse Width Modulation
Power-efficiency
schemes
Quadrature encoder interface
Load matching and variable speed control
Slip control
Summary
Design Techniques for Power-Efficient Motor Control
4/29/2008Feb
Feb 29 08
29
Summary
Increasing
demand for energy savings and lower
power puts pressure on designers to use more
efficient motors
Traditional solutions may not offer the best
solution for efficient motors
Highly integrated, flexible PSCs allow designers
to implement the most efficient design for their
application and also use the same device across
motor applications
Implemented broadly, electronic motor control
could result in savings of as much as 15% of the
power used in the U.S.
Design Techniques for Power-Efficient Motor Control
Feb 29 08