IL54123

Technical Data
GROUND FAULT INTERRUPTER EARTH
LEAKAGE CURRENT DETECTOR
IL54123
Description
The IL54123N/D is designed for use in earth leakage circuit
interrupters for operation directly off the AC Line in breakers.
It contains pre regulator, main regulator, after regulator, differential
amplifier, level comparator, latch circuit. The input in the differential
amp latch circuit. The input in the differential amplifier is connecting to
the secondary node of zero current transformers.
The level comparator generates high level when earth leakage current
is greater than some level.
Feature
• Low Power Consumption (PD=5mW) 100V/200V
• 100V/200V Common Built-in Voltage Regulator
• High Gain Differential Amplifier
• High Input Sensitivity (VT = 6.1mV Typ.)
• Minimum External Parts
• Large Surge Margin
• Wide Operating Temperature Range (TА= -40 to 85°C)
• High Noise Immunity
• Meet U. L. 943 standards
ORDERING INFORMATION
IL54123N Plastic
IL54123D SOIC
IL54123S SIP-8
TA = -40 to 85 C for all
packages.
Absolute Maximum Ratings (T^=25°c)





Supply Voltage
Supply Current
Power Dissipation
Operating Temperature
Storage Temperature
20V
8mA
200m W
- 40 to 85°C
- 55 to 125°C
* Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those
indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
January, 2011, rev.01
IL54123
Pin Configuration
(Top View)
VR
VR
1
8
V+
IN
2
7
Os
GND
3
6
NR
OD
4
5
Sc
1
IN 2
GND 3
OD 4
SC 5
NR 6
OS
7
V+ 8
Block Diagram
January, 2011, rev.01
IL54123
Recommended Operating Condition:
TA=-30°C to 80°C
PARAMETER
SYMBOL
MIN.
+
Supply Voltage
Vs-GND Capacitor
V
Cvs
OS-GND Capacitor
Cos
TYP.
MAX
UNIT
12
1
V
F
F
1
Electrical Characteristics
PARAMETER
SYMBOL
CONDTIONS
TEMP.
(°C)
-30
25
85
-30
85
25
MIN.
TYP.
MAX.
4
400
6.1
580
530
480
9
-12
-
-30
mV
(rms)
A
25
17
-
37
A
-30
25
85
25
-200
-100
-75
0.7
-
1.4
V
+
25
-
-
5
A
+
-30
85
-30
85
-30
85
25
200
-
-
A
4.3
-
6.7
V
0.4
-
2
V
20
-
28
V
-30
85
25
-
-
1200
A
0.5
25
1
+
Supply Current 1
lS1
* Trip Voltage
VT
Differential
Amplifier
Output Current 1
Differential
Amplifier Output
current 2
ITD1
V =12V,
VR - VI = 30 mV
+
Output Current
IO
SC ON Voltage
VSC ON
V = 16V,
VR - VI = X
+
V = 16 V,
VR - VI = 30 mV
VOD = 1.2 V
+
V = 16 V,
VR - VI = short
VOD = 0.8 V
lSI = 580A
VSC = 1.4 V
lSI = 530A
VOS = 0.8 V
lSI = 480A
+
V = 16 V
SC Input Current
ISC ON
V = l2V
ITD2
Output "L" Current
IOSL
Input Clamp
Voltage
Differential Input
Clamp Voltage
Max. Current
Voltage
Supply Current 2
VIC
Latch Circuit Off
Supply Voltage
Response Time
VIDC
V = 12 V,
VOSL = 0.2 V
+
V = 12 V,
IIC = 20 mA
IIDC = 100mA
VSM
ISM = 7 mA
IS2
VOS = 0.5 V,
VR - VI = X
V+ OFF
TON
+
V = 16 V,
VR - VI = 0.3 V
UNIT
A
A
V
-
4
ms
January, 2011, rev.01
IL54123
Typical Performance Curves
January, 2011, rev.01
IL54123
January, 2011, rev.01
IL54123
January, 2011, rev.01
IL54123
Typical Application
Supply voltage circuit is connected as a previous diagram. Please decide constants R1, R2, C4,
and C5 of a filter in order to keep at least 12V in Vs, when normal supply current flows.
In this case, please connect C4 (more than 1 ㎌) and C2 (less than 1 ㎌). ZCT and load resistance
RL of ZCT are connected between input pin① and ②. In this case protective resistance (R3=100Ω)
must be insulted. Sensitivity current is regulated by RL, and output of amplifier shows in pin④.
External capacitor C1 between pin④ and GND is used for noise removal.
When large current is grounded in the primary side (AC line) of ZCT, the wave form in the
secondary side of ZCT is distorted and some signals doesn’t appear in the output of amplifier. So
please connect a varistor or a diode (2pcs.) to ZCT in parallel.
Latch circuit is used to inspect the output level of amplifier and to supply gate current on the
external SCR. When input pin becomes more than 1.1V (Typ.) latch circuit operates and supply gate
current in the gate of SCR connected to the output pin⑦.
Pin⑥ can be used in the open state, but please connect capacitor (about 0.047 ㎌) between pin⑥
and ⑦.
Capacitor C6 between pin① and GND is used to remove noise and is about 0.047 ㎌.
January, 2011, rev.01
IL54123
Package Dimensions
N SUFFIX PLASTIC DIP
(MS – 001BA)
A
Dimension, mm
5
8
B
1
4
F
Symbol
MIN
MAX
A
8.51
10.16
B
6.1
7.11
C
L
C
5.33
D
0.36
0.56
F
1.14
1.78
-T- SEATING
PLANE
N
G
M
K
0.25 (0.010) M
J
H
D
T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
G
2.54
H
7.62
J
0°
10°
K
2.92
3.81
L
7.62
8.26
M
0.2
0.36
N
0.38
D SUFFIX SOIC
(MS - 012AA)
Dimension, mm
A
8
5
B
H
1
G
P
4
D
K
MIN
MAX
A
4.8
5
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
R x 45
C
-T-
Symbol
SEATING
PLANE
J
F
0.25 (0.010) M T C M
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B ‑ 0.25 mm (0.010) per side.
M
G
1.27
H
5.72
J
0°
8°
K
0.1
0.25
M
0.19
0.25
P
5.8
6.2
R
0.25
0.5
January, 2011, rev.01
IL54123
8-Pin Plastic Single-in-Line (SIP)
January, 2011, rev.01