Industrial Power Control Final Data Sheet 2ED020I12-F2

EiceDRIVER™
2ED020I12-F2
Dual IGBT Driver IC
Final Data Sheet
Rev. 2.0, 2012-06-05
Industrial Power Control
Edition 2012-06-05
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
EiceDRIVER™
2ED020I12-F2
Revision History
Page or Item
Subjects (major changes since previous revision)
Rev. 2.0, 2012-06-05
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
3
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3
3.1
3.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.4
4.5
4.6
4.6.1
4.6.2
4.6.3
4.7
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
13
14
14
14
15
15
15
15
15
15
15
15
15
5
5.1
5.2
5.3
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
16
18
18
19
19
20
21
21
22
22
23
24
6
Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Final Data Sheet
4
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block Diagram 2ED020I12-F2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PG-DSO-36-58 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application Example Bipolar Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DESAT Switch-Off Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PG-DSO-36-58 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Final Data Sheet
5
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Final Data Sheet
6
10
16
18
18
19
20
21
21
22
22
23
24
Rev. 2.0, 2012-06-05
EiceDRIVER™
Dual IGBT Driver IC
1
2ED020I12-F2
Overview
Main Features
•
•
•
•
•
Dual channel isolated IGBT Driver
For 600V/1200 V IGBTs
2 A rail-to-rail output
Vcesat-detection
Active Miller Clamp
Product Highlights
•
•
•
•
•
Coreless transformer isolated driver
Galvanic Insulation
Integrated protection features
Small footprint
Suitable for operation at high ambient temperature
Typical Application
•
•
•
•
AC and Brushless DC Motor Drives
High Voltage DC/DC-Converter
UPS-Systems
Welding
Description
The 2ED020I12-F2 is a galvanic isolated dual channel IGBT driver in PG-DSO-36-58 package that provides two
fully independent driver outputs with a current capability of typically 2A.
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.
The 2ED020I12-F2 provides several protection features like IGBT desaturation protection, active Miller clamping
and active shut down.
Product Name
Gate Drive Current
Package
2ED020I12-F2
±2 A
PG-DSO-36-58
Final Data Sheet
7
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Overview
VCC2HS
2
DESATHS
VCC1HS
INHS+, INHS-,
/RSTHS
EiceDRIVERTM
2ED020I12-F2
2
OUTHS
/FLTHS,
RDYHS
CLAMPHS
High Side
GND2HS
2
VEE2HS
CPU
VCC1LS
VCC2LS
Low Side
INLS+, INLS-,
/RSTLS
3
DESATLS
3
/FLTLS,
RDYLS
OUTLS
CLAMPLS
GND1
GND2LS
3
VEE2LS
Figure 1
Typical Application
Final Data Sheet
8
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Block Diagram
2
Block Diagram
GND1 1
36 VEE2HS
2V
INHS+ 2
0
&
0
Δt
/RSTHS
INHS- 3
LOGIC
RX
TX
Δt
/FLTHS
RDYHS 4
UVLO
UVLO
RDY_LOOP
High Side
35 CLAMPHS
0
VEE 2HS
VCC2HS
LOGIC
34 OUTHS
33 VCC2HS
VEE2HS
/FLTHS 5
32 GND2HS
/RSTHS 6
LOGIC
TX
RX
LOGIC
DESAT
K3
VCC1HS 7
VCC2HS
31 VEE2HS
I3
30 DESATHS
9V R
GND1 8
29 not existing
GND2HS
NC 9
NC 10
27 not existing
2V
GND1 11
INLS+ 12
0
&
0
Δt
Low Side
25 CLAMPLS
LOGIC
RX
TX
VEE2LS
Δt
/FLTLS
UVLO
UVLO
RDY_LOOP
RDYLS 14
26 not existing
0
/RSTLS
INLS- 13
28 not existing
LOGIC
23 OUTLS
VEE 2LS
/FLTLS 15
/RSTLS 16
LOGIC
TX
RX
VCC1LS 17
LOGIC
24 VEE2LS
VCC2LS
VCC2LS
DESAT
22 VCC2LS
21 GND2LS
I3
K3
R
20 DESATLS
9V
GND1 18
19 VEE2LS
GND2LS
Figure 2
Block Diagram 2ED020I12-F2
Final Data Sheet
9
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Configuration
3
Pin Configuration and Functionality
3.1
Pin Configuration
Remark: xxxHS and xxxLS at the end of pin name only indicate an order for description, both drivers are isolated
and could be used as high side or low side without any preference.
Table 1
Pin Configuration
Pin
No.
Name
Function
1
GND1
Common ground input side
2
INHS+
Non inverted driver input high side
3
INHS-
Inverted driver input high side
4
RDYHS
Ready output high side
5
/FLTHS
Inverted fault output high side
6
/RSTHS
Inverted reset input high side
7
VCC1HS
Positive power supply input high side
8
GND1
Common ground input side
9
NC
Not used, internally connected to Pin 10
10
NC
Not used, internally connected to Pin 9
11
GND1
Common ground input side
12
INLS+
Non inverted driver input low side
13
INLS-
Inverted driver input lowside
14
RDYLS
Ready output low side
15
/FLTLS
Inverted fault output low side
16
/RSTLS
Inverted reset input low side
17
VCC1LS
Positive power supply input low side
18
GND1
Common ground input side
19
VEE2LS
Negative power supply low side driver
20
DESATLS
Desaturation protection low side driver
21
GND2LS
Signal ground low side driver
22
VCC2LS
Power supply low side driver
23
OUTLS
Output low side driver
24
VEE2LS
Negative power supply low side driver
25
CLAMPLS
Miller clamping low side driver
26
Pin not existing, cut out
27
Pin not existing, cut out
28
Pin not existing, cut out
29
Pin not existing, cut out
30
DESATHS
Desaturation protection high side driver
31
VEE2HS
Negative power supply high side driver
Final Data Sheet
10
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Functionality
Table 1
Pin Configuration (cont’d)
Pin
No.
Name
Function
32
GND2HS
Signal ground high side driver
33
VCC2HS
Power supply high side driver
34
OUTHS
Output high side driver
35
CLAMPHS
Miller clamping high side driver
36
VEE2HS
Negative power supply high side driver
Figure 3
PG-DSO-36-58 (top view)
3.2
Pin Functionality
1
GND1
VEE2HS
36
2
INHS+
CLAMPHS
35
3
INHS-
OUTHS
34
4
RDYHS
VCC2HS
33
5
/FLTHS
GND2HS
32
6
/RSTHS
7
VCC1HS
8
GND1
9
NC
10
NC
11
GND1
12
VEE2HS
31
DESATHS
30
INLS+
CLAMPLS
25
13
INLS-
VEE2LS
24
14
RDYLS
OUTLS
23
15
/FLTLS
VCC2LS
22
16
/RSTLS
GND2LS
21
17
VCC1LS
DESATLS
20
18
GND1
VEE2LS
19
Remark: xxxHS and xxxLS at the end of pin name only indicate an order for description, both drivers are isolated
and could be used as high side or low side without any preference.
GND1
Common ground connection of the input side.
INHS+, INLS+ Non Inverting Driver Input
INxx+ control signal for the driver output if INxx- is set to low (The IGBT is on if INxx+ = high and INxx– = low).
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal pull-down-resistor
ensures IGBT off-state.
Final Data Sheet
11
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Functionality
INHS–, INLS– Inverting Driver Input
INxx- control signal for driver output if INxx+ is set to high (IGBT is on if INxx– = low and INxx+ = high).
A minimum pulse width is defined to make the IC robust against glitches at INxx–. An internal pull-up-resistor
ensures IGBT off-state.
/RSTHS, /RSTLS Reset Input
Function 1: Enable/shutdown of the input chip (The IGBT is off if /RSTxx = low). A minimum pulse width is defined
to make the IC robust against glitches at /RSTxx.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTxx is low for a time TRST. An internal pull-upresistor is used to ensure /FLTxx status output.
/FLTHS, /FLTLS Fault Output
Open-drain output to report a desaturation error of the IGBT (/FLTxx is low if desaturation occurs).
RDYHS, RDYLS Ready Status Output
Open-drain output to report the correct operation of the device (RDYxx = high if both chips are above the UVLO
level and the internal chip transmission is faultless).
VCC1HS, VCC1LS Positive Supply
5 V power supply of the input chip
VEE2HS, VEE2LS Negative Supply
Negative power supply pins of the output chip. If no negative supply voltage is available, both pins have to be
connected to GND2xx.
DESATHS, DESATLS Desaturation Detection Input
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE
is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the
IGBT is switched off. The blanking time is adjustable by an external capacitor.
CLAMPHS, CLAMPLS Miller Clamping
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the
gate voltage goes 2 V below VEE2xx.
GND2HS, GND2LS Reference Ground
Reference ground of the output chip.
OUTHS, OUTLS Driver Output
Output pin to drive an IGBT. The voltage is switched between VEE2xx and VCC2xx. In normal operating mode
Vout is controlled by INxx+, INxx- and /RSTxx. During error mode (UVLO, internal error or DESATxx Vout is set
to VEE2xx independent of the input control signals.
VCC2HS, VCC2LS Positive Supply
Positive power supply pin of the output side.
Final Data Sheet
12
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Functional DescriptionIntroduction
4
Functional Description
4.1
Introduction
The 2ED020I12-F2 is an advanced IGBT dual gate driver that can be also used for driving power MOS devices.
Control and protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated driver. The input can be directly connected to a standard 5 V DSP
or microcontroller with CMOS in/output and the output driver are connected to the high side and low side switch.
The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be
avoided. Further, a rail-to-rail output reduces power dissipation.
The device also includes IGBT desaturation protection with FAULT status outputs.
Two READY status outputs reports if the device is supplied and operates correctly.
+5V
VCC1HS
2 * 4k7
100nF
SGND
GND1
INHS
INHS+
INHS-
RDY
FLT
RS
RDYHS
/FLTHS
/RSTHS
VCC1LS
VCC2HS
1k
1µF
DESATHS
10R
OUTHS
CLAMPHS
220pF
GND2HS
1µF
VEE2HS
VCC2LS
100nF
INLS
+15V_2
-8V_2
+15V_1
1k
1µF
INLS+
INLSRDYLS
/FLTLS
/RSTLS
DESATLS
10R
OUTLS
CLAMPLS
220pF
GND2LS
1µF
VEE2LS
-8V_1
2ED020I12-F2
Figure 4
Application Example Bipolar Supply
4.2
Supply
The driver 2ED020I12-F2 is designed to support two different supply configurations, bipolar supply and unipolar
supply.
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of
-8V at VEE2, please refer to Figure 4. Negative supply prevents a dynamic turn on due to the additional charge
which is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply
voltage is used, connecting CLAMPxx to IGBT gate is redundant and therefore typically not necessary.
Final Data Sheet
13
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Functional DescriptionInternal Protection Features
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically
dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly
connected to IGBT gate, please refer to Figure 5.
+5V
VCC1HS
2 * 4k7
100nF
SGND
VCC2HS
GND1
INHS
INHS+
INHS-
RDY
FLT
RS
RDYHS
1k
1µF
DESATHS
10R
OUTHS
CLAMPHS
220pF
GND2HS
/FLTHS
VEE2HS
/RSTHS
VCC1LS
VCC2LS
100nF
INLS
+15V_2
+15V_1
1k
1µF
INLS+
INLSRDYLS
DESATLS
10R
OUTLS
CLAMPLS
/FLTLS
/RSTLS
GND2LS
220pF
VEE2LS
2ED020I12-F2
Figure 5
Application Example Unipolar Supply
4.3
Internal Protection Features
4.3.1
Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with undervoltage lockout for all driver outputs as well
as for input section, please see Figure 9.
If the power supply voltage VVCC1xx of the input section drops below VUVLOL1 a turn-off signal is sent to the output
driver before power-down. The IGBT is switched off and the signals at INxx+ and INxx- are ignored as long as
VVCC1xx reaches the power-up voltage VUVLOH1.
If the power supply voltage VVCC2xx of the output driver goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored as long as VVCC2xx reaches the power-up voltage VUVLOH2. VEE2xx is not
monitored, otherwise negative supply voltage range from 0 V to -12 V would not be possible.
4.3.2
READY Status Output
The READY outputs shows the status of three internal protection features.
•
•
•
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission after a short delay
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
Final Data Sheet
14
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Functional DescriptionNon-Inverting and Inverting Inputs
4.3.3
Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails
for a given time, the IGBT is switched off and the READY output reports an internal error.
4.3.4
Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply, IGBT gate is clamped at OUTxx to VEE2xx.
4.4
Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode INxx+ controls the driver output
while INxx- is set to low. At inverting mode INxx- controls the driver output while INxx+ is set to high, please see
Figure 7. A minimum input pulse width is defined to filter occasional glitches.
4.5
Driver Outputs
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control
of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to
the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
4.6
External Protection Features
4.6.1
Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up
and reaches 9 V, the output is driven low. Further, the FAULT output is activated, please refer to Figure 8. A
programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a
highly precise internal current source and an external capacitor.
4.6.2
Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below
typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.
4.6.3
Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUTxx and CLAMPxx limits this voltage to a value slightly higher than
the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this
paths. If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added.
4.7
RESET
The reset inputs have two functions.
Firstly, /RSTxx is in charge of setting back the FAULT output. If /RSTxx is low longer than a given time, /FLTxx will
be cleared at the rising edge of /RSTxx; otherwise, it will remain unchanged. Moreover, it works as
enable/shutdown of the input logic.
Final Data Sheet
15
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersAbsolute Maximum Ratings
5
Electrical Parameters
5.1
Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of
the integrated circuit. Unless otherwise noted all parameters refer to GND1. The specification for all driver
signals is valid for HS and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals
from driver output side are measured with respect to their specific GND2HS or GND2LS.
Table 2
Absolute Maximum Ratings
Parameter
Symbol
Values
Min.
Max.
Unit
Note /
Test Condition
Positive power supply output side
VVCC2
-0.3
20
V
1)
Negative power supply output side
VVEE2
-12
0.3
V
1)
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2
–
28
V
–
Gate driver output
VOUT
VVEE2-0.3
Vmax2+0.3
V
–
Gate driver high output maximum
current
IOUT
–
2.4
A
t = 2 µs
Gate & Clamp driver low output
maximum current
IOUT
–
2.4
A
t = 2 µs
Maximum short circuit clamping time
tCLP
–
10
μs
ICLAMP/OUT = 500 mA
Positive power supply input side
VVCC1
-0.3
6.5
V
–
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
6.5
V
–
Opendrain Logic output voltage (FLT) VFLT#
-0.3
6.5
V
–
VRDY
-0.3
6.5
V
–
Opendrain Logic output current (FLT) IFLT#
–
10
mA
–
Opendrain Logic output current (RDY) IRDY
–
10
mA
–
V
1)
Opendrain Logic output voltage
(RDY)
Pin DESAT voltage
VDESAT
-0.3
VVCC2 +0.3
Pin CLAMP voltage
VCLAMP
-0.3
VVCC2 +0.32) °C
Input to output isolation voltage
(GND2)
VISO
-1200
1200
V
Output to output isolation voltage
(GND2HS vs GND2LS)
VISO_OUT
-1200
1200
V
1)
Junction temperature
TJ
-40
150
°C
–
Storage temperature
TS
-55
150
°C
–
Power dissipation, per input part
PD, IN
–
100
mW
4)
@TA = 25°C
mW
4)
@TA = 25°C
mW
4)
@TA = 25°C
Power dissipation, per output part
Power dissipation, total
Final Data Sheet
PD, OUT
PD, tot
–
400
–
1000
16
3)
–
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersAbsolute Maximum Ratings
Table 2
Absolute Maximum Ratings (cont’d)
Parameter
Symbol
Values
Min.
Max.
Unit
Note /
Test Condition
4)
Thermal resistance (Input part)
RTHJA,IN
–
375
K/W
@TA = 25°C,
PD, IN_HS+LS =
200 mW,
PD, OUT_HS+LS =
800 mW
Thermal resistance (Output part)
RTHJA,OUT
–
110
K/W
4)
@TA = 25°C,
PD, IN_HS+LS =
200 mW,
PD, OUT_HS+LS =
800 mW
ESD Capability
VESD
–
1
kV
Human Body Model5)
1)
2)
3)
4)
With respect to GND2.
May be exceeded during short circuit clamping.
With respect to VEE2.
IC power dissipation is derated linearly at 11.8 mW/°C above 65°C. Thermal performance may change significantly with
layout and heat dissipation of components in close proximity.
5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
Final Data Sheet
17
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersOperating Parameters
5.2
Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless otherwise
noted all parameters refer to GND1. The specification for all driver signals is valid for HS and LS with out
special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side are measured
with respect to their specific GND2HS or GND2LS.
Table 3
Operating Parameters
Parameter
Symbol
Values
Min.
Max.
Unit
Note /
Test Condition
Positive power supply output side
VVCC2
13
20
V
1)
Negative power supply output side
VVEE2
-12
0
V
1)
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2
–
28
V
–
Positive power supply input side
VVCC1
4.5
5.5
V
–
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
5.5
V
–
Pin CLAMP voltage
VCLAMP
VVEE2-0.3
VVCC22)
V
–
Pin DESAT voltage
VDESAT
-0.3
VVCC2
V
1)
Pin TLSET voltage
VTLSET
-0.3
VVCC2
V
1)
TA
-40
125
°C
–
|DVISO/dt|
–
50
kV/μs
@ 500 V
Ambient temperature
Common mode transient immunity
3)
1) With respect to GND2.
2) May be exceeded during short circuit clamping.
3) The parameter is not subject to production test - verified by design/characterization
5.3
Recommended Operating Parameters
Note: Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS
and LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side
are measured with respect to their specific GND2HS or GND2LS.
Table 4
Recommended Operating Parameters
Parameter
Symbol
Value
Unit
Note / Test Condition
Positive power supply output side
VVCC2
15
V
1)
Negative power supply output side
VVEE2
-8
V
1)
Positive power supply input side
VVCC1
5
V
–
1) With respect to GND2.
Final Data Sheet
18
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
5.4
Electrical Characteristics
Note: The electrical characteristics involve the spread of values for the supply voltages, load and junction
temperatures given below. Typical values represent the median values, which are related to production
processes at T = 25°C. Unless otherwise noted all voltages are given with respect to GND. The specification
for all driver signals is valid for HS and LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+.
The signals from driver output side are measured with respect to their specific GND2HS or GND2LS.
5.4.1
Voltage Supply
Table 5
Voltage Supply
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note /
Test Condition
UVLO Threshold Input
Chip
VUVLOH1
–
4.1
4.3
V
–
VUVLOH1
3.5
3.8
–
V
–
UVLO Hysteresis Input
Chip (VUVLOH1 - VUVLOL1)
VHYS1
0.15
–
–
V
–
UVLO Threshold Output VUVLOH2
Chip
V
–
12.0
12.6
V
–
10.4
11.0
–
V
–
UVLO Hysteresis Output VHYS2
Chip (VUVLOH1 - VUVLOL1)
0.7
0.9
–
V
–
UVLOL2
Quiescent Current Input
Chip
IQ1
–
7
9
mA
VVCC1 = 5 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Quiescent Current
Output Chip
IQ2
–
4
6
mA
VVCC2 = 15 V
VVEE2 = -8 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Final Data Sheet
19
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
5.4.2
Logic Input and Output
Table 6
Logic Input and Output
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
IN+,IN-, RST Low Input Voltage VIN+L,
VIN-L,
–
–
1.5
V
–
IN+,IN-, RST High Input Voltage VIN+H,
VIN-H,
3.5
–
–
V
–
VRSTL#
VRSTH#
IN-, RST Input Current
IIN-, IRST#
-400
-100
–
μA
VIN- = GND1
VRST# = GND1
IN+ Input Current
IIN+,
–
100
400
μA
VIN+ = VCC1
RDY,FLT Pull Up Current
IPRDY, IPFLT# -400
-100
–
μA
VRDY = GND1
VFLT# = GND1
Input Pulse Suppression IN+,
IN-
TMININ+,
TMININ-
30
40
–
ns
–
Input Pulse Suppression RST
for ENABLE/SHUTDOWN
TMINRST
30
40
–
ns
–
Pulse Width RST
for Reseting FLT
TRST
800
–
–
ns
–
FLT Low Voltage
VFLTL
–
–
300
mV
ISINK(FLT#) = 5 mA
RDY Low Voltage
VRDYL
–
–
300
mV
ISINK(RDY) = 5 mA
Final Data Sheet
20
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
5.4.3
Gate Driver
Table 7
Gate Driver
Parameter
Symbol
High Level Output
Voltage
Values
Typ.
Max.
VOUTH1
VCC2 -1.2
VCC2 -0.8
–
V
IOUTH = -20 mA
VOUTH2
VCC2 -2.5
VCC2 -2.0
–
V
IOUTH = -200 mA
VOUTH3
VCC2 -9
VCC2 -5
–
V
IOUTH = -1 A
VCC2 -10
–
V
IOUTH = -2 A
-1.5
-2.0
–
A
IN+ = High,
IN- = Low;
OUT = High
VOUTL1
–
VVEE2 +0.04 VVEE2+0.09
V
IOUTL = 20 mA
VOUTL2
–
VVEE2 +0.3
VVEE2+0.85
V
IOUTL = 200 mA
VOUTL3
–
VVEE2 +2.1
VVEE2+5
V
IOUTL = 1 A
VOUTL4
–
VVEE2 +7
–
V
IOUTL = 2 A
1.5
2.0
–
A
IN+ = Low,
IN- = Low;
OUT = Low,
VVCC2 = 15 V,
VVEE2 = -8 V
High Level Output Peak IOUTH
Current
Low Level Output Peak IOUTL
Current
5.4.4
Active Miller Clamp
Table 8
Active Miller Clamp
Parameter
Note /
Test Condition
Min.
VOUTH4
Low Level Output
Voltage
Unit
Symbol
Values
Unit
Note / Test Condition
Min.
Typ.
Max.
VCLAMPL1
–
VVEE2+0.03
VVEE2 +0.08 V
IOUTL = 20 mA
VCLAMPL2
–
VVEE2+0.3
VVEE2 +0.8
V
IOUTL = 200 mA
VCLAMPL3
–
VVEE2+1.9
VVEE2 +4.8
V
IOUTL = 1 A
Low Level Clamp
Current
ICLAMPL
2
–
–
A
1)
Clamp Threshold
Voltage
VCLAMP
1.6
2.1
2.4
V
Related to VEE2
Low Level Clamp
Voltage
1) The parameter is not subject to production test - verified by design/characterization
Final Data Sheet
21
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
5.4.5
Short Circuit Clamping
Table 9
Short Circuit Clamping
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
–
0.8
1.3
V
IN+ = High,
IN- = Low,
OUT = High
IOUT = 500 mA
pulse test,
tCLPmax = 10 μs)
Clamping voltage
VCLPclamp
(CLAMP) (VVCLAMP-VVCC2)
–
1.3
–
V
IN+ = High,
IN- = Low,
OUT = High
ICLAMP = 500 mA
(pulse test,
tCLPmax = 10 μs)
VCLPclamp
–
0.7
1.1
V
IN+ = High,
IN- = Low,
OUT = High
ICLAMP = 20 mA
Clamping voltage (OUT)
(VOUT - VVCC2)
Clamping voltage
(CLAMP)
5.4.6
VCLPout
Dynamic Characteristics
Dynamic characteristics are measured with VVCC1 = 5 V, VVCC2 = 15 V and VVEE2 = -8 V.
Table 10
Dynamic Characteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note /
Test Condition
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @ 25°C
IN+, IN- input to output
propa-gation delay ON
TPDON
145
170
195
ns
IN+, IN- input to output
propa-gation delay OFF
TPDOFF
145
165
190
ns
IN+, IN- input to output
TPDISTO
propa-gation delay
distortion (TPDOFF - TPDON)
-35
-5
25
ns
IN+, IN- input to output
propagation delay ON
variation due to temp
TPDONt
–
–
25
ns
1)
IN+, IN- input to output
propagation delay OFF
variation due to temp
TPDOFFt
–
–
40
ns
1)
IN+, IN- input to output
TPDISTOt
propagation delay
distortion variation due to
temp (TPDOFF-TPDON)
–
–
20
ns
1)
Final Data Sheet
22
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Table 10
Dynamic Characteristics (cont’d)
Parameter
Symbol
TRISE
Rise Time
TFALL
Fall Time
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
10
30
60
ns
CLOAD = 1 nF
VL 10%, VH 90%
200
400
800
ns
CLOAD = 34 nF
VL 10%, VH 90%
10
50
90
ns
CLOAD = 1 nF
VL 10%, VH 90%
200
350
600
ns
CLOAD = 34 nF
VL 10%, VH 90%
Unit
Note /
Test Condition
1) The parameter is not subject to production test - verified by design/characterization
5.4.7
Desaturation Protection
Table 11
Desaturation Protection
Parameter
Symbol
Values
Min.
Typ.
Max.
Blanking Capacitor
Charge Current
IDESATC
450
500
550
μA
VVCC2 =15 V,
VVEE2=- 8 V
VDESAT = 2 V
Blanking Capacitor
Discharge Current
IDESATD
9
14
–
mA
VVCC2 =15 V,
VVEE2 = -8 V
VDESAT = 6 V
Desaturation Reference VDESAT
Level
8.3
9
9.5
V
VVCC2 = 15 V
Desaturation Filter Time TDESATfilter
–
250
–
ns
VVCC2 = 15 V,
VVEE2 = -8 V
VDESAT = 9 V
Desaturation Sense to
OUT Low Delay
TDESATOUT
–
350
430
ns
VOUT = 90%
CLOAD = 1 nF
Desaturation Sense to
FLT Low Delay
TDESATFLT
–
–
2.25
μs
VFLT# = 10%;
IFLT # = 5 mA
Desaturation Low
Voltage
VDESATL
0.4
0.6
0.95
V
IN+ = Low, IN- = Low,
OUT = Low
Leading edge blanking
TDESATleb
–
400
–
ns
Not subject of
production test
Final Data Sheet
23
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
5.4.8
Active Shut Down
Table 12
Active Shut Down
Parameter
Symbol
Active Shut Down Voltage V
1)
ACTSD
Values
Min.
Typ.
Max.
–
–
2.0
Unit
Note /
Test Condition
V
IOUT = -200 mA,
VCC2 open
1) With reference to VEE2
Final Data Sheet
24
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Timing DiagrammsElectrical Characteristics
6
Timing Diagramms
50%
IN+
90%
50%
10%
OUT
TPDON
Figure 6
TRISE
TPDOFF
TFALL
Propagation Delay, Rise and Fall Time
IN+
IN/RST
OUT
Figure 7
Typical Switching Behavior
Final Data Sheet
25
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Timing DiagrammsElectrical Characteristics
IN+
TPDON
TPDON
OUT
TPDOFF
TDESATfilter
TDESATOUT
VDESAT typ. 9V
TDESATleb
TDESATleb
DESAT
blanking time
/FLT
TDESATFLT
/RST
>TRSTmin
Figure 8
DESAT Switch-Off Behavior
ESD diode conduction
IN+
VUVLOH1
VUVLOL1
VCC1
VUVLOH2
VUVLOL2
VCC2
OUT
RDY
/FLT
/RST
Figure 9
UVLO Behavior
Final Data Sheet
26
Rev. 2.0, 2012-06-05
EiceDRIVER™
2ED020I12-F2
Package OutlinesElectrical Characteristics
7
Package Outlines
FOOTPRINT
DIM
A
A1
A2
b
c
D
E
E1
e
N
L
h
T
T1
ccc
ddd
F1
F2
F3
Figure 10
MILLIMETERS
MAX
MIN
2.65
0.10
0.20
2.45
2.25
0.25
0.41
0.23
0.32
12.60
12.80
10.00
10.60
7.40
7.60
0.65 BSC
32
0.50
0.90
0.25
0.45
0°
8°
0°
8°
0.10
0.17
9.73
0.45
1.67
INCHES
MAX
0.104
0.008
0.096
MIN
0.004
0.089
0.010
0.009
0.496
0.394
0.291
0.016
0.013
0.504
DOCUMENT NO.
Z8B00159298
SCALE
0
1.0
0
1.0
0.417
0.299
0.026 BSC
32
0.020
0.010
0°
0°
2mm
EUROPEAN PROJECTION
0.035
0.018
8°
8°
0.004
0.007
0.383
0.018
0.066
ISSUE DATE
25.03.2011
REVISION
02
PG-DSO-36-58 (Plastic (Green) Dual Small Outline Package)
Final Data Sheet
27
Rev. 2.0, 2012-06-05
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG