2SJ518 Silicon P Channel MOS FET REJ03G0875-0400 (Previous: ADE-208-580B) Rev.4.00 Sep 07, 2005 Description High speed power switching Features • Low on-resistance RDS (on) = 0.35 Ω typ. (at VGS = –10 V, ID = –1 A) • Low drive current • 4 V gate drive devices • High speed switching Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) D 3 2 1 1. Gate 2. Drain 3. Source 4. Drain G 4 S Note: Marking is “AZ”. *UPAK is a trademark of Renesas Technology Corp. Rev.4.00 Sep 07, 2005 page 1 of 6 2SJ518 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Symbol VDSS Value –60 Unit V VGSS ID ±20 –2 V A –4 –2 A A –2 0.34 A mJ 1 150 W °C ID (pulse) IDR Note 1 Note 2 Avalanche current Avalanche energy IAP EAR Channel dissipation Channel temperature Pch Tch Note 3 °C Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tch = 25°C, Rg ≥ 50 Ω 3. Value at when using the aluminum ceramic board (12.5 × 20 × 0.7 mm) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit V (BR) DSS V (BR) GSS –60 ±20 — — — — V V ID = –10 mA, VGS = 0 IG = ±100 µA, VDS = 0 IDSS IGSS — — — — –10 ±10 µA µA VDS = –60 V, VGS = 0 VGS = ±16 V, VDS = 0 Gate to source cutoff voltage Static drain to source on state resistance VGS (off) RDS (on) –1.0 — — 0.35 –2.0 0.46 V Ω ID = –1 mA, VDS = –10 V Note 4 ID = –1 A, VGS = –10 V Forward transfer admittance RDS (on) |yfs| — 1.2 0.45 2.0 0.63 — Ω S ID = –1 A, VGS = –4 V Note 4 ID = –1 A, VDS = –10 V Input capacitance Output capacitance Ciss Coss — — 220 110 — — pF pF Reverse transfer capacitance Turn-on delay time Crss td (on) — — 35 10 — — pF ns VDS = –10 V VGS = 0 f = 1 MHz Rise time Turn-off delay time tr td (off) — — 11 45 — — ns ns Fall time Body to drain diode forward voltage tf VDF — — 30 –1.05 — — ns V trr — 50 — ns Drain to source breakdown voltage Gate to source breakdown voltage Zero gate voltage drain current Gate to source leak current Body to drain diode reverse recovery time Note: 4. Pulse test Rev.4.00 Sep 07, 2005 page 2 of 6 Test Conditions Note 4 VGS = –10 V ID = –1 A RL = 30 Ω IF = –2 A, VGS = 0 IF = –2 A, VGS = 0 diF/dt = 50 A/µs 2SJ518 Main Characteristics Power vs. Temperature Derating –100 Test Condition: When using the aluminum ceramic board (12.5 × 20 × 70 mm) ID (A) –30 1.5 Drain Current Channel Dissipation Pch (W) 2.0 Maximum Safe Operation Area 1.0 0.5 –10 100 µs –3 1m s = (1 10 m DC sh s Op ot) er at ion PW –1 –0.3 Operation in this area is limited by RDS (on) –0.1 –0.03 Ta = 25°C –0.01 –1 –0.1 –0.3 0 0 50 100 150 Ambient Temperature 200 –30 –100 Typical Transfer Characteristics –5 –5 Pulse Test VDS = –10 V Pulse Test –5 V –4 –4 V –2 –3 V –1 –4 –3 Drain Current –3.5 V –3 ID (A) –10 V –6 V ID (A) –10 Drain to Source Voltage VDS (V) Ta (°C) Typical Output Characteristics Drain Current –3 –2 –1 25°C Tc = 75°C VGS = –2.5 V –25°C 0 0 –2 –4 –6 –8 Drain to Source Voltage 0 0 –10 VDS (V) –4 –3 –2 –0.5 A –1 ID = –2 A –1 A 0 0 –4 –8 –12 Gate to Source Voltage Rev.4.00 Sep 07, 2005 page 3 of 6 –16 –20 VGS (V) –3 –4 –5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) Pulse Test –2 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage –5 –1 10 Pulse Test 5 2 1 VGS = –4 V 0.5 –10 V 0.2 0.1 –0.1 –0.2 –0.5 –1 Drain Current –2 –5 ID (A) –10 2SJ518 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) Static Drain to Source on State Resistance vs. Temperature 1.0 Pulse Test –0.5 A, –1 A 0.8 ID = –2 A 0.6 VGS = –4 V 0.4 –2 A –0.5 A, –1 A 0.2 –10 V 0 –40 0 40 80 Case Temperature 120 160 10 5 Tc = –25°C 2 25°C 1 75°C 0.5 0.2 VDS = –10 V Pulse Test 0.1 –0.1 Tc (°C) –2 –5 –10 1000 Capacitance C (pF) Reverse Recovery Time trr (ns) –1 Typical Capacitance vs. Drain to Source Voltage 100 50 20 –0.5 –1 –2 Reverse Drain Current –5 300 100 Crss 10 1 –10 –60 VGS –12 –16 –80 ID = –2 A –100 0 4 8 Gate Charge Rev.4.00 Sep 07, 2005 page 4 of 6 12 16 Qg (nc) –10 –20 –30 –40 –50 –20 20 100 Switching Time t (ns) VDD = –10 V –25 V –50 V VDS –8 VGS (V) –4 Gate to Source Voltage –40 0 Switching Characteristics 0 –20 VGS = 0 f = 1 MHz Drain to Source Voltage VDS (V) Dynamic Input Characteristics VDD = –10 V –25 V –50 V Coss 30 IDR (A) 0 Ciss 3 di / dt = 50 A / µs VGS = 0, Ta = 25°C 10 –0.1 –0.2 VDS (V) –0.5 Drain Current ID (A) Body-Drain Diode Reverse Recovery Time Drain to Source Voltage –0.2 td(off) 50 tf 20 10 td(on) tr 5 2 VGS = –10 V, VDD = –30 V Ta = 25°C, duty ≤ 1 % 1 –0.1 –0.2 –0.5 –1 Drain Current –2 ID (A) –5 –10 2SJ518 Reverse Drain Current vs. Source to Drain Voltage Repetitive Avalanche Energy EAR (mJ) Maximum Avalanche Energy vs. Channel Temperature Derating Reverse Drain Current IDR (A) –5 –4 –3 –5 V –10 V –2 VGS = 0, 5 V –1 Pulse Test 0 0 –0.4 –0.8 –1.2 –1.6 Source to Drain Voltage –2.0 0.5 IAP = –2 A VDD = –25 V duty < 0.1 % Rg ≥ 50 Ω 0.4 0.3 0.2 0.1 0 25 50 100 125 150 Channel Temperature Tch (°C) VSD (V) Avalanche Test Circuit Avalanche Waveform L VDS Monitor 75 EAR = 1 • L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDD D.U.T VDS ID Vin –15 V 50 Ω 0 VDD Switching Time Test Circuit Waveform Vin Vout Monitor Vin Monitor 10% D.U.T. 90% RL 90% 90% Vin –10 V 50 Ω VDD = –30 V Vout td(on) Rev.4.00 Sep 07, 2005 page 5 of 6 10% tr 10% td(off) tf 2SJ518 Package Dimensions RENESAS Code Package Name MASS[Typ.] PLZZ0004CA-A UPAK / UPAKV 0.050g 1.5 1.5 3.0 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max (1.5) 0.44 Max (0.2) 0.53 Max 0.48 Max 0.8 Min φ1 0.4 4.5 ± 0.1 1.8 Max Unit: mm (2.5) SC-62 (0.4) JEITA Package Code Ordering Information Part Name 2SJ518AZTL-E 2SJ518AZTR-E Quantity 1000 pcs 1000 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 Sep 07, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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