J/SST111 SERIES SINGLE N-CHANNEL JFET SWITCH FEATURES DIRECT REPLACEMENT FOR SILICONIX J/SST111 SERIES LOW GATE LEAKAGE CURRENT 5pA FAST SWITCHING 4ns ABSOLUTE MAXIMUM RATINGS1 SST SERIES SOT-23 TOP VIEW SOT-23 J SERIES TO-92 TOP VIEW @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -55 to 150°C Junction Operating Temperature -55 to 150°C TOP VIEW D 1 Maximum Power Dissipation 3 Continuous Power Dissipation (J)3 360mW Continuous Power Dissipation (SST)3 350mW S G 2 Maximum Currents Gate Current 50mA Maximum Voltages Gate to Drain -35V Gate to Source -35V STATIC ELECTRICAL CHARACTERISTICS @25 °C (unless otherwise stated) SYM. CHARACTERISTIC TYP BVGSS Gate to Source Breakdown Voltage VGS(off) Gate to Source Cutoff Voltage VGS(F) Gate to Source Forward Voltage -3 Drain to Source Saturation IGSS Gate Leakage Current -0.005 IG Gate Operating Current -5 Drain Cutoff Current Drain to Source On Resistance Linear Integrated Systems J/SST113 MIN MAX -35 -10 -1 MAX UNIT -35 -5 CONDITIONS IG = -1µA, VDS = 0V -3 V 0.7 IDSS ID(off) J/SST112 MIN MAX -35 Current2 rDS(on) J/SST111 MIN VDS = 5V, ID = 1µA IG = 1mA, VDS = 0V 20 5 -1 0.005 • 2 -1 -1 mA VDS = 15V, VGS = 0V nA VGS = -15V, VDS = 0V pA VDG = 15V, ID = 1.0mA 1 1 1 nA VDS = 5V, VGS = -10V 30 50 100 Ω VGS = 0V, VDS = 0.1V 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 20119 05/14/2014 Rev# A6 ECN# J SST 111 DYNAMIC ELECTRICAL CHARACTERISTICS @25 °C (unless otherwise stated) SYM. CHARACTERISTIC TYP J/SST111 J/SST112 J/SST113 MIN MIN MIN MAX MAX MAX UNIT gfs Forward Transconductance 6 mS gos Output Conductance 25 µS rds(on) Drain to Source On Resistance 30 50 100 Ciss Input Capacitance 7 12 12 12 Crss Reverse Transfer Capacitance 3 5 5 5 Equivalent Noise Voltage 3 en SWITCHING CHARACTERISTICS SYM. td(on) tr td(off) tf CHARACTERISTIC Turn On Time Turn Off Time TYP 6 VDS = 20V, ID = 1mA f = 1kHz Ω VGS = 0V, ID = 1mA f = 1kHz pF VDS = 0V, VGS = -10V f = 1MHz nV/√Hz VDG = 10V, ID = 1mA f = 1 kHz SWITCHING CIRCUIT CHARACTERISTICS UNIT CONDITIONS 2 2 CONDITIONS ns SYM. J/SST111 J/SST112 J/SST113 VGS(L) -12V -7V -5V 1600Ω 3200Ω 6mA 3mA 800Ω RL VDD = 10V VGS(H) = 0V ID(on) 12mA 15 SOT-23 SOT-23 TO-92 SWITCHING TEST CIRCUIT 0.89 1.03 VDD 0.37 0.51 1 1.78 2.05 2.80 3.04 3 RL VGS(H) 2 OUT VGS(L) 1.20 1.40 2.10 2.64 0.89 1.12 1k 51 0.085 0.180 0.013 0.100 0.55 51 DIMENSIONS IN MILLIMETERS NOTES 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Pulse test: PW ≤ 300µs, Duty Cycle ≤ 3% 3. Derate 2.8mW/°C above 25°C Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 20119 05/14/2014 Rev# A6 ECN# J SST 111