R2S15902FP
6ch Electronic Volume with 4 Input Selector
REJ03F0152-0100
Rev.1.0
Nov.22.2005
Description
R2S15902FP is an audio signal processor for home audio. This IC contains 6 channels electronic volume, gain control,
input selector and 2 band tone control.
Features
•
•
•
•
•
•
•
•
•
6 channels independent electronic volume (0 to –99dB/1dBstep, –∞dB)
6 channels independent gain control (0 to +14dB/ 2dB step)
L/R channel 4 input selector (Input gain: 0 to +14dB/ 2dB step)
Multi channel input: 6 channels input
Tone control Bass: –14 to + 14dB(2dB step),
Treble: –14 to + 14dB(2dB step)
Can use 1 input for REC output (REC output gain: 0, +2, +4, +6dB)
Built-in ADC output (Input Att: 0/ –6/ –12/ –18dB)
Built-in L+R/ L–R block
Built-in digital power supply
Recommended Operating Condition
Supply voltage range
VCC = 8.0V to 10.0V: 9.0V(typ)
Application
Receiver, AV amp, Home theater, Mini stereo etc.
System Block Diagram
REC OUT
(4)
Multi Multi
Rin Lin
Lch Tone Rch Tone
DGND
CLOCK DATA
1
Lch
2
3
Input Selector
MCU I/F
Tone
Input Gain
Volume
LoSL
Rch
2
3
Input Selector
1
Lch
(L-R)
+
-
REC
Gain
ADCL
(L-R)
LoSR
Input
ATT
Bass&
Treble
Gain Control
Bass&
Treble
Gain Control
+
-
Rch
(L+R)
ADCR
(L+R)
SLin
Volume
Rev.1.0 Nov 22, 2005 page 1 of 15
Rout
Gain Control
SLout
MSLin
SRin
MSRin
Volume
Cin
MCin
Volume
SWin
Volume
Gain Control
SRout
Gain Control
Gain Control
MSWin
(4)
REC OUT
Lout
Input Gain
REC
Gain
Input
ATT
Volume
AGND
Vref
VCC
Cout
SWout
R2S15902FP
ROUT
COUT
SWOUT
SLOUT
SROUT
CLOCK
20
19
18
17
16
15
14
Cch
Vol
24
50 k
SWch
Vol
50 k
SLch
Vol
50k
Gain
Control
C
13
12
D
MCU
I/F
11 SRIN
50k
SRch
Vol
50k
Logic
50 k
50k
Bass
/Tre
26
28
25 k
+
-
25 k
VOLINR
GAINOUTR
INL1
Input
Gain
30
50k
+
-
REC
Output
Gain
Lch
+
-
31
6 LIN
32
+
-
Input
ATT
50k
+
-
Input
ATT
25k
Lch (L- R)
50 k
25k
+
-
50k
25k
25k
25 k
34
35
36
37
38
39
40
41
42
43
44
INR2
INL3
INR3
INL4
(RECL1)
INR4
(RECR1)
AGND
VREF
VCC
ADCR
(L+R)
L+RCIN
L+RSWIN
Rch (L+R)
(Top View)
Rev.1.0 Nov 22, 2005 page 2 of 15
3
LINSL
2 LOUTSL
33
25k
5 RINSR
4 ROUTSR
REC
Output
Gain Rch
+
-
25k
INL2
7 RIN
29
25k
INR1
8 CIN
25k
Input
Gain
GAINOUTL
50 k
Lch Vol
27
9 SWIN
Rch Vol
25k
VOLINL
10 SLIN
Bass
/Tre
TRER 25
TREL
Gain
Control
+
-
+
-
+
-
BASL1
Gain
Control
+
-
23
Gain
Control
Gain
Control
+
-
Gain
Control
DGND
LOUT
21
DATA
BASR2
22
+
-
BASL2
BASR1
Block Diagram and Pin Configuration
1
ADCL
(L-R)
R2S15902FP
Pin Description
Pin No.
Name
Function
1
2
ADCL (L-R)
LOUTSL
Output pin for ADC (and L-R output)
L channel pre-output (REC output) for SL channel
3
4
LINSL
ROUTSR
SL channel input from L channel pre-output (REC output)
R channel pre-output (REC output) for SR channel
5
6, 7, 8,
9, 10, 11
RINSR
LIN, RIN, CIN,
SWIN, SLIN, SRIN
SR channel input from R channel pre-output (REC output)
12
13
DGND
DATA
Digital ground
Input pin of control data
14
15, 16,
17, 18,
19, 20
CLOCK
SROUT, SLOUT,
SWOUT, COUT,
ROUT, LOUT
Input pin of control clock
21, 22
23, 24
25, 26
BASR1, BASR2,
BASL1, BASL2
TRER, TREL
27, 29
VOLINL, VOLINR
GAINOUTL,
GAINOUTR
28, 30
31,33,35,
32,34,36
37, 38
INL1, 2, 3,
INR1, 2, 3
INL4/RECL1,
INR4/RECR1
Input pin of L/R/C/SW/SL/SR channel (Multi)
Output pin of SR/SL/SW/C/R/L channel
Frequency characteristic setting pin of R/L channel tone control (BASS)
Frequency characteristic setting pin of R/L channel tone control (Treble)
Input pin of L/R channel volume
Output pin of L/R channel Input gain
Input pin of L/R channel (Input selector)
Input pin of L/R channel (Input selector) can use REC output pin
39
40
AGND
VREF
Analog ground
1/2 VCC input
41
42
VCC
ADCR(L+R)
Power supply to internal analog circuit
Output pin for ADC(and L+R output)
43
44
L+RCIN
L+RSWIN
L+R input for C channel
L+R input for SW channel
Rev.1.0 Nov 22, 2005 page 3 of 15
R2S15902FP
Absolute Maximum Ratings
Parameter
Symbol
Power supply
Supply voltage
Ratings
Unit
10.5
V
Condition
VCC
Power dissipation
Pd
1.25
W
Ta≤25°C
Thermal derating
K
12.5
mW/°C
Ta>25°C
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–40 to +125
°C
THERMAL DERATINGS
(MAXIMUM RATING)
POWER DISSIPATION pd (W)
2.0
1.5
1.25
1.0
0.63
0.5
0
0
25
50
75
100
125
AMBIENT TEMPERATURE Ta (°C)
Recommended Operating Conditions
(Ta=25°C, unless otherwise noted.)
Parameter
Supply voltage
Symbol
VCC
Min
8.0
Typ
9.0
Max
10.0
Unit
V
Logic “H” level input voltage
Logic “L” level input voltage
VIH
VIL
2.7
0
⎯
⎯
5.5
0.7
V
V
Rev.1.0 Nov 22, 2005 page 4 of 15
Condition
VCC = 9V
VCC = 9V
R2S15902FP
Relationship Between Data and Clock
Make "H" at the timing which
DATA of D0-D23 make latch.
Data signal is read at the rising edge of CLOCK.
DATA
D0
D2
D1
D3
D21
D22
D23
CLOCK
When DATA is "H", latch signal is
created at the falling edge of CLOCK.
When CLOCK is "L" and latch signal is created,
latch signal is read at the falling edge of DATA.
Clock and Data Timings
DATA
LATCH
t cr
(D0 to D23)
75%
25%
tSLD
tSLD
tHLD tSHD
tSC
75%
50%
25%
CLOCK
tHLD
tHHD
tf
tr
tWHC
tWLC
Timing Definition of Digital Block
Parameter
Symbol
Min
Limits
Typ
Max
CLOCK cycle time
CLOCK pulse width ("H" level)
tcr
tWHC
8
3.2
⎯
⎯
⎯
⎯
CLOCK pulse width ("L" level)
Rising time of clock and data
tWLC
tr
3.2
⎯
⎯
⎯
⎯
0.8
Falling time of clock and data
DATA setup time (Rising time of clock)
tf
tSHD
⎯
1.6
⎯
⎯
0.8
⎯
DATA setup time (Falling time of clock)
DATA hold time ("H" level)
tSLD
tHHD
1.6
1.6
⎯
⎯
⎯
⎯
DATA hold time ("L" level)
CLOCK setup time
tHLD
tSC
1.6
1.6
⎯
⎯
⎯
⎯
Rev.1.0 Nov 22, 2005 page 5 of 15
Unit
µs
R2S15902FP
Power on Reset
This IC built-in the power on reset function.
The voltage of VCC-GND less than 4V, the serial DATA can not accept.
VCC - GND
(V)
4V
(S)
Reset time
After reset is canceled, the serial DATA can accept.
Release of reset.
Data Control Specification
Initialize all data of the 4 formats when digital power supply (VCC) turns on.
Prohibit using except specified data code as follows.
Slot1
D0a D1a D2a D3a D4a D5a D6a D7a
(2)
(3)
(4)
(1)Input Selector REC REC- Output ADC
Gain
Input
Out
Control
ATT
D8a D9a D10a D11a D12a D13a D14a D15a D16a D17a D18a D19a D20a D21a D22 D23
(8)
(5)
SL/SR
(6) Bass/
L/R
(7) Treble
0
0
0
(9) Input Gain
/C/SW
Input Tone Control Bypass
Input
Slot2
D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14b D15b D16b D17b D18b D19b D20b D21b D22 D23
(10)
Lch Gain
Control
(11)Lch Volume
(10)
RchGain
Control
(11) Rch Volume
0
0
0
1
Slot3
D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14c D15c D16c D17c D18c D19c D20c D21c D22 D23
(10)
CchGain
Control
(11)Cch Volume
(10)
SWch Gain
Control
(11)SWch Volume
0
0
1
0
Slot4
D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d D10d D11d D12d D13d D14d D15d D16d D17d D18d D19d D20d D21d D22 D23
(10)
SLchGain
Control
Note:
(11)SLch Volume
No guarantee except for these codes.
Rev.1.0 Nov 22, 2005 page 6 of 15
(10)
SRch Gain
Control
(11) SRch Volume
0
0
1
1
R2S15902FP
Setting Code
It’s initial setting when power is turned on.
(1) Input Selector
Setting
ALL OFF
D0a
0
D1a
0
D2a
0
IN1
IN2
0
1
1
0
0
0
IN3
IN4*1
1
0
1
0
0
1
Note: No guarantee except for these codes.
(2) REC Output
REC output
REC1
Setting
OFF
D3a
0
ON
1*1
*1: When IN4 selected, REC1 can not use.
IN4
ON
REC1
OFF
D0a
0
D1a
0
D2a
1
(3) REC-Output Gain Control
Gain setting
0dB
D4a
0
D5a
0
+2dB
+4dB
0
1
1
0
+6dB
1
1
(4) ADC Input ATT
*2
ATT setting
0dB
D6a
0
D7a
0
–6dB
–12dB
0
1
1
0
–18dB
1
1
*2: When L ± R selected, ADC input ATT can not use.
(5) L/R Input
Setting
Selector in
D8a
0
Multi in
1
Rev.1.0 Nov 22, 2005 page 7 of 15
D3a
1
R2S15902FP
It’s initial setting when power is turned on.
(6) Bass/Bypass (Tone control is bypass)
(7) Treble
Gain setting
+14dB
D9a
1
D10a
1
D11a
1
D12a
1
Gain setting
+14dB
D13a
1
D14a
1
D15a
1
D16a
1
+12dB
+10dB
1
1
1
1
1
0
0
1
+12dB
+10dB
1
1
1
1
1
0
0
1
+8dB
+6dB
1
1
1
0
0
1
0
1
+8dB
+6dB
1
1
1
0
0
1
0
1
+4dB
+2dB
1
1
0
0
1
0
0
1
+4dB
+2dB
1
1
0
0
1
0
0
1
0dB
−2dB
1
0
0
0
0
0
0
1
0dB
−2dB
1/0
0
0
0
0
0
0
1
−4dB
−6dB
0
0
0
0
1
1
0
1
−4dB
−6dB
0
0
0
0
1
1
0
1
−8dB
−10dB
0
0
1
1
0
0
0
1
−8dB
−10dB
0
0
1
1
0
0
0
1
−12dB
−14dB
0
0
1
1
1
1
0
1
−12dB
−14dB
0
0
1
1
1
1
0
1
Bypass*3
0
0
*3: Tone control is bypass.
0
0
(8) SL/ SR/ C/ SW Input
Setting
L ± R in
*2
D17a
0*2
Multi in
1
*2: When L ± R selected, ADC input ATT can not use.
(9) Input Gain
(10) Gain Control
Gain setting
0dB
D18a
0
D19a
0
D20a
0
+2dB
+4dB
0
0
0
1
1
0
+6dB
+8dB
0
1
1
0
1
0
+10dB
+12dB
1
1
0
1
1
0
+14dB
1
1
1
Rev.1.0 Nov 22, 2005 page 8 of 15
Lch
Rch
D0b
D10b
D1b
D11b
D2b
D12b
Cch
SWch
D0c
D10c
D1c
D11c
D2c
D12c
SLch
SRch
D0d
D10d
D1d
D11d
D2d
D12d
0dB
+2dB
0
0
0
0
0
1
+4dB
+6dB
0
0
1
1
0
1
+8dB
+10dB
1
1
0
0
0
1
+12dB
+14dB
1
1
1
1
0
1
Gain
setting
R2S15902FP
(11) 6channels Volume
It’s initial setting when power is turned on.
Lch
D3b
D4b
D5b
D6b
D7b
D8b
D9b
Rch
Cch
D13b
D3c
D14b
D4c
D15b
D5c
D16b
D6c
D17b
D7c
D18b
D8c
D19b
D9c
SWch
SLch
D13c
D3d
D14c
D4d
D15c
D5d
D16c
D6d
D17c
D7d
D18c
D8d
D19c
D9d
SRch
0dB
D13d
0
D14d
0
D15d
0
D16d
0
D17d
0
D18d
0
D19d
0
–1dB
–2dB
0
0
0
0
0
0
0
0
0
0
0
1
1
0
–3dB
–4dB
0
0
0
0
0
0
0
0
0
1
1
0
1
0
–5dB
–6dB
0
0
0
0
0
0
0
0
1
1
0
1
1
0
–7dB
–8dB
0
0
0
0
0
0
0
1
1
0
1
0
1
0
–9dB
–10dB
0
0
0
0
0
0
1
1
0
0
0
1
1
0
–11dB
–12dB
0
0
0
0
0
0
1
1
0
1
1
0
1
0
–13dB
–14dB
0
0
0
0
0
0
1
1
1
1
0
1
1
0
–15dB
–16dB
0
0
0
0
0
1
1
0
1
0
1
0
1
0
–17dB
–18dB
0
0
0
0
1
1
0
0
0
0
0
1
1
0
–19dB
–20dB
0
0
0
0
1
1
0
0
0
1
1
0
1
0
–21dB
–22dB
0
0
0
0
1
1
0
0
1
1
0
1
1
0
–23dB
–24dB
0
0
0
0
1
1
0
1
1
0
1
0
1
0
–25dB
–26dB
0
0
0
0
1
1
1
1
0
0
0
1
1
0
–27dB
–28dB
0
0
0
0
1
1
1
1
0
1
1
0
1
0
–29dB
–30dB
0
0
0
0
1
1
1
1
1
1
0
1
1
0
–31dB
–32dB
0
0
0
1
1
0
1
0
1
0
1
0
1
0
–33dB
–34dB
0
0
1
1
0
0
0
0
0
0
0
1
1
0
–35dB
–36dB
0
0
1
1
0
0
0
0
0
1
1
0
1
0
–37dB
–38dB
0
0
1
1
0
0
0
0
1
1
0
1
1
0
–39dB
–40dB
0
0
1
1
0
0
0
1
1
0
1
0
1
0
–41dB
–42dB
0
0
1
1
0
0
1
1
0
0
0
1
1
0
–43dB
0
1
0
1
0
1
1
ATT
Rev.1.0 Nov 22, 2005 page 9 of 15
R2S15902FP
Lch
D3b
D4b
D5b
D6b
D7b
D8b
D9b
Rch
Cch
D13b
D3c
D14b
D4c
D15b
D5c
D16b
D6c
D17b
D7c
D18b
D8c
D19b
D9c
SWch
SLch
D13c
D3d
D14c
D4d
D15c
D5d
D16c
D6d
D17c
D7d
D18c
D8d
D19c
D9d
SRch
–44dB
D13d
0
D14d
1
D15d
0
D16d
1
D17d
1
D18d
0
D19d
0
–45dB
–46dB
0
0
1
1
0
0
1
1
1
1
0
1
1
0
–47dB
–48dB
0
0
1
1
0
1
1
0
1
0
1
0
1
0
–49dB
–50dB
0
0
1
1
1
1
0
0
0
0
0
1
1
0
–51dB
–52dB
0
0
1
1
1
1
0
0
0
1
1
0
1
0
–53dB
–54dB
0
0
1
1
1
1
0
0
1
1
0
1
1
0
–55dB
–56dB
0
0
1
1
1
1
0
1
1
0
1
0
1
0
–57dB
–58dB
0
0
1
1
1
1
1
1
0
0
0
1
1
0
–59dB
–60dB
0
0
1
1
1
1
1
1
0
1
1
0
1
0
–61dB
–62dB
0
0
1
1
1
1
1
1
1
1
0
1
1
0
–63dB
–64dB
0
1
1
0
1
0
1
0
1
0
1
0
1
0
–65dB
–66dB
1
1
0
0
0
0
0
0
0
0
0
1
1
0
–67dB
–68dB
1
1
0
0
0
0
0
0
0
1
1
0
1
0
–69dB
–70dB
1
1
0
0
0
0
0
0
1
1
0
1
1
0
–71dB
–72dB
1
1
0
0
0
0
0
1
1
0
1
0
1
0
–73dB
–74dB
1
1
0
0
0
0
1
1
0
0
0
1
1
0
–75dB
–76dB
1
1
0
0
0
0
1
1
0
1
1
0
1
0
–77dB
–78dB
1
1
0
0
0
0
1
1
1
1
0
1
1
0
–79dB
–80dB
1
1
0
0
0
1
1
0
1
0
1
0
1
0
–81dB
–82dB
1
1
0
0
1
1
0
0
0
0
0
1
1
0
–83dB
–84dB
1
1
0
0
1
1
0
0
0
1
1
0
1
0
–85dB
–86dB
1
1
0
0
1
1
0
0
1
1
0
1
1
0
–87dB
–88dB
1
1
0
0
1
1
0
1
1
0
1
0
1
0
–89dB
–90dB
1
1
0
0
1
1
1
1
0
0
0
1
1
0
ATT
Rev.1.0 Nov 22, 2005 page 10 of 15
R2S15902FP
Lch
D3b
D4b
D5b
D6b
D7b
D8b
D9b
Rch
Cch
D13b
D3c
D14b
D4c
D15b
D5c
D16b
D6c
D17b
D7c
D18b
D8c
D19b
D9c
SWch
SLch
D13c
D3d
D14c
D4d
D15c
D5d
D16c
D6d
D17c
D7d
D18c
D8d
D19c
D9d
SRch
–91dB
D13d
1
D14d
0
D15d
1
D16d
1
D17d
0
D18d
1
D19d
1
–92dB
–93dB
1
1
0
0
1
1
1
1
1
1
0
0
0
1
–94dB
–95dB
1
1
0
0
1
1
1
1
1
1
1
1
0
1
–96dB
–97dB
1
1
1
1
0
0
0
0
0
0
0
0
0
1
–98dB
–99dB
1
1
1
1
0
0
0
0
0
0
1
1
0
1
1/0
1
1/0
1/0
ATT
–∞dB
1
1
1/0
Note: No guarantee except for these codes.
Electrical Characteristics
Unless otherwise noted, Ta = 25°C, VCC = 9V, f = 1kHz, Volume = 0dB, Input selector = IN1, Input gain = 0db,
Gain control = 0dB, ADC input ATT = 0dB, Tone = Bypass, L/R input = Selector in, SL/SR/C/SW input = L±R in
(1) Power supply characteristics
Limits
Parameter
Analog power supply circuit current
Rev.1.0 Nov 22, 2005 page 11 of 15
Symbol
ICC
Min
Typ
Max
Unit
⎯
35
55
mA
Test condition
With VCC = 9V
VCC current, when no signal is provided
R2S15902FP
(2) Input/Output characteristics (OVER ALL)
Limits
Symbol Min
Rin
17
Typ
25
Max
33
Unit
Maximum
output voltage
VOM
1.8
2.2
—
Vrms
Pass gain
Gv
–2.0
0
2.0
dB
—
0.005
0.02
%
6 to 11pin input, 15 to 20pin output,
BW: 400Hz to 30kHz, f = 1kHz, Vo = 0.5Vrms, RL = 10kΩ
–0.5
0
0.5
dB
31,32pin input, 19,20pin output, Vi = 0.3Vrms
Vono1
⎯
⎯
2
9
6
18
Vono2
⎯
⎯
2
9
6
18
Vono3
⎯
⎯
2
9
6
18
SS1
—
–90
–70
SS2
—
–90
–70
CS
—
–90
–70
Parameter
Input resistance
Total harmonic
THD
distortion
Balance of
CBAL
mutual channels
Output noise
voltage
Selector
separation
Channel
separation
kΩ
Test condition
6 to 11, 31 to 36 pin
µVrms
6 to 11pin input, 15 to 20pin output,
THD = 1%, RL = 10kΩ, Output gain control = +6dB
6 to 11pin input, 15 to 20pin output,
Vi = 0.3Vrms, FLAT
JIS-A, Rg = 0Ω, 19,20pin output,
Volume = –∞dB setting
Output gain control = 0dB
Output gain control = +14dB
JIS-A, Rg = 0Ω, 19,20pin output,
Volume = 0dB setting
Output gain control = 0dB
Output gain control = +14dB
JIS-A, Rg = 0Ω, 15 to 18pin output, Output gain control = 0dB
Volume = 0dB setting
Output gain control = +14dB
dB
< Input selector>
Vo = 1Vrms, Rg = 0Ω, RL = 10kΩ, JIS-A
< Multi input selector >
Vo = 1Vrms, Rg = 0Ω, RL = 10kΩ, JIS-A
Vo = 1Vrms, Rg = 0Ω, RL = 10kΩ, JIS-A
(3) 6 channel Volume characteristics
Parameter
Maximum attenuation
Volume gain gang error
of mutual channels
Symbol
Min
Limits
Typ Max
Unit
ATTmax
—
–105 –95
dB
Vi = 2Vrms, JIS-A, VOL = –∞dB
dB
Volume = 0dB
Dvol
–0.5
0
+0.5
Test condition
(4) Tone control characteristics
Unless otherwise noted, Tone ON/OFF = ON
Parameter
Tone control voltage gain
(Boost/Bass)
Tone control voltage gain
(Cut/Bass)
Tone control voltage gain
(Boost/Treble)
Tone control voltage gain
(Cut/Treble)
Balance of mutual channels
Rev.1.0 Nov 22, 2005 page 12 of 15
Symbol
Min
Limits
Typ Max
Unit
G (BASS) B
+11
+14
+17
dB
G (BASS) C
–17
–14
–11
dB
G (TRE) B
+11
+14
+17
dB
G (TRE) C
–17
–14
–11
dB
BALT
–2
0
+2
dB
Test condition
f = 100Hz
Bass +14dB setting
f = 100Hz
Bass –14dB setting
f = 10kHz
Treble +14dB setting
f = 10kHz
Treble –10dB setting
Bass setting +14, –14dB
Treble setting +14, –14dB
R2S15902FP
Tone Control
(1) Bass
< Boost >
+
IN
R3
OUT
+
[Designed Parameter]
R1=4.7kΩ, C1=0.047μF, C2=0.15μF
Gain
Setting
R2
1
f0 =
C1
0.047μ
2 π R1(R2+R3)C1C2
+14dB
+12dB
+10dB
+8dB
+6dB
+4dB
+2dB
(Hz)
(R2+R3)R1C1C2
C2
0.15μ
Q=
R1
4.7K
R1(C1+C2)+R3C1
Gv = 20 log
R1(C1+C2)+(R2+R3)C1
Designed Parameter
R3(k Ω ) R2(k Ω )
0.19
79.81
5.21
74.66
11.83
68.17
19.99
60.01
30.27
49.73
43.21
36.79
59.49
20.51
(dB)
R1(C1+C2)+R3C1
< Cut >
+
IN
+
R2
OUT
R3
[Designed Parameter]
R1=4.7kΩ , C1=0.047μF , C2=0.15μF
f0 =
1
2 π R1(R2+R3)C1C2
C2
0.15 μ
(Hz)
R1
4.7K
(R2+R3)R1C1C2
Q=
R1(C1+C2)+R3C1
Gv = 20 log
R1(C1+C2)+R3C1
R1(C1+C2)+(R2+R3)C1
Rev.1.0 Nov 22, 2005 page 13 of 15
C1
0.047μ
(dB)
Designed Parameter
Gain
Setting
R2(k Ω )
-14dB
-12dB
-10dB
-8dB
-6dB
-4dB
-2dB
79.81
74.66
68.17
60.01
49.73
36.79
20.51
R3(k Ω )
0.19
5.21
11.83
19.99
30.27
43.21
59.49
R2S15902FP
(2) Treble
[Designed Parameter]
RC=0.022μF
< Boost >
-
+
IN
+
R5
(R4+R5)2+ RC2
Gv =20 log
R4
Gain
Setting
OUT
2
(dB)
2
R4 +RC
RC
+14dB
+12dB
+10dB
+8dB
+6dB
+4dB
+2dB
Designed Parameter
R4(k Ω ) R5(kΩ )
1.03
5.23
1.41
4.85
1.86
4.40
2.40
3.86
3.06
3.20
3.90
2.36
4.95
1.31
0.022μ
2
Gv =20 log
<Cut >
2
(dB)
(R4+R5) + RC
+
IN
2
R4 +RC
R5
[Designed Parameter]
RC=0.022μF
-
+
OUT
0.022 μ
Tone gain Gv (dB)
Curve of characteristics
Frequency f(Hz)
Rev.1.0 Nov 22, 2005 page 14 of 15
Gain
Setting
-14dB
-12dB
-10dB
-8dB
-6dB
-4dB
-2dB
R4
RC
2
Designed Parameter
R5(k Ω )
5.23
4.85
4.40
3.86
3.20
2.36
1.31
R4(kΩ )
1.03
1.41
1.86
2.40
3.06
3.90
4.95
R2S15902FP
Application Example
+
19
Gain
Control
18
17
Gain
Control
Gain
Control
+
-
+
-
0.15μ
4.7μ
+
+
+
20
23
0.047μ
4.7k
4.7μ
Gain
Control
Cch
Vol
24
50 k
0.022 μ
SWch
Vol
50k
SR
4.7μ
MCU
4.7μ
+
+
16
15
14
Gain
Control
Gain
Control
+
-
21
4.7μ
SL
SW
+
-
22
4.7μ
C
+
-
4.7k
0.047μ
R
+
-
0.15μ
L
12
D
MCU
I/F
11
Logic
10
50k
Bass
/Tre
25
0.022 μ
50k
Bass
/Tre
26
9
8
50k
Lch Vol
25 k
Input
Gain
28
2.2μ
+
2.2μ
+
2.2μ
+
2.2 μ
+
2.2 μ
+
2.2 μ
SRIN
SLIN
SWIN
RchVol
25k
27
+
50k
SRch
Vol
50 k
SLch
Vol
50 k
13
C
7
25k
+
-
25 k
6
CIN
RIN
LIN
29
Input
Gain
30
50 k
+
-
REC
Output
Gain
Lch
2.2μ
INL1
25k
Input
ATT
REC
Output
Gain Rch
2.2μ
INR1
4
+ 31
+ 32
50 k
25k
INL2
Input
ATT
+ 33
25k
Lch (L- R)
50 k
50 k
25k
25k
25k
25k
25k
Rch (L+R)
2.2μ
INL3
INR2
2.2μ
+
Rev.1.0 Nov 22, 2005 page 15 of 15
2.2μ
37
38
+
+
2.2μ
39
40
41
42
43
44
LPF
+
2.2μ
INR4
(RECR1)
+
36
INL4
(RECL1)
35
INR3
34
100μ
+
100μ 0.1μ
VCC
9V
2.2 μ
2.2μ
ADC
2.2μ
-3db
3
2
2.2μ
-3db
5
1
2.2μ
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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