M61110FP/GP Coil-less VIF/SIF REJ03F0021-0200Z Rev.2.0 Mar.12.2004 Description M61110FP is a semiconductor integrated circuit consisting of VIF/SIF signal processing for CTVs and VCRs. M61110FP provides low cost and high performance system with the coil-less AFT Feature • • • • • • • • • Coil-less AFT PLL FM demodulation for Audio. No external parts and adjustment. (Target S/N=70dB) The PLL-SPLIT system provides good sound sensitivity and reduces buzz. Video output is 2.2Vp-p through EQ AMP Easy to add Buzz cancel Hi speed IF AGC Built-in QIF AGC Improve over modulation characteristics and Vcc ripple rejection Open collector RF AGC output (5-9V available). Application TV set, VCR tuners. Recommended Operating Condition (Ta = 25°C, unless otherwise noted) Supply Voltage Range (Vcc)...............4.75 to 5.25 V Rated Supply Voltage (Vcc)..............................5.0 V Pin configuration 1 24 EQ F / B 2 23 IF AGC FILTER APC FILTER 3 22 RF AGC DELAY EQ IN 4 21 VIF IN Vcc 5 20 VIF IN VCO COIL 6 19 GND VCO COIL 7 18 AFT OUT IF AGC FILTER 8 17 RF AGC OUT VIDEO OUT 9 16 QIF DET IN 15 NFB M61110FP/GP EQ OUT Vreg.OUT QIF OUT 10 GND 11 14 AUDIO OUT LIMITER IN 12 13 QIF AGC FILTER Rev.2.0, Mar.12.2004, page 1 of 19 M61110FP/GP Block diagram and peripheral circuit IF IN Vcc AF OUT RF AGC Delay 24 23 22 AFT OUT 21 20 RF AGC OUT 19 18 17 16 15 VIF AMP IF AGC 14 13 AF AMP RF AGC QIF AMP EQ AMP APC VIDEO DET AFT FM DET QIF AGC QIF DET LIM AMP REG VCO 1 2 3 Vreg. OUT EQ OUT 4 5 + 6 7 8 9 10 11 12 Vcc + VIDEO OUT 4.5MHz Trap Rev.2.0, Mar.12.2004, page 2 of 19 4.5MHz B.P.F. M61110FP/GP Absolute maximum ratings (Ta = 25°C, unless otherwise noted) Parameter Symbol Ratings Unit Supply Voltage Vcc 6.0 V Power Consumption Operating Temperature Pd Topr 1190(FP), 728(GP) –20 to +75 mW °C Storage Temperature Tstg –40 to +150 °C Allowable power consumption Pd ( mW ) Temperature Characteristics Note ( maximum ratings ) Mounting in standard circuit board 1750 1500 1250 1190 FP 1000 728 714 750 GP 500 438 250 0 -20 0 25 50 75 100 Ambient temperature Ta ( C ) Rev.2.0, Mar.12.2004, page 3 of 19 125 150 M61110FP/GP Electrical Characteristics (Vcc=5V, Ta=25°C, unless otherwise noted) VIF Section Measurement Limits No. Parameter Symbol Test Test Input Input switches set to Circuit Point Point SG position 1 unless otherwise noted Min Typ Max Unit 1 2 Circuit Current Vreg. Output Voltage Icc Vreg. 1 1 A TP2 — — 40 3.2 50 3.5 60 3.8 3 Video Output Voltage 9 Video Output Voltage 1 Vo det9 1 TP9 VIF IN SG1 0.85 1.1 1.35 Vp-p Vo det 1 TP1A VIF IN SG1 1.85 2.2 2.55 Vp-p 5 6 Video S/N Video Band Width Video S/N 1 BW 1 TP1B VIF IN SG2 TP1A VIF IN SG3 51 5.0 56 7.0 — — dB MHz 1 2 7 8 Input Sensitivity VIN MIN 1 Maximum VIN MAX 1 Allowable TP1A VIF IN SG4 TP1A VIF IN SG5 — 104 48 110 52 — dBµ dBµ 3 4 9 AGC Control GR Range Input IF AGC Voltage V8 1 — — — 55 62 — dB 5 1 TP8 VIF IN SG6 2.8 3.1 3.4 V 1 TP23 VIF IN SG6 2.8 3.1 3.4 V 1 TP17 VIF IN SG6 4.5 4.9 — V V17L 1 TP17 VIF IN SG7 — 0.1 0.5 V V17 1 TP17 VIF IN SG8 86 89 92 dBµ 6 1 TP1A VIF IN SG9 1.0 1.5 — MHz 7 1 TP1A VIF IN SG9 1.1 1.6 — MHz 8 — — 2.3 3.1 — MHz 9 1 TP18 VIF IN SG10 22 32 44 mV 10 V18H 1 TP18 VIF IN SG10 4.4 4.8 — V 10 V18L 1 TP18 VIF IN SG10 — 0.1 0.5 V 10 2.2 35 2.5 40 2.8 — V dB 11 — 2 5 % — 2 5 deg 4 10 11 12 13 14 15 16 17 18 19 20 IF AGC Voltage V23 2 Maximum RF V17H AGC Minimum RF AGC RF AGC Delay Point Capture Range CR-U U Capture Range CR-L L Capture Range CR-T T AFT Sensitivity µ AFT Minimum Voltage AFT Maximum Voltage — — — SW5 = 2 SW1 = 2 SW8 = 2 V8 = Variable — — 21 22 AFT defeat AFT def Inter Modulation IM 1 1 23 Differential Gain DG 1 TP18 VIF IN — TP1A VIF IN SG11 SW8 = 2 V8 = Variable TP1A VIF IN SG12 24 Differential Phase DP 1 TP1A VIF IN SG12 Rev.2.0, Mar.12.2004, page 4 of 19 Note mA V / kHz M61110FP/GP Electrical Characteristics (Vcc=5V, Ta=25°C, unless otherwise noted) SIF Section Measurement No. Parameter Symbol Test Test Input Circuit Point Point Input SG TP10 VIF IN QIF IN TP10 VIF IN QIF IN SG2 SG13 SG2 SG14 switches set to position 1 unless Min otherwise noted Limits Typ Max Unit 94 100 106 dBµ 94 100 106 dBµ Note 25 QIF det OUT1 QIF1 1 26 QIF det OUT2 QIF2 1 27 28 AF Output AFOutput Distortion 1 1 TP14 SIF IN TP14 SIF IN SG16 SG16 400 — 600 0.2 880 0.9 mVrms % 29 1 TP14 SIF IN SG17 — 42 55 dBµ 12 30 Limiting LIM Sensitivity AM Rejection AMR 1 TP14 SIF IN SG18 61 68 — dB 13 31 AF S/N 1 TP14 SIF IN SG19 63 70 — dB 14 VoAF THD AF AF S/N Rev.2.0, Mar.12.2004, page 5 of 19 M61110FP/GP Measurement Circuit Diagram VIF IN SIF IN 51 Vcc 150K 22K 51 TP18 Vcc 150K TP23 39K 1K 24 TP17 22 21 20 19 18 17 16 15 VIF AMP IF AGC 0.1u 7.5K 20K 1:1 23 TP14 0.1u 33K 14 13 AF AMP RF AGC QIF AMP EQ AMP APC VIDEO DET AFT FM DET QIF AGC QIF DET LIM AMP REG VCO 1 2 3 + 33u 4 5 6 11 12 TP10 33u 1K 51 1000p L TP1A P F 10 0.22u + SW1 2 8 TP8 9 0.47u + 1 7 15u VCO COIL 1 2 51 V8 330 TP2 LIM IN TP9 4.5MHz Trap TP1B SW5 1 Vcc 2 A * All the capacitors are 0.01uF, unless otherwise noted. * The Measurement Circuit 1 is Mitsubishi standard evaluation fixture. Rev.2.0, Mar.12.2004, page 6 of 19 M61110FP/GP Input Signal SG 50 Ω Termination 1 f0 = 45.75MHz AM 20kHz 77.8% 90dBµ 2 3 f0 = 45.75MHz 90dBµ CW f1 = 45.75MHz 90dBµ CW f2 = Frequency Variable 70dBµ 4 5 f0 = 45.75MHz AM 20kHz 77.8% Level Variable f0 = 45.75MHz AM 20kHz 14.0% Level Variable 6 7 f0 = 45.75MHz 80dBµ CW f0 = 45.75MHz 110dBµ CW 8 9 f0 = 45.75MHz Level Variable CW f0 = Frequency Variable AM 20kHz 77.8% 90dBµ 10 11 f0 = Frequency Variable 90dBµ CW f1 = 45.75MHz 90dBµ CW f2 = 42.17MHz 80dBµ CW Mixed Signal f3 = 41.25MHz 80dBµ CW 12 f0 = 45.75MHz 87.5% TV modulation 10stair-steps waveform Sync Tip Level 90dBµ f1 = 41.25MHz 95dBµ CW 13 } CW Mixed Signal } 14 15 f1 = 41.25MHz 75dBµ CW f1 = 45.75MHz 90dBµ CW f2 = 41.25MHz 70dBµ CW 16 17 f0 = 4.5MHz 90dBµ FM 400Hz +/–25kHzdev f0 = 4.5MHz Level Variable FM 400Hz +/–25kHzdev 18 19 f0 = 4.5MHz 90dBµ AM 400Hz 30% f0 = 4.5MHz 90dBµ CW 20 f0 = 4.5MHz Level Variable CW Rev.2.0, Mar.12.2004, page 7 of 19 } Mixed Signal M61110FP/GP Notes 1. Video S/N Input SG2 to VIF IN and measure the video out (Pin 1) noise in r.m.s. at TP1B through a 5MHz (–3dB) L.P.F. S/N=20 log 0.7 x Vo det ( —————— ) NOISE [dB] 2. Video Band Width : BW 1. Measure the 1MHz component level of Video output TP1A with a spectrum analyzer when SG3 (f2 = 44.75MHz) is input to VIF IN. At that time, measure the voltage at TP8 with SW8, set to position 2, and then fix V8 at that voltage. 2. Reduce f2 and measure the value of (f2-f1) when the (f2-f1) component level reaches –3dB from the 1MHz component level as shown below. TP1A -3dB ( f2 - f1 ) 1MHz BW 3. Input Sensitivity : VIN MIN Input SG4 (Vi = 90dBµ) to VIF IN , and then gradually reduce Vi and measure the input level when the 20kHz component of Video output TP1A reaches –3dB from Vo det level. 4. Maximum Allowable Input : VIN MAX 1. Input SG5 (Vi = 90dBµ) to VIF IN , and measure the level of the 20kHz component of Video output. 2. Gradually increase the Vi of SG and measure the input level when the output reaches –3dB. 5. AGC Control Range: GR GR = VIN MAX – VIN MIN [dB] Rev.2.0, Mar.12.2004, page 8 of 19 M61110FP/GP 6. RF AGC Operating Voltage: V17 Input SG8 to VIF IN and gradually reduce Vi and then measure the input level when RF AGC output TP17 reaches 1/2Vcc, as shown below. TP17 Voltage V17H 1/2VCC V 17L Vi (dBu) Vi 7. Capture range: CR-U 1. Increase the frequency of SG9 until the VCO is out of locked-oscillation. 2. And decrease the frequency of SG9 and measure the frequency fU when the VCO is locked. CR-U = fU – 45.75 [MHz] 8. Capture range: CR-L 1. Decrease the frequency of SG9 until the VCO is out of locked-oscillation. 2. And increase the frequency of SG9 and measure the frequency fL when the VCO is locked. CR-L = 45.75 – fL [MHz] 9. Capture range: CR-T CR-T = CR-U + CR-L [MHz] 10. AFT sensitivity : µ, Maximum AFT voltage : V18H , Minimum AFT voltage : V18L 1. Input SG10 to VIF IN, and set the frequency of SG10 so that the voltage of AFT output TP18 is 3[V] . This frequency is named f(3). 2. Set the frequency of SG10 so that the AFT output voltage is 2[V]. This frequency is named f(2). 3. IN the graph shown below, maximum and minimum DC voltage are V 18H and V18L , respectively. TP18 Voltage 3V µ= 1000 f(2) - f(3) [mV] [kHz] V 18H [mV/kHz] 2V V 18L f(3) Rev.2.0, Mar.12.2004, page 9 of 19 f(2) f(MHz) M61110FP/GP 11. Inter modulation: IM 1. Input SG11 to VIF IN, and measure video output TP9 with an oscilloscope. 2. Adjust AGC filter voltage V8 so that the minimum DC level of the output waveform is 1.5V. 3. At that time, measure TP1A with a spectrum analyzer . The inter modulation is defined as a difference between 0.92MHz and 3.58 MHz frequency components. 12. Limiting Sensitivity: LIM 1. Input SG17 to LIM IN, and measure the 400Hz component level of AF output TP14. 2. Input SG20 to LIM IN, and measure the noise level of AF output TP14 . 3. The input limiting sensitivity is defined as the input level when the difference between each 400Hz components of audio output (TP14) is 30dB, as shown below. Audio Output (mVrms) Audio output while SG17 is input. 30dB Audio output while SG20 is input. LIM Input level (dBµ) 13. AM Rejection: AMR 1. Input SG18 to LIM IN, and measure the output level of Audio output (TP14). This level is named VAM. 2. AMR is; AMR = 20log VoAF (mVrms) ( ——————— ) VAM (mVrms) [dB] 14. AF S/N: AF S/N 1. Input SG19 to LIM IN, and measure the output noise level of Audio output (TP14). This level is named VN. 2. S/N is; S/N = 20log VoAF (mVrms) ( ——————— ) VN (mVrms) Rev.2.0, Mar.12.2004, page 10 of 19 [dB] M61110FP/GP Pin peripheral circuit explanation *Pin 1 (EQ OUT) EQ output amplitude is positive 2.2Vp-p in case of 87.5% video modulation. 1 internal current : 1.2mA 1.1Vo-p *Pin 2 (Vreg.OUT) 2 It is a regulated 3.5V output which has current drive capability of approximately 1mA. + In the locked state, the cut-off frequency of the filter is adjusted effectively by an external resistor so that it will be in the range of around 30 to 200kHz. In case the cut-off frequency is lower, the pull-in speed becomes slow. On the other hand, a higher cut-off frequency widen the pull-in range and band width, which results in a degradation in the S/N ratio. So, in the actual TV system design, the appropriate constant should be chosen for getting desirable performance considering above conditions. *Pin3 (APC FILTER) 3 Bias 12K Pin 3 output [V3] 2.8Vo-p fo [IF input frequency] Rev.2.0, Mar.12.2004, page 11 of 19 FM mod.frequency 100KHz M61110FP/GP *PIN 4 (EQ IN) The input is open base. If DC information is not input to pin9, IF AGC dose not work normally. Please pay attention. 4 *PIN 5 (Vcc) Vcc It is Vcc pin. (only one Vcc pin in this IC) 5 *PIN 6, PIN 7 (VCO COIL) 800 800 6 7 Rev.2.0, Mar.12.2004, page 12 of 19 Connecting a tuning coil and capacitor to these pins enables an oscillation. The oscillation frequency is tuned in 'fo' .In the actual adjustment, the coil is tuned so that the AFT voltage reaches to Vcc/2 with 'fo' as an input. The printed pattern around these pins should be designed carefully to prevent an pull-in error of VCO, caused by the leakage interference from the large signal level oscillator to adjacent pins. The interconnection should be designed as short as possible. In case the printed pattern has the interference problem, a capacitor of about 1pF is connected between pin6 or pin7 and GND so as to cancel the interference and keep enough pull-in range even in a low input level. M61110FP/GP *PIN 8, PIN 23 (IF AGC FILTER) 2-pins filter characteristics are available by utilizing the dynamic AGC circuit . And AGC speed can be changed, if pin23 on the external resistor is variable. 8 1K 10K [V8] [V23] weak electric field 23 0 strong electric field [IF input] *PIN 9 (VIDEO OUT) Video output amplitude is positive 1.1Vp-p in case of 87.5% video modulation. 9 internal current: 4mA *PIN 10 (QIF OUT) 10 In the split carrier system, the carrier signal to SIF is provided from pin10 through the emitter follower. And please open this pin, when it is used in the inter carrier system. internal current: 1mA *PIN 11 (GND) This is GND of the SIF part . 11 Rev.2.0, Mar.12.2004, page 13 of 19 M61110FP/GP *PIN 12 (LIMITER IN) 12 Bias 150 6K The input impedance is 6.15KΩ. 6K *PIN 13 (QIF AGC FILTER) AGC speed can be changed by this pin's external capacity. 13 *PIN 14 (AUDIO OUT) 14 internal current : 0.8mA *PIN 15 (NFB) 15 50K 50K Rev.2.0, Mar.12.2004, page 14 of 19 The FM detector can respond to SIF signals without an adjustment and external components by adopting the PLL technique. The capacitor between pin14 and pin15, which fixes the de-emphasis characteristics, can be determined considering the combination of an equivalent resistance of the IC and this capacitor itself. Frequency response of audio output is decided with external capacitor value of pin15. And audio output level can be made it small when it connected external capacitor to pin15 and resistance in series. M61110FP/GP *PIN 16 (QIF DET IN) SAW 16 Bias 1.5K The input impedance is 1.5KΩ. 1.5K *PIN 17 (RF AGC OUT) Vcc (MAX 9V) Vcc Tuner 17 ( in open-loop condition ) [V17] inflow current : 2 mA (max) Low High 0 [ IF input ] Connecting a non-polarity capacitor of 1uF between pin17 to pin22 improves AGC operating speed. In that case, the capacitors between pin17 and pin22 to ground should be removed. It is possible for Pin17 to connect to Vcc with 9V. *PIN 18 (AFT OUT) Vcc The maximum outflow current : 0.2 mA 18 The maximum inflow current : 0.2 mA Tuner AFT output is provided by a high impedance source,the detection sensitivity can be set by an external resistor. The muting operation will be on in following two cases; 1) the APC is out of locked 2) the video output becomes small enough in a low input level. Vcc [V18] ( in open-loop condition ) Vcc 2 0 [fo] Rev.2.0, Mar.12.2004, page 15 of 19 M61110FP/GP *PIN 19 (GND) 19 This is GND other than SIF part. *PIN 20, PIN 21 (VIF IN) 20 21 Bias SAW It should be designed carefully for impedance matching with the SAW filter. 1.2K 1.2K *PIN 22 (RF AGC DELAY) Vreg. The applied voltage to the pin22 is for changing RF AGC delay point . 22 *PIN 24 (EQ F/B) 500 24 5.3K Bias 5K 5K Rev.2.0, Mar.12.2004, page 16 of 19 Both the external coil and capacitor determine the frequency response of EQ output . The series connected resistor is for damping. M61110FP/GP 21 20 19 18 0.01µ 17 16 15 VIF AMP IF AGC 14 13 AF AMP RF AGC EQ AMP 0.1 µ RF AGC OUT AF OUT 7.5 K 20K 0.1 µ 0.01µ 39K 150K AFT OUT Vcc 150K 0.01µ 22 Vcc 0.01µ 33K 22K 1K 0.01µ 23 Vcc 0.01µ 1K 24 51 2.2 K SAW IF IN 0.01µ 560 27 1.2 K 1µ 0.01µ 2200 P Application Example 1 APC FM DET QIF AGC VIDEO DET AFT QIF AMP LIM AMP QIF DET REG VCO 4 5 6 7 8 9 10 11 12 0.22µ 15µ + 33 µ TP2 0.01µ 33µ 1K 0.01µ EQ OUT 3 0.47µ + 2 100 1 VCO COIL 1K Vcc 330 4.5 MHz Trap 4.5 MHz B.P.F. TP9 special components SAW : SAFW45MCC80Z(MURATA) TRAP : TPSRA4M50B00(MURATA) B.P.F. : SFSRA4M50EF00(MURATA) VCO : 292GCS- 5540Z(TOKO) Rev.2.0, Mar.12.2004, page 17 of 19 M61110FP/GP 21 20 19 18 0.01µ 17 16 15 VIF AMP IF AGC 0.1 µ RF AGC OUT AF OUT 7.5 K 20K 0.1 µ 0.01µ 39K 150K AFT OUT Vcc 150K 0.01µ 22 Vcc 0.01µ 33K 22 K 1K 0.01µ 23 Vcc 0.01µ 1K 24 51 2.2 K SAW IF IN 0.01µ 560 27 1.2 K 1µ 0.01µ 2200 P Application Example 2 14 13 AF AMP RF AGC QIF AMP EQ AMP APC QIF AGC VIDEO DET AFT FM DET LIM AMP QIF DET REG VCO 6 7 + 33 µ 0.01µ 1M TP2 8 9 10 11 12 0.22µ 5 1p 4 22 µ 56 p 51 33µ 1K 0.01µ EQ OUT 3 0.47µ + 2 1000 p 1 Vcc 15 µ 330 4.5 MHz Trap VCO COIL 4.5 MHz B.P.F. TP9 special components SAW : SAFW45MCC80Z(MURATA) TRAP : TPSRA4M50B00(MURATA) B.P.F. : SFSRA4M50EF00(MURATA) VCO : 292GCS - 5540Z(TOKO) Rev.2.0, Mar.12.2004, page 18 of 19 Rev.2.0, Mar.12.2004, page 19 of 19 G Z1 E HE e 1 24 EIAJ Package Code SSOP24-P-300-0.80 z Detail G D y JEDEC Code — b 12 13 Weight(g) 0.2 Detail F A2 A Lead Material Cu Alloy L1 MMP A1 F c L A A1 A2 b c D E e HE L L1 z Z1 y Symbol e1 b2 e1 I2 b2 Dimension in Millimeters Min Nom Max — — 2.1 0 0.1 0.2 — 1.8 — 0.3 0.35 0.45 0.18 0.2 0.25 10.0 10.1 10.2 5.2 5.3 5.4 — 0.8 — 7.5 7.8 8.1 0.4 0.6 0.8 — 1.25 — — — 0.65 — — 0.8 — — 0.1 0˚ — 8˚ — 0.5 — — 7.62 — — 1.27 — Recommended Mount Pad e Plastic 24pin 300mil SSOP I2 24P2Q-A M61110FP/GP Detailed Diagram Of Package Outline Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. 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