IRDC3477 SupIRBuck TM USER GUIDE FOR IRDC3477 EVALUATION BOARD DESCRIPTION The IR3477 SupIRBuckTM is an easy-to-use, fully integrated and highly efficient DC/DC voltage regulator. The onboard constant on time hysteretic controller and MOSFETs make IR3477 a space-efficient solution that delivers up to 15A of precisely controlled output voltage. IR3477 is housed in a 20-lead 5mmx6mm QFN package. Key features offered by IR3477 include: programmable switching frequency, soft start, temperature compensated over current protection, and thermal shutdown allowing a very flexible solution suitable for many different applications and an ideal choice for battery powered applications. Additional features include pre-bias startup, a very precise 0.5V reference, forced continuous conduction mode option, over/under voltage protection, power good output, and enable input with voltage monitoring capability. This user guide contains the schematic, bill of materials, and operating instructions of the IRDC3477 evaluation board. Detailed product specifications, application information and performance curves at different operating conditions are available in the IR3477 data sheet. BOARD FEATURES • • • • • • • • VIN = +12V VCC = +5V VOUT = +1.05V IOUT = 0 to 15A FS = 300kHz @ CCM L = 1µH CIN = 22µF (ceramic 1210) + 68µF (electrolytic) COUT = 47µF (ceramic 0805) + 330µF (PC-CON) 1 IRDC3477 CONNECTIONS and OPERATING INSTRUCTIONS An input supply in the range of 8 to 19V should be connected from VIN to PGND. A maximum load of 15A may be connected to VOUT and PGND. The connection diagram is shown in Fig. 1, and the inputs and outputs of the board are listed in Table 1. IRDC3477 has two input supplies, one for biasing (VCC) and the other for input voltage (VIN). Separate supplies should be applied to these inputs. VCC input should be a well regulated 4.5V to 5.5V supply connected to VCC and PGND. Enable (EN) is controlled by the first switch of SW1, and FCCM option can be selected by the second switch of SW1. Toggle the switch to the ON position (marked by a solid square) to enable switching or to select FCCM. The absolute maximum voltage of the external signal applied to EN (TP4) and FCCM (TP3) is +8V. Table 1. Connections Connection Signal Name VIN (TP2) VIN PGND (TP5) Ground for VIN VCC (TP16) VCC Input PGND (TP17) Ground for VCC Input VOUT (TP7) VOUT (+1.05V) PGND (TP10) Ground for VOUT EN (TP4) Enable Input FCCM (TP3) Forced Continuous Conduction Mode Input LAYOUT The PCB is a 4-layer board. All layers are 1 oz. copper. IR3477 and other components are mounted on the top and bottom layers of the board. The power supply decoupling capacitors, bootstrap capacitor and feedback components are located close to IR3477. To improve efficiency, the circuit board is designed to minimize the length of the onboard power ground current path. 2 IRDC3477 CONNECTION DIAGRAM VIN= +12V GROUND Control Switch for: EN FCCM GROUND VCC = +5.0V GROUND VOUT = +1.05V Fig. 1: Connection Diagram of IRDC3477 Evaluation Board 3 IRDC3477 PCB Board Layout Fig. 2: Board Layout, Top Components Fig. 3: Board Layout, Bottom Components 4 IRDC3477 PCB Board Layout Fig. 4: Board Layout, Top Layer Fig. 5: Board Layout, Bottom Layer 5 IRDC3477 PCB Board Layout Fig. 6: Board Layout, Mid-layer I Fig. 7: Board Layout, Mid-layer II 6 Fig. 8: Schematic of the IRDC3477 Evaluation Board IRDC3477 7 IRDC3477 Bill of Materials 8 IRDC3477 TYPICAL OPERATING WAVEFORMS Tested with demoboard shown in Fig. 8, VIN = 12V, VCC = 5V, VOUT = 1.05V, Fs = 300kHz, TA = 25oC, no airflow, unless otherwise specified EN EN PGOOD PGOOD SS SS VOUT VOUT 5V/div 5V/div 1V/div 500mV/div 5ms/div 5V/div 5V/div 1V/div 500mV/div 500µs/div Fig. 10: Shutdown Fig. 9: Startup VOUT VOUT PHASE PHASE iL iL 20mV/div 5V/div 5A/div 10µs/div Fig. 11: DCM (IOUT = 0.1A) 20mV/div 5V/div 10A/div 2µs/div Fig. 12: CCM (IOUT = 12A) PGOOD PGOOD SS FB VOUT VOUT iL iL 5V/div 1V/div 1V/div 10A/div 2ms/div Fig. 13: Over Current Protection (tested by shorting VOUT to PGND on demoboard) 5V/div 1V/div 500mV/div 2A/div 50µs/div Fig. 14: Over Voltage Protection (tested by shorting FB to VOUT) 9 IRDC3477 TYPICAL OPERATING WAVEFORMS Tested with demoboard shown in Fig. 8, VIN = 12V, VCC = 5V, VOUT = 1.05V, Fs = 300kHz, TA = 25oC, no airflow, unless otherwise specified VOUT VOUT PHASE PHASE iL iL 50mV/div 10V/div 5A/div 20µs/div Fig. 15: Load Transient 0-8A 50mV/div 10V/div 5A/div 20µs/div Fig. 16: Load Transient 4-12A TYPICAL PERFORMANCE VIN = 12V, VCC = 5V, VOUT = 1.05V, Fs = 300kHz, IOUT = 15A, TA = 25oC, no airflow Fig. 17: Thermal Image (IR3477: 98oC, Inductor: 69oC, PCB: 49oC) 10 IRDC3477 TYPICAL OPERATING DATA VIN = 12V, VCC = 5V, VOUT = 1.05V, Fs = 300kHz, IOUT = 0 ~ 15A, TA = 25oC, no airflow, unless otherwise specified 95% Switching Frequency (kHz) 400 90% Efficiency 85% 80% 75% 70% 65% 60% 55% 50% 0.01 300 250 200 150 100 50 0 0.1 1 Load Current (A) 10 0 100 3 6 9 12 15 Load Current (A) Fig. 18: Efficiency vs. Output Current Fig. 19: Switching Frequency vs. Output Current 1.050 1.050 1.048 1.048 Output Voltage (V) Output Voltage (V) 350 1.046 1.044 1.042 1.040 1.046 1.044 1.042 1.040 1.038 1.038 0 3 6 9 Load Current (A) Fig. 20: Load Regulation 12 15 8 9 10 11 12 13 14 15 16 17 18 19 Input Voltage (V) Fig. 21: Line Regulation at 15A Load 11 IRDC3477 PCB Metal and Components Placement Lead lands (the 13 IC pins) width should be equal to nominal part lead width. The minimum lead to lead spacing should be ≥ 0.2mm to minimize shorting. Lead land length should be equal to maximum part lead length + 0.3 mm outboard extension. The outboard extension ensures a large toe fillet that can be easily inspected. Pad lands (the 4 big pads) length and width should be equal to maximum part pad length and width. However, the minimum metal to metal spacing should be no less than; 0.17mm for 2 oz. Copper or no less than 0.1mm for 1 oz. Copper or no less than 0.23mm for 3 oz. Copper. 12 IRDC3477 Solder Resist It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD pads. The land pad should be Solder Mask Defined (SMD), with a minimum overlap of the solder resist onto the copper of 0.05mm to accommodate solder resist misalignment. Ensure that the solder resist in between the lead lands and the pad land is ≥ 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land. 13 IRDC3477 Stencil Design The Stencil apertures for the lead lands should be approximately 80% of the area of the lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead shorts. If too much solder is deposited on the center pad the part will float and the lead lands will open. The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back in order to decrease the risk of shorting the center land to the lead lands when the part is pushed into the solder paste. 14 IRDC3477 DIM A A1 b b1 c D E e e1 e2 MILIMITERS MIN MAX 0.800 1.000 0.000 0.050 0.375 0.475 0.250 0.350 0.203 REF. 5.000 BASIC 6.000 BASIC 1.033 BASIC 0.650 BASIC 0.852 BASIC INCHES MIN MAX 0.0315 0.0394 0.0000 0.0020 0.1477 0.1871 0.0098 0.1379 0.008 REF. 1.969 BASIC 2.362 BASIC 0.0407 BASIC 0.0256 BASIC 0.0335 BASIC DIM L M N O P Q R S t1, t2, t3 t4 t5 MILIMITERS MIN MAX 0.350 0.450 2.441 2.541 0.703 0.803 2.079 2.179 3.242 3.342 1.265 1.365 2.644 2.744 1.500 1.600 0.401 BASIC 1.153 BASIC 0.727 BASIC INCHES MIN MAX 0.0138 0.0177 0.0961 0.1000 0.0277 0.0316 0.0819 0.0858 0.1276 0.1316 0.0498 0.0537 0.1041 0.1080 0.0591 0.0630 0.016 BACIS 0.045 BASIC 0.0286 BASIC IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 11/10 15