IRDC3897

IRDC3897-P2V625
SupIRBuck
TM
USER GUIDE FOR IR3897 EVALUATION BOARD
2.625Vout
DESCRIPTION
The IR3897 is a synchronous buck
converter, providing a compact, high
performance and flexible solution in a small
4mm X 5 mm Power QFN package.
Key features offered by the IR3897 include
internal Digital Soft Start/Soft Stop, precision
0.5Vreference voltage, Power Good,
thermal protection, programmable switching
frequency, Enable input, input under-voltage
lockout for proper start-up, enhanced line/
load regulation with feed forward, external
frequency synchronization with smooth
clocking, internal LDO and pre-bias startup.
Output over-current protection function is
implemented by sensing the voltage developed
across the on-resistance of the synchronous
Mosfet for optimum cost and performance and
the current limit is thermally compensated.
This user guide contains the schematic and bill
of materials for the IR3897 evaluation board.
The guide describes operation and use of the
evaluation board itself. Detailed application
information for IR3897 is available in the
IR3897 data sheet.
BOARD FEATURES
• Vin = +12V (+ 13.2V Max)
• Vout = +2.625V @ 0- 3.8A
• Fs=600kHz
• L= 2.2uH
• Cin= 2x22uF (ceramic 1206) + 1X330uF (electrolytic)*
• Cout=4x47uF (ceramic 0805)
* The 330uF input capacitor is placed for damping the parasitic inductance of bench power supply wires. It is not
required for the POL applications where input power is delivered with power planes.
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IRDC3897-P2V625
CONNECTIONS and OPERATING INSTRUCTIONS
A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum of 3.8A load should
be connected to VOUT+ and VOUT-. The inputs and output connections of the board are listed in Table I.
IR3897 has only one input supply and internal LDO generates Vcc from Vin. If operation with external Vcc
is required, then R15 can be removed and external Vcc can be applied between Vcc+ and Vcc- pins. Vin pin
and Vcc/LDO_Out pins should be shorted together for external Vcc operation.
The output can track voltage at the Vp pin. For this purpose, Vref pin is to be connected to ground (use zero
ohm resistor for R21). The value of R14 and R28 can be selected to provide the desired tracking ratio
between output voltage and the tracking input.
Table I. Connections
Connection
Signal Name
VIN+
Vin (+12V)
VIN-
Ground of Vin
Vout+
Vout(+2.625V)
Vout-
Ground for Vout
Vcc+
Vcc/ LDO_Out Pin
Vcc-
Ground for Vcc input
Enable
Enable
PGood
Power Good Signal
AGnd
Analog ground
LAYOUT
The PCB is a 4-layer board (2.23”x2”) using FR4 material. All layers use 2 Oz. copper. The PCB
thickness is 0.062”. The IR3897 and other major power components are mounted on the top side of the
board.
Power supply decoupling capacitors, the bootstrap capacitor and feedback components are located
close to IR3897. The feedback resistors are connected to the output at the point of regulation and are
located close to the SupIRBuck IC. To improve efficiency, the circuit board is designed to minimize the
length of the on-board power ground current path.
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IRDC3897-P2V625
Connection Diagram
Vin
Gnd
Gnd
Vout
Enable
VDDQ
Top View
Vref
Sync
S-Ctrl
AGnd
PGood Vsns Vcc+ Vcc-
Bottom View
Fig. 1: Connection Diagram of IR3899/98/97 Evaluation Boards
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IRDC3897-P2V625
Fig. 2: Board Layout-Top Layer
Single point connection
between AGnd and PGnd
Fig. 3: Board Layout-Bottom Layer
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IRDC3897-P2V625
Fig. 4: Board Layout-Mid Layer 1
Fig. 5: Board Layout-Mid Layer 2
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49.9k
R17
IR3897
PGood
1
Vcc+
1
39.2k
R9
1
3.3nF
C26
0.1nF
S_Ctrl
R13
0 ohm
C23
2.2uF
VCC
S_Ctrl
Vp
Rt_Sy nc
AGnd
COMP
FB
C32
1.0uF
IR3897
R3
1.43k
6.04k
R2
107 ohm
R4
PGnd
SW
PVin
N38703
C7
0.1uF
0.1uF
C24
2200pF
A
R6
1.43k
R12
B
6.04k
R11
2.2uH
L1
0 ohm
R15
20 ohm
Vsns
PGND
C8
11
12
13
0 ohm
R10
49.9k
22uF
C1 +
Vin
330uF/25V
47uF
47uF
47uF
C15
C14
0.1uF
0 ohm
R50
47uF, 0805, 6.3V, X5R, 20%
C16
C17
47uF
C18
Vout
XAL7070-222MEB from Coilcraft
C2
C3
22uF
22uF, 1206, 16V, X5R, 20%
Fig. 6: Schematic of the IR3897 evaluation board
6
16
5
4
3
1
U1
7.5k
R19
4mmx5mm Power QFN package
VCC
27pF
C11
SYNC
8.25k
R1
1
2
VREF
1
15
Enable
C12
1
9
Vin
PGood
7
Vcc/LDO_OUT
10
14
VREF
1
Boot
Vsns
8
GND
17
R18
1
1
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Enable
IRDC3897-P2V625
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IRDC3897-P2V625
Bill of Materials
Description
Item Qty
Part Reference
Value
1
1
C1
330uF
2
2
C2 C3
22uF
1206, 16V, X5R, 20%
TDK
C3216X5R1C226M
3
3
C7 C14 C24
0.1uF
0603, 25V, X7R, 10%
Murata
GRM188R71E104KA01
4
1
C8
2200pF 0603,50V,X7R, 10%
Murata
GRM188R71H222KA01
5
1
C11
27pF
Murata
GRM1885C1H270JA01D
6
1
C12
0.1nF
0603, 50V, NP0, 5%
Murata
GQM1885C1H101JB01
7
4
C15 C16 C17 C18
47uF
0805, 6.3V, X5R, 20%
TDK
C2012X5R0J476M
8
1
C23
2.2uF
0603, 16V, X5R, 20%
TDK
C1608X5R1C225M
9
1
C26
3.3nF
0603, 25V, X7R, 10%
Murata
GRM188R71E332KA01
10
1
C32
1.0uF
Murata
GRM188R61E105KA12D
11
1
L1
2.2uH SMD 7.2x7.5x7mm,5.73mΩ
Coilcraft
XAL7070-222MEB
12
1
R1
8.25k
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF8251V
13
2
R2 R11
6.04k
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF6041V
14
3
R3 R12
1.43k
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF1431V
15
1
R4
107
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF1070V
16
1
R6
20
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF20R0V
17
1
R9
39.2k
18
4
R10 R13 R15 R50
0
Thick Film, 0603,1/10W
Panasonic ERJ-3GEY0R00V
19
2
R17 R18
49.9k
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF4992V
20
1
R19
7.5k
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF7501V
21
1
U1
IR3897 PQFN 4x5mm
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Manufacturer Part Number
SMD Electrolytic F size 25V 20% Panasonic
0603, 50V, NP0, 5%
0603, 25V, X5R, 10%
Thick Film, 0603,1/10W,1%
EEV-FK1E331P
Panasonic ERJ-3EKF3922V
IR
IR3897MPBF
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IRDC3897-P2V625
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=2.625V, Io=0-3.8A, Room Temperature, no airflow
Fig. 7: Start up at 3.8A current
Ch1: Vin, Ch2: Vout, Ch3: PGood Ch4: Enable
Fig. 9: Start up with 2.3V Pre Bias, 0A Load,
Ch1: Enable, Ch2: Vout, Ch3: PGood
Fig. 11: Inductor node at 3.8A current
Ch1: SW node
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Fig. 8: Start up at 3.8A current
Ch1: Vin, Ch2: Vout, Ch3: PGood, Ch4: Vcc
Fig. 10: Output Voltage Ripple, 3.8A current
Ch2: Vout
Fig. 12: Short circuit (Hiccup) recovery
Ch2:Vout, Ch3: PGood, Ch4: Iout
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IRDC3897-P2V625
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=2.625V, Io=0-3.8A, Room Temperature, no air flow
(a)
(b)
(b)
Fig. 13: Transient Response, 0A to 3.3A step at 50.93A/us raising/27.64A/us falling slew rates with
different repetitive rates (a) 100Hz, (b) 1kHz and (c) 10kHz.
Ch4:Vimonitor (10.90mV/A)*
Ch2:Vout
* Vimonitor is the voltage measured across a current sense resistor in series with the load with
10.90mV/A rate.
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IRDC3897-P2V625
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=2.625V, Io=0- 3.8A, Room Temperature, no air flow
Fig. 14: Bode Plot at 3.8A current shows a bandwidth of 104.77kHz and phase margin of 60.64°
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IRDC3897-P2V625
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=2.625V, Io=0- 3.8A, Room Temperature, no air flow
94
93
92
91
Efficiency [%]
90
89
88
87
86
85
84
83
82
81
0.38 0.57 0.76 0.95 1.14 1.33 1.52 1.71 1.9 2.09 2.28 2.47 2.66 2.85 3.04 3.23 3.42 3.61 3.8
Io [A]
Fig.15: Efficiency versus load current-Current
0.75
0.7
0.65
Power Loss [W]
0.6
0.55
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.38 0.57 0.76 0.95 1.14 1.33 1.52 1.71 1.9 2.09 2.28 2.47 2.66 2.85 3.04 3.23 3.42 3.61 3.8
Io [A]
Fig.16: Power loss versus load current
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IRDC3897-P2V625
TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=2.625V, Io=0- 3.8A, Room Temperature, no air flow
Fig. 17: Thermal Image of the board at 3.8A current
Test point 1 is IR3897
Test point 2 is inductor
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IRDC3897-P2V625
PCB METAL AND COMPONENT PLACEMENT
Evaluations have shown that the best overall performance is achieved using the substrate/PCB layout
as shown in following figures. PQFN devices should be placed to an accuracy of 0.050mm on both X
and Y axes. Self-centering behavior is highly dependent on solders and processes, and experiments
should be run to confirm the limits of self-centering on specific processes. For further information, please
refer to “SupIRBuck™ Multi-Chip Module (MCM) Power Quad Flat No-Lead (PQFN) Board Mounting
Application Note.” (AN1132)
Figure 18: PCB Metal Pad Spacing (all dimensions in mm)
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IRDC3897-P2V625
SOLDER RESIST
IR recommends that the larger Power or Land Area pads are Solder Mask Defined (SMD.)
This allows the underlying Copper traces to be as large as possible, which helps in terms of current
carrying capability and device cooling capability. When using SMD pads, the underlying copper
traces should be at least 0.05mm larger (on each edge) than the Solder Mask window,
in order to accommodate any layer to layer misalignment. (i.e. 0.1mm in X & Y.)
However, for the smaller Signal type leads around the edge of the device, IR recommends that
these are Non Solder Mask Defined or Copper Defined. When using NSMD pads,
the Solder Resist Window should be larger than the Copper Pad by at least 0.025mm on
each edge, (i.e. 0.05mm in X&Y,) in order to accommodate any layer to
layer misalignment. Ensure that the solder resist in-between the smaller signal lead areas are at
least 0.15mm wide, due to the high x/y aspect ratio of the solder mask strip.
Figure 19: Solder resist
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IRDC3897-P2V625
STENCIL DESIGN
Stencils for PQFN can be used with thicknesses of 0.100-0.250mm (0.004-0.010"). Stencils thinner than
0.100mm are unsuitable because they deposit insufficient solder paste to make good solder joints with the
ground pad; high reductions sometimes create similar problems. Stencils in the range of 0.125mm-0.200mm
(0.005-0.008"), with suitable reductions, give the best results. Evaluations have shown that the best overall
performance is achieved using the stencil design shown in following figure. This design is for
a stencil thickness of 0.127mm (0.005").The reduction should be adjusted for stencils of other thicknesses.
Figure 20: Stencil Pad Spacing (all dimensions in mm)
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IRDC3897-P2V625
PACKAGE INFORMATION
Figure 21: Package Dimensions
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
This product has been designed and qualified for the Industrial market
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice.06/11
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