Datasheet - International Rectifier

PD-97608
AFL2811R1S
(IR P/N 10209)
28V Input, Single Output
HYBRID-HIGH RELIABILITY
DC-DC CONVERTER
Description
The AFL Series of DC-DC converters feature high
power density with no derating over the full military
temperature range. This series is offered as part of a
complete family of converters providing single and dual
output voltages and operating from nominal +28V or
+270V inputs with output power ranging from 80W to
120W. For applications requiring higher output power,
individual converters can be operated in parallel. The
internal current sharing circuits assure equal current
distribution among the paralleled converters. This
series incorporates International Rectifier’s proprietary
magnetic pulse feedback technology providing
optimum dynamic line and load regulation response.
This feedback system samples the output voltage at
the pulse width modulator fixed clock frequency,
nominally 550KHz. Multiple converters can be
synchronized to a system clock in the 500KHz to 700KHz
range or to the synchronization output of one converter.
Undervoltage lockout, primary and secondary referenced
inhibit, soft-start and load fault protection are provided
on all models.
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long
term hermeticity in the most harsh environments.
AFL
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
16V To 40V Input Range
High Power Density - up to 84W/in3
Up To 100W Output Power
Parallel Operation with Power Sharing
Low Profile (0.380") Seam Welded Package
Ceramic Feedthru Copper Core Pins
High Efficiency - to 84%
Full Military Temperature Range
Continuous Short Circuit and Overload
Protection
Primary and Secondary Referenced
Inhibit Functions
Line Rejection > 40dB - DC to 50KHz
External Synchronization Port
Fault Tolerant Design
Manufactured in a facility fully qualified to MIL-PRF38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet.
Variations in electrical, mechanical and screening can
be accommodated. Contact IR San Jose for special
requirements.
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1
12/14/10
AFL2811R1S (10209)
Specifications
Absolute Maximum Ratings
Input voltage
Soldering temperature
Operating case temperature
Storage case temperature
-0.5V to +50VDC (up to 1 second)
300°C for 10 seconds
-55°C to +125°C
-65°C to +135°C
Static Characteristics -55°C < TCASE < +125°C, 16V< VIN < 40V unless otherwise specified.
Parameter
Group A
Subgroups
Min
Nom
Max
Unit
16
28
40
V
1
10.98
11.10
11.21
2, 3
10.87
INPUT VOLTAGE
Test Conditions
Note 6
OUTPUT VOLTAGE
VIN = 28V, 100% Load
V
OUTPUT CURRENT
VIN = 16, 28, 40V - Notes 6, 10
MAXIMUM CAPACITIVE LOAD
Note 1
10,000
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
VIN = 28V, 100% Load – Notes 1, 6
-0.015
OUTPUT VOLTAGE REGULATION
Line
Load
1, 2, 3
1, 2, 3
OUTPUT RIPPLE VOLTAGE
1, 2, 3
INPUT CURRENT
No Load
Inhibit 1
Inhibit 2
No Load, 50% Load, 100% Load
VIN = 16, 28, 40V
1
2, 3
1, 2, 3
1, 2, 3
INPUT RIPPLE CURRENT
1, 2, 3
CURRENT LIMIT POINT
1, 2, 3
LOAD FAULT POWER
DISSIPATION
Overload or Short Circuit
1, 2, 3
EFFICIENCY
1, 2, 3
11.32
7.2
µF
+0.015
%/°C
-20
+20
mV
-1.0
+1.0
%
45
mVpp
VIN = 16, 28, 40V, 100% Load,
BW = 10MHz
VIN = 28V
IOUT = 0
80
100
5.0
50
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
VIN = 28V, 100% Load,
BW = 10MHz
VOUT = 90% VNOM, VIN = 16, 28, 40V
Note 5
6.2
VIN = 28V
VIN = 28V, 100% Load
A
80
84
mA
60
mApp
7.2
A
33
W
%
For Notes to Specifications, refer to page 3
2
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AFL2811R1S (10209)
Static Characteristics (Continued)
Parameter
ENABLE INPUTS (Inhibit Function)
Converter Off
Sink Current
Converter On
Sink Current
SWITCHING FREQUENCY
SYNCHRONIZATION INPUT
Frequency Range
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Pulse Duty Cycle
ISOLATION
Group A
Subgroups
1, 2, 3
1, 2, 3
Test Conditions
Min
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9
Note 1
-0.5
2.0
1, 2, 3
500
1, 2, 3
1, 2, 3
1, 2, 3
500
2.0
-0.5
Note 1
Note 1
1
Nom
550
20
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
DEVICE WEIGHT
Slight Variations with Case Style
MTBF
MIL-HDBK-217F, AIF @ TC = 70°C
Max
Unit
0.8
100
50
100
V
µA
V
µA
600
KHz
700
10
0.8
100
80
KHz
V
V
ns
%
100
MΩ
85
g
300
KHrs
Dynamic Characteristics -55°C < TCASE < +125°C, VIN=28V unless otherwise specified.
Parameter
Group A
Subgroups
LOAD TRANSIENT RESPONSE
Test Conditions
Min
Nom
Max
Unit
Notes 2, 8
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 50% ⇔ 100%
-750
750
200
mV
µs
Amplitude
Recovery
4, 5, 6
4, 5, 6
Load Step 10% ⇔ 50%
-750
750
400
mV
µs
-500
500
500
mV
µs
250
10
mV
ms
LINE TRANSIENT RESPONSE
Note 1, 2, 3
VIN Step = 16 ⇔ 40 Volts
Amplitude
Recovery
TURN-ON CHARACTERISTICS
Overshoot
Delay
VIN = 16, 28, 40 Volts. Note 4
4, 5, 6
4, 5, 6
Enable 1, 2 on. (Pins 4, 12 high or
open)
LOAD FAULT RECOVERY
Same as Turn On Characteristics.
LINE REJECTION
MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
0
4.0
40
50
dB
Notes to Specifications:
1.
Parameters not 100% tested but are guaranteed to the limits specified in the table.
2.
Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1.0% of VOUT at 50% load.
3.
Line transient transition time ≥ 100µs.
4.
Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
5.
Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
6.
Parameter verified as part of another test.
7.
All electrical tests are performed with the remote sense leads connected to the output leads at the load.
8.
Load transient transition time ≥ 10µs.
9.
Enable inputs internally pulled high. Nominal open circuit voltage ≈ 4.0VDC.
10. Set output current to 5.5A as test condition for regulation tests.
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3
AFL2811R1S (10209)
Block Diagram
Figure I. Single Output
+ Input 1
Input
Filter
Enable 1 4
Output
Filter
Primary
Bias Supply
7
+Output
10
+Sense
Current
Sense
Sync Output
5
Sync Input 6
Case
Control
FB
3
Error
Amp
& Ref
Share
Amplifier
11 Share
12 Enable 2
Sense
Amplifier
Input Return 2
Circuit Operation and Application Information
The AFL series of converters employs a forward switched
mode converter topology. (refer to Figure I) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pin 4 is enabled (at a logical 1 or open) the primary
bias supply will begin generating a regulated housekeeping
voltage bringing the circuitry on the primary side of the
converter to life. A power MOSFET is used to chop the DC
input voltage into a high frequency square wave, applying
this chopped voltage to the power transformer at the nominal
converter switching frequency. Maintaining a DC voltage
within the specified operating range at the input assures
continuous generation of the primary bias voltage.
The switched voltage impressed on the secondary output
transformer winding is rectified and filtered to generate the
converter DC output voltage. An error amplifier on the
secondary side compares the output voltage to a precision
reference and generates an error signal proportional to the
difference. This error signal is magnetically coupled through
the feedback transformer into the controller section of the
converter varying the pulse width of the square wave signal
driving the MOSFET, narrowing the width if the output voltage
is too high and widening it if it is too low, thereby regulating
the output voltage.
4
Sense Return
8
Output Return
not used, the sense leads should be connected to their
respective output terminals at the converter. Figure III.
llustrates a typical remotely sensed application.
Inhibiting Converter Output (Enable)
As an alternative to application and removal of the DC voltage
to the input, the user can control the converter output by
providing TTL compatible, positive logic signals to either of
two Enable pins (pin 4 or 12). The distinction between these
two signal ports is that Enable 1 (pin 4) is referenced to the
Input Return (pin 2) while Enable 2 (pin 12) is referenced to
the Output Return (pin 8). Thus, the user has access to an
inhibit function on either side of the isolation barrier. Each
port is internally pulled “high” so that when not used, an
open connection on both enable pins permits normal
converter operation. When their use is desired, a logical
“low” on either port will shut the converter down.
Figure II. Enable Input Equivalent Circuit
+5.6V
Pin 4 or
Pin 12
1N4148
100K
Disable
290K
Remote Sensing
Connection of the + and - sense leads at a remotely located
load permits compensation for excessive resistance
between the converter output and the load when their
physical separation could cause undesirable voltage drop.
This connection allows regulation to the placard voltage at
the point of application. When the remote sensing feature is
9
2N3904
150K
Pin 2 or
Pin 8
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AFL2811R1S (10209)
Internally, these ports differ slightly in their function. In use,
a low on Enable 1 completely shuts down all circuits in the
converter, while a low on Enable 2 shuts down the secondary
side while altering the controller duty cycle to near zero.
Externally, the use of either port is transparent to the user
save for minor differences in standby current. (See
specification table).
than 100ns, maximum low level of +0.8Vand a minimum
highvel of +2.0V. The Sync Output of another converter
which has been designated as the master oscillator provides
a convenient frequency source for this mode of operation.
When external synchronization is not required, the sync in
pin should be left open (unconnected )thereby permitting
the converter to operate at its own internally set frequency.
Synchronization of Multiple Converters
The Sync Output signal is a continuous pulse train set at
550 ± 50KHz, with a duty cycle of 15 ± 5%. This signal is
referenced to the Input Return and has been tailored to be
compatible with the AFL Sync Input port. Transition times
are less than 100ns and the low level output impedance is
less than 50Ω. This signal is active when the DC input
voltage is within the specified operating range and the
converter is not inhibited. This output has adequate drive
reserve to synchronize at least five additional converters.
A typical connection is illustrated in Figure III.
When operating multiple converters, system requirements
often dictate operation of the converters at a common
frequency. To accommodate this requirement, the AFL
series converters provide both a synchronization input and
a synchronization output.
The Sync Input port permits synchronization of an AFL
converter to any compatible external frequency source
operating between 500KHz and 700KHz. This input signal
should be referenced to the input return and have a 10% to
90% duty cycle. Compatibility requires transition times less
Figure III. Preferred Connection for Parallel Operation
Power
Input
1
12
Vin
Enable 2
Rtn
Share
Case
Enable 1
Optional
Synchronization
Connection
AFL
+ Sense
- Sense
Sync Out
Return
Sync In
+ Vout
6
7
1
12
Share Bus
Enable 2
Vin
Rtn
Case
Enable 1
Share
AFL
+ Sense
- Sense
Sync Out
Return
Sync In
+ Vout
6
1
Vin
Enable 2
Rtn
Share
Case
Enable 1
AFL
to Load
7
12
+ Sense
- Sense
Sync Out
Return
Sync In
+ Vout
6
7
(Other Converters)
Parallel Operation-Current and Stress Sharing
Figure III. illustrates the preferred connection scheme for
operation of a set of AFL converters with outputs operating
in parallel. Use of this connection permits equal sharing
among the members of a set whose load current exceeds
the capacity of an individual AFL. An important feature of
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the AFL series operating in the parallel mode is that in addition
to sharing the current, the stress induced by temperature
will also be shared. Thus if one member of a paralleled set
is operating at a higher case temperature, the current it
provides to the load will be reduced as compensation for
the temperature induced stress on that device.
5
AFL2811R1S (10209)
When operating in the shared mode, it is important that
symmetry of connection be maintained as an assurance of
optimum load sharing performance. Thus, converter outputs
should be connected to the load with equal lengths of wire of
the same gauge and should be connected to a common
physical point, preferably at the load along with the converter
output and return leads. All converters in a paralleled set
must have their share pins connected together. This
arrangement is diagrammatically illustrated in Figure III
showing the Output and Return pins connected at a star
point which is located close as possible to the load.
As a consequence of the topology utilized in the current
sharing circuit, the share pin may be used for other functions.
In applications requiring only a single converter, the voltage
appearing on the share pin may be used as a “current
monitor”. The share pin open circuit voltage is nominally
+1.00V at no load and increases linearly with increasing
total output current to +2.20V at full load.
Thermal Considerations
Because of the incorporation of many innovative
technological concepts, the AFL series of converters is
capable of providing very high output power from a package
of very small volume. These magnitudes of power density
can only be obtained by combining high circuit efficiency
with effective methods of heat removal from the die junctions.
This requirement has been effectively addressed inside the
device; but when operating at maximum loads, a significant
amount of heat will be generated and this heat must be
conducted away from the case. To maintain the case
temperature at or below the specified maximum of 125°C,
this heat must be transferred by conduction to an
appropriate heat dissipater held in intimate contact with the
converter base-plate.
Because the effectiveness of this heat transfer is dependent
on the intimacy of the baseplate/heatsink interface, it is
strongly recommended that a high thermal conductivity heat
transferring medium is inserted between the baseplate and
heatsink. The material most frequently utilized at the factory
during all testing and burn-in processes is sold under the
trade name of Sil-Pad® 4001 . This particular product is an
insulator but electrically conductive versions are also
available. Use of these materials assures maximum surface
contact with the heat dissipater thereby compensating for
any minor surface variations. While other available types of
heat conductive materials and thermal compounds provide
similar effectiveness, these alternatives are often less
convenient and can be somewhat messy to use.
A conservative aid to estimating the total heat sink surface
area (A HEAT SINK ) required to set the maximum case
temperature rise (∆T) above ambient temperature is given
by the following expression:
.
⎧ ∆T ⎫ −143
⎬
− 3.0
A HEAT SINK ≈ ⎨
⎩ 80P 0.85 ⎭
where
∆T = Case temperature rise above ambient
⎧ 1
⎫
− 1⎬
P = Device dissipation in Watts = POUT ⎨
⎩ Eff
⎭
As an example, it is desired to maintain the case temperature
of an AFL2815S at ≤ +85°C while operating in an open area
whose ambient temperature is held at a constant +25°C;
then
∆T = 85 - 25 = 60°C
From the Specification Table, the worst case full load
efficiency for this device is 83%; therefore the power
dissipation at full load is given by
⎧ 1
⎫
P = 120 • ⎨
− 1⎬ = 120 • ( 0.205) = 24.6W
⎩ .83 ⎭
and the required heat sink area is
⎧
⎫ −1.43
60
⎬
− 3.0 = 71 in 2
A HEAT SINK = ⎨
⎩ 80 • 24.6 0.85 ⎭
Thus, a total heat sink surface area (including fins, if any) of
71 in2 in this example, would limit case rise to 60°C above
ambient. A flat aluminum plate, 0.25" thick and of
approximate dimension 4" by 9" (36 in 2 per side) would
suffice for this application in a still air environment. Note
that to meet the criteria in this example, both sides of the
plate require unrestricted exposure to the ambient air.
1Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
6
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AFL2811R1S (10209)
Input Filter
Figure V. Connection for VOUT Adjustment
The AFL28XXS series of converters incorporates a two
stage LC input filter whose elements dominate the input
load impedance characteristic during the turn-on. The
input circuit is as shown in Figure IV.
Share
AFL28xxS
+ Sense
RADJ
- Sense
Figure IV. Input Filter Circuit
900nH
Enable 2
Return
To Load
130nH
+ Vout
Pin 1
Note: Radj must be set ≥ 500Ω
6 µfd
11.2 µfd
Pin 2
Undervoltage Lockout
A minimum voltage is required at the input of the converter
to initiate operation. This voltage is set to 14V ± 0.5V. To
preclude the possibility of noise or other variations at the
input falsely initiating and halting converter operation, a
hysteresis of approximately 1.0V is incorporated in this
circuit. Thus if the input voltage droops to 13V ± 0.5V, the
converter will shut down and remain inoperative until the
input voltage returns to ≈14V.
Output Voltage Adjust
In addition to permitting close voltage regulation of remotely
located loads, it is possible to utilize the converter sense
pins to incrementally increase the output voltage up to 10%
maximum above the nominal output voltage. The adjustments
made possible by this method are intended as a means to
“trim” the output to a voltage setting for some particular
application, but are not intended to create an adjustable
output converter. These output voltage setting variations
are obtained by connecting an appropriate resistor value
between the +sense and -sense pins while connecting the sense pin to the output return pin as shown in Figure V.
below. The range of adjustment and corresponding range
of resistance values can be determined by use of the
following equation.
⎫
⎧
VNOM
⎬
Radj = 100 • ⎨
⎩VOUT - VNOM -.025 ⎭
Where, VNOM = device nominal output voltage, and
VOUT = desired output voltage, 110% of VNOM maximum
Finding a resistor value for a particular output voltage, is
simply a matter of substituting the desired output voltage
and the nominal device voltage into the equation and solving
for the corresponding resistor value.
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Attempts to adjust the output voltage to a value greater than
110% of nominal should be avoided because of the potential
of exceeding internal component stress ratings and
subsequent operation to failure. Under no circumstance
should the external setting resistor be made less than 500Ω.
By remaining within this specified range of values, completely
safe operation fully within normal component derating limits
is assured.
Examination of the equation relating output voltage and
resistor value reveals a special benefit of the circuit topology
utilized for remote sensing of output voltage in the AFL28XXS
series of converters. It is apparent that as the resistance
increases, the output voltage approaches the nominal set
value of the device. In fact the calculated limiting value of
output voltage as the adjusting resistor becomes very large
is ≈ 25mV above nominal device voltage.
The consequence is that if the +sense connection is
unintentionally broken, an AFL28XXS has a fail-safe output
voltage of Vout + 25mV, where the 25mV is independent of
the nominal output voltage. It can be further demonstrated
that in the event of both the + and - sense connections
being broken, the output will be limited to Vout + 440mV.
This 440mV is also essentially constant independent of the
nominal output voltage.
General Application Information
The AFL28XXS series of converters is capable of providing
large transient currents to user loads on demand. Because
the nominal input voltage range in this series is relatively
low, the resulting input current demands will be
correspondingly large. It is important therefore, that the line
impedance be kept very low to prevent steady state and
transient input currents from degrading the supply voltage
between the voltage source and the converter input. In
applications requiring high static currents and large
transients, it is recommended that the input leads be made
of adequate size to minimize resistive losses, and that a
good quality capacitor of approximately 100µfd be
connected directly across the input terminals to assure an
adequately low impedance at the input terminals. Table I
relates nominal resistance values and selected wire sizes.
7
AFL2811R1S (10209)
Table 1. Nominal Resistance of Cu Wire
Wire Size, AWG
Resistance per ft
24 Ga
25.7 mΩ
22 Ga
16.2 mΩ
20 Ga
10.1 mΩ
18 Ga
6.4 mΩ
16 Ga
4.0 mΩ
14 Ga
2.5 mΩ
12 Ga
1.6 mΩ
Another potential problem resulting from parasitically
induced voltage drop on the input lines is with regard to
the operation of the enable 1 port. The minimum and
maximum operating levels required to operate this port
are specified with respect to the input common return line
at the converter. If a logic signal is generated with respect
to a ‘common’ that is distant from the converter, the effects
of the voltage drop over the return line must be considered
when establishing the worst case TTL switching levels.
These drops will effectively impart a shift to the logic levels.
In Figure VI, it can be seen that referred to system ground,
the voltage on the input return pin is given by
eRtn = IRtn • RP
As an example of the effects of parasitic resistance,
consider an AFL2815S operating at full power of 120W.
From the specification sheet, this device has a minimum
efficiency of 83% which represents an input power of more
than 145W. If we consider the case where line voltage is at
its’ minimum of 16V, the steady state input current necessary
for this example will be slightly greater than 9 amperes. If
this device were connected to a voltage source with 10
feet of 20 gauge wire, the round trip (input and return)
would result in 0.2Ω of resistance and 1.8V of drop from the
source to the converter. To assure 16V at the input, a
source closer to 18V would be required. In applications
using the paralleling option, this drop will be multiplied by
the number of paralleled devices. By choosing 14 or 16
gauge wire in this example, the parasitic resistance and
resulting voltage drop will be reduced to 25% or 31% of that
with 20 gauge wire.
Therefore, the logic signal level generated in the system
must be capable of a TTL logic high plus sufficient additional
amplitude to overcome eRtn. When the converter is inhibited,
IRtn diminishes to near zero and eRtn will then be at system
ground.
Incorporation of a 100µF capacitor at the input terminals is
recommended as compensation for the dynamic effects
of the parasitic resistance of the input cable reacting with
the complex impedance of the converter input, and to
provide an energy reservoir for transient input current
requirements.
Figure VI. Problems of Parasitic Resistance in input Leads
(See text)
Rp
esource
Rp
Iin
IRtn
100
µfd
Vin
eRtn
Rtn
Case
System Ground
Enable 1
Sync Out
Sync In
8
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FOR REVIEW ONLY
AFL2811R1S (10209)
Mechanical Outlines
Case V
3.000
Ø0.128
2.700
0.050
0.250
1.000
Ref
1.260 1.500
0.200 Typ
Non-cum
Pin
Ø0.040
0.220
2.500
0.250 Ref
3.450
Ref
0.225
Ref
0.380
Max
Case X
3.000
ø 0.128
2.760
0.050
1
12
0.250
1.000
Ref
0.200 Typ
Non-cum
6
7
1.260 1.500
Pin
ø 0.040
0.220
2.500
2.975 max
0.238 max
0.380
Max
Tolerances, unless otherwise specified:
.XX
.XXX
=
=
±0.010
±0.005
BERYLLIA WARNING: These converters are hermetically sealed; however they contain BeO substrates and should not be ground or subjected to any other
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium
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9
AFL2811R1S (10209)
Device Screening
Requirement
MIL-STD-883 Method
Temperature Range
No Suffix
ES
d
-20°C to +85°C -55°C to +125°C
Element Evaluation
HB
e -55°C to +125°C
CH
-55°C to +125°C
MIL-PRF-38534
N/A
N/A
N/A
Class H
2023
N/A
N/A
N/A
N/A
2017
c
Yes
Yes
Yes
Non-Destructive
Bond Pull
Internal Visual
Temperature Cycle
1010
N/A
Cond B
Cond C
Cond C
Constant Acceleration
2001, Y1 Axis
N/A
500 Gs
3000 Gs
3000 Gs
N/A
N/A
PIND
2020
N/A
N/A
Burn-In
1015
N/A
48 [email protected] temp
Final Electrical
MIL-PRF-38534
25°C
25°C
d
160 [email protected]°C 160 [email protected]°C
-55°C, +25°C,
-55°C, +25°C,
( Group A )
& Specification
+125°C
+125°C
PDA
MIL-PRF-38534
N/A
N/A
N/A
10%
Seal, Fine and Gross
1014
Cond A
Cond A, C
Cond A, C
Cond A, C
Radiographic
2012
N/A
N/A
N/A
N/A
External Visual
2009
Yes
Yes
Yes
c
Notes:
 Best commercial practice
‚ Sample tests at low and high temperatures
ƒ -55°C to +105°C for AHE, ATO, ATW
Pin Designation
Pin #
Designation
1
+ Input
2
Input Return
3
Case Ground
4
Enable 1
5
Sync Output
6
Sync Input
7
+ Output
8
Output Return
9
Sense Return
10
+ Sense
11
Share
12
Enable 2
Part Numbering
AFL 28 11R1 S X /CH
Model
Screening Level
Input Voltage
No suffix, ES, HB, CH
28 = 28V
Case Style
(Please refer to Screening Table)
V, X
Output Voltage
Output
11R1 = 11.1V
S = Single
Part Definition
IR P/N 10209EM = AFL2811R1SX/ES
IR P/N 10209FM = AFL2811R1SV/HB
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
IR SAN JOSE: 2520Junction Avenue, San Jose, California 95134, Tel: (408) 434-5000
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 12/2010
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