HT71D01A/03A Two Line Type Power Line Data Transceiver Features General Description • Complete Data Transmission on Power Line functions In systems where a master controller controls a number of individual interconnected subsystems such as found in smoke detector systems, water metering systems, solar energy system etc., the cost of the lengthy interconnecting cabling can be a major factor. By sending data along the power supply lines, the interconnecting cables can be reduced to a simple two line type, thus greatly reducing both cable and installation costs. • High Maximum Input Voltage: 38V • Integrated Low Dropout Voltage Regulator with Soft-Start and Short Circuit Protection • Integrated Voltage Detector for Power Supply Monitoring • Integrated Comparator • Open drain NMOS driver for flexible interfacing With a the addition of a few external components, this power line data transceiver device contains all the internal components required to provide users with a system for power line data transmission and reception. Data is modulated onto the power line by the simple reduction of the power line voltage for a specific period of time. Power supply voltage changes can be initiated by the master controller for data reception or initiated by the HT71D0xA devices for data transmission. An internal voltage regulator with Soft-Start and short circuit protection function within the device ensures that a constant voltage power supply is provided to the interconnected subsystem units while an internal voltage detector monitors the power line voltage level. An internal comparator is used to translate the differential signal into a logic signal for the MCU. • Power and Reset Protection Features • 8-pin SOP package type • Minimal external component requirements Selection Guide Part No. LDO Voltage Detect Voltage Package HT71D01A 3.3V 7.5V 8SOP HT71D03A 5.0V 7.5V 8SOP Rev. 1.00 1 February 13, 2015 HT71D01A/03A Block Diagram VIN VIN VO LDO with Soft-Start & SCP VO Q1 CEB VIN RPU1 INT0 VDLY CDLY LVD Q2 CX Q3 CN C1 + CP/TD VO Q4 VPT VSS/TS RPU2 VDLY Protection Circuit TG C2 C2X Vref VPT VDLY C2X R Pin Assignment VSS/TS CP/TD CN VIN 1 8 2 7 3 6 4 5 TG CDLY CX VO HT71D01A/03A 8 SOP-A Rev. 1.00 2 February 13, 2015 HT71D01A/03A Pin Description Pin Name I/O Description VIN — CN I Comparator Negative Input I Comparator Positive Input - CP CP/TD VSS/TS Input voltage O NMOS Driver Drain Terminal - TD — Ground pin - VSS O NMOS Driver Source Terminal - TS TG I NMOS Gate Input CX O Comparator output, NMOS output CDLY O LDO output control - delay time determined by external capacitor. VO — LDO output voltage Note: 1. The CP/TD using the same pad in the body. 2. There are two different pads for VSS and TS in the body. Absolute Maximum Ratings Maximum Input Supply Voltage ����������������������������������������������������������������������������������������������������������������������������38V Storage Temperature ........................... -55°C to 150°C Maximum Junction Temperature ....................... 150°C Operating Temperature ......................... -40°C to 85°C Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to these devices. Functional operation of these devices at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect devices reliability. D.C. Characteristics Symbol VIN Parameter Operating Voltage Ta = 25°C Test Conditions Conditions VDD — — Min. Typ. Max. Unit 10 — 38 V — 30 85 μA μA ICC Operating current of VIN — VIN=36V , CP=5V, CN=2V, No Load ICP CP leakage current — VIN=CP=38V,CN=0V, — — 10 ICN CN leakage current — VIN=CN=38V,CP=0V, — — 1 μA IOL1 Output Sink Current (VO pin) — VIN=5V, VOL=0.5V 0.8 — — mA IOL2 Output Sink Current (CDLY pin) — VIN=5V, VOL=0.5V 250 500 — μA IOL3 Output Sink Current (CX pin) — VIN=5V, VOL=0.5V 0.8 — — mA IOL4 Output Sink Current (TD pin) — VIN=18V, VOL=1V 90 — — mA RPU1 Pull-up resistor 1 — VIN=10V -80% 5 +80% MΩ RPU2 Pull-up resistor 2 — VIN=10V -50% 50 +50% KΩ VL — — VIN=36V VH — VL — Inverter 0 (INT) Schmitt Trigger Window VH VSW (Note) VH VL Rev. 1.00 — VIN=24V VIN=10V 3 -20% 19.4 +20% V -20% 10.3 +20% V -20% 13.7 +20% V -20% 7.16 +20% V -20% 5.83 +20% V -20% 3.07 +20% V February 13, 2015 HT71D01A/03A Symbol Parameter Test Conditions Conditions VDD Min. Typ. Max. 3.201 3.3 3.399 4.85 5 5.15 Unit Voltage Regulator 3.3V VIN=10V, 5.0V IOUT =10mA VOUT LDO Output Voltage IOUT LDO Output Current — VIN=10V, ∆VOUT= 3% (Note1) 80 — — mA ∆VLOAD Load Regulation — VIN=10V , 1mA ≤IOUT ≤30mA — 60 100 mV ∆VLINE Line Regulation — 10V ≤VIN ≤36V, IOUT =1mA — 0.2 — %/V — 5 10 ms TSU Startup time (Rising edge of CDLY to VOUT within specification) — 5 10 ms ∆VOUT ∆Ta Temperature Coefficient 3.3V VIN=10V, IOUT =10 mA 5.0V CL=10uF 3.3V VIN=10V, IOUT =10 mA 5.0V CL=0.1μF 3.3V I =10 mA OUT 5.0V -40°C<Ta<85°C V — 1 2 ms — 1 2 ms — ±0.5 — — ±0.75 — VDV -3% VDV VDV +3% V mV/°C Voltage Detector VDET Detection Voltage — VHYS Hysteresis Width — — — 0.05 VDET — V ∆VDET ∆Ta Temperature Coefficient — -40°C<Ta<85°C — ±0.9 — mV/°C VDV=7.5V Comparator tRES Response Time — — — — 10 μs VHC Hysteresis Window — — — 0.15 — V — VSS +1.5 — VIN -1 V — — 130% ×VO V Common-Mode Input Range VCOM — Soft-Start VOUT-PO LDO Power On Output Voltage 3.3V 10V ≤VIN ≤38V, 5.0V COUT=10μF, No load Note:1. ∆VOUT is calculated with the difference between the output voltage under testing and the output voltage which is measured at IOUT =10mA. 2. VIO specification is design guaranteed. 3. The figure explains the schmitt trigger action. output VL Rev. 1.00 VH 4 input February 13, 2015 HT71D01A/03A Function Description Shared Power Line These devices provide a way to transmit and receive data on the common power lines of an interconnected array of microcontroller based subsystems. By having one of these devices inside each subsystem, the shared power and data cabling can be reduced to a simple two line type, offering major installation cost reductions. All microcontroller based subsystems are connected together via the same two line power connection.The ground line is hardwired to each subsystem while the positive power line is connected to the VIN pin on each of the HT71D0xA devices. An internal Low Dropout Voltage Regulator with Soft-Start and short circuit protection function within the HT71D0xA devices, converts this input power supply voltage to a fixed voltage level which is supplied to the subsystem microcontroller and other circuit components. In this way when the power line voltage is changed due to the transmission or reception of data the subsystem circuits still continue to receive a regulated power supply. P o s itiv e P o w e r S u p p ly L in e M a s te r C o n tr o lle r G r o u n d L in e M C U M C U M C U S u b s y s te m # 2 S u b s y s te m # n S u b s y s te m # 1 System Block Diagram Rev. 1.00 5 February 13, 2015 HT71D01A/03A Data Transmission Protection Circuits Refer to the application circuit when reading the following description. Data information can be transmitted onto the positive power line by reducing the voltage level for a short time duration. As the devices include a voltage regulator which is used as the power supply to the subsystem units, then the subsystem power supply voltage will not be affected as long as the regulator minimum dropout voltage is maintained. However a reduction in the power supply will be detected by the C1 internal comparators. The output of this comparator is connected to an open drain NMOS transistor, Q3, whose open drain output on pin CX can be connected to a microcontroller input for use as a data signal. The devices include an internal Voltage Detector function which monitors the power supply input voltage. Should the input power supply voltage fall below a safe level specified by the voltage detector level, then the voltage detector output will change state and disable the internal regulator thus removing the power supply source to the subsystem circuits. An internal NMOS transistor whose drain is connected to the output power supply line, VO will also turn on keeping the VO level close to zero. This ensures that the subsystem microcontroller receives the proper power on reset conditions. When power is applied an external capacitor, connected to pin CDLY, together with an internal resistor, RPU1, implement a power on delay time for the internal LDO. Data Reception Application Considerations Refer to the application circuit when reading the following description. The individual subsystems can transmit data to the master controller along the power supply line by using one of its I/O lines to reduce the positive power line supply line voltage level for a short time duration. An output line on the subsystem microcontroller should be connected to the TG pin. An internal comparator, C2, whose positive input is connected to an internal voltage reference, will detect if this pin is pulled low. The comparator output is connected to an internal open drain NMOS transistor, Q4, which will pull the CP/TD line low. By connecting a suitable value resistor between the CP/ TD pin and the power supply line, the correct value of power supply voltage reduction can be implemented. It is envisaged that the devices will be used together with microcontroller based subsystems which will be required to provide two I/O pins for data transmission and reception. The MCU pin connected to theTG pin must be setup as an output while the MCU pin connected to the CX pin must be setup as an input. The power supply impedence will play an important role in applications using these devices and must be well defined for reliable data transmission and reception. The external components connected to the CP/TD pin must be chosen carefully to ensure that an adequate pulse duration on pin CX is generated. The usual decoupling precautions must be taken to ensure reliable operation. Power Line Data Reception Rev. 1.00 6 February 13, 2015 HT71D01A/03A Application Circuits The following application circuit shows the device used in conjunction with a microcontroller. VIN R 47uF VIN 104 R1 VO VO LDO 3.3V/5.0V 104 VIN CEB RPU1 270 R2 LVD 7.5V 104 VSS CDLY 203 Q2 CX CN CP/TD Q3 + VDD Q1 VO RX Note: RX = 80k C1 MCU I/O0 VO RPU2 Protection Circuit VSS/TS Q4 C2 TG I/O1 Vref Note: If the CX pin connects to an external pull-high resistor, the resistance value should be less than or equal to 80kΩ. Rev. 1.00 7 February 13, 2015 HT71D01A/03A Package Information Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the package information. Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be transferred to the relevant website page. • Further Package Information (include Outline Dimensions, Product Tape and Reel Specifications) • Packing Meterials Information • Carton information Rev. 1.00 8 February 13, 2015 HT71D01A/03A 8-pin SOP (150mil) Outline Dimensions Symbol Dimensions in inch Min. Nom. Max. — A — 0.236 BSC B — 0.154 BSC — C 0.012 — 0.020 C’ — 0.193 BSC — D — — 0.069 E — 0.050 BSC — F 0.004 — 0.010 G 0.016 — 0.050 H 0.004 — 0.010 α 0° — 8° Symbol A Rev. 1.00 Dimensions in mm Min. Nom. Max. — 6.00 BSC — B — 3.90 BSC — C 0.31 — 0.51 C’ — 4.90 BSC — D — — 1.75 E — 1.27 BSC — F 0.10 — 0.25 G 0.40 — 1.27 H 0.10 — 0.25 α 0° — 8° 9 February 13, 2015 HT71D01A/03A Copyright© 2015 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek's products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.00 10 February 13, 2015