HT6220A/HT6221A/HT6221B/HT6222A Multi-Purpose

HT6220A/HT6221A/HT6221B/HT6222A
Multi-Purpose Encoders
Features
· Operating voltage: 2.0V~3.6V
-
· Build-in RC (Internal RC) oscillator
HT6220A: 6 keys (8SOP) or 30 keys (16NSOP)
HT6221A: 32 keys
HT6221B: 48 keys
HT6222A: 64 keys
· Low power and high noise immunity CMOS
technology
· 16-bit address codes
· HT6220A: selection of 16-pin NSOP or 8-pin SOP
· DOUT with 38kHz carrier for IR medium
· Low standby current
· Minimum transmission word: one word
· 8-bit data codes
package
HT6221A/HT6221B: 20-pin SOP package
HT6222A: 24-pin SOP package
· PPM code method
· Three double-active keys
· Maximum active keys
Applications
· Television , setup box and DVD player controllers
· Car door controllers
· Burglar alarm systems
· Car alarm systems
· Smoke and fire alarm systems
· Security systems
· Garage door controllers
· Other remote control systems
General Description
The devices are CMOS LSI encoders designed for use
in remote control systems. They are capable of encoding 16-bit address codes and 8-bit data codes. Each address/data input can be set to one of the two logic
states, 0 and 1.
32 keys (K1~K32), 48 keys (K1~K32, K33~K34,
K37~K38, K41~K42, K45~K46, K49~K50, K53~K54,
K57~K58, K61~K62) and 64 keys (K1~K64), respectively. When one of the keys is triggered, the programmed address/data is transmitted together with the
header bits via an IR (38kHz carrier) transmission medium.
The HT6220A/HT6221A/HT6221B/HT6222A contain
6keys (K21~K23, K25~K27) or 30keys (K1~K20,
K33~K34, K37~K38, K41~K42, K45~K46, K49~K50),
Block Diagram
O s c illa to r
R 1
R 8
Rev. 1.20
D iv id e r
K e y b o a rd
M a tr ix &
G a te
C ir c u it
D a ta R O M
& R e g is te r s
C 1
A IN
C 8
D a ta S e le c t
& B u ffe r
¸ 2 4 C o u n te r &
1 o f 2 4 D e c o d e r
D O U T
L E D
S y n c .
C ir c u it
B in a r y D e te c to r
V D D
D 7
1
V S S
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Pin Assignment
R 3
1
2 4
R 2
R 4
2
2 3
R 1
R 1
1
2 0
A IN
R 1
1
2 0
A IN
R 5
3
2 2
A IN
R 2
2
1 9
C 1
R 2
2
1 9
C 1
R 6
4
2 1
C 1
R 3
1
1 6
R 2
R 3
3
1 8
C 2
R 3
3
1 8
C 2
R 7
5
2 0
C 2
R 4
2
1 5
R 1
R 4
4
1 7
C 3
R 4
4
1 7
C 3
R 8
6
1 9
C 3
R 5
3
1 4
A IN
D O U T
5
1 6
C 4
D O U T
5
1 6
C 4
D O U T
7
1 8
C 4
R 6
4
1 3
C 1
V D D
6
1 5
C 5
V D D
6
1 5
C 5
V D D
8
1 7
C 5
R 3
1
8
R 2
D O U T
5
1 2
C 2
D 7
7
1 4
C 6
D 7
7
1 4
C 6
D 7
9
1 6
C 6
D O U T
2
7
R 1
V D D
6
1 1
C 3
N C
8
1 3
C 7
R 5
8
1 3
C 7
N C
1 0
1 5
C 7
V D D
3
6
C 6
D 7
7
1 0
C 4
N C
9
1 2
C 8
R 6
9
1 2
C 8
N C
1 1
1 4
C 8
V S S
4
5
C 7
V S S
8
9
C 5
V S S
1 0
1 1
L E D
1 0
1 1
L E D
V S S
1 2
1 3
L E D
H T 6 2 2 0 A
1 6 N S O P -A
H T 6 2 2 0 A
8 S O P -A
V S S
H T 6 2 2 1 A
2 0 S O P -A
H T 6 2 2 1 B
2 0 S O P -A
H T 6 2 2 2 A
2 4 S O P -A
Pin Description
HT6222A
Pin No.
Pin Name
I/O
Internal Connection
I
CMOS IN, Pull-low
Description
1~6
R3~R8
Row control for keyboard matrix, active high
7
DOUT
O
NMOS OUT
8
VDD
¾
¾
9
D7
I
CMOS IN
10, 11
NC
¾
¾
No connection
12
VSS
¾
¾
Negative power supply, ground
13
LED
O
CMOS OUT
14~21
C8~C1
I/O
22
AIN
I
CMOS IN, Pull-high
Pull-low
Low byte address codes (8 bits) scan input
23~24
R1~R2
I
CMOS IN, Pull-low
Row control for keyboard matrix, active high
Serial data output pin, with a 38kHz carrier
Positive power supply, 2.0V~3.6V for normal operation
Most significant data bit (D7) code setting
Transmission enable indicator output
CMOS IN/OUT, Pull-low Column control for keyboard matrix
Approximate Internal Connection Circuits
C M O S IN /O U T
V
C M O S IN /O U T
P u ll- lo w
C M O S IN
P u ll- lo w
C M O S O U T
N M O S O U T
D D
C M O S IN
V
Rev. 1.20
D D
2
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Absolute Maximum Ratings
Supply Voltage ..............................VSS-0.3V to VSS+6V
Storage Temperature ............................-50°C to 125°C
Input Voltage..............................VSS-0.3V to VDD+0.3V
Operating Temperature...........................-20°C to 75°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristic
Symbol
Parameter
Ta=25°C
Test Conditions
VDD
Conditions
¾
Min.
Typ.
Max.
Unit
2.0
3.0
3.6
V
VDD
Operating Voltage
¾
ISTB
Standby Current
3V
Oscillator stops
¾
0.1
1.0
mA
IDD
Operating Current
3V
fOSC=455kHz, no load
¾
600
900
mA
IOL1
Output Sink Current for DOUT
3V
VO=0.6V
300
350
¾
mA
IOH2
Output Source Current for LED
3V
VO=2.7V
-10
-60
¾
mA
IOL2
Output Sink Current for LED
3V
VO=0.3V
1
2
¾
mA
IOH3
Output Source Current for C1~C8
3V
VO=2.7V
-0.6
-2.0
¾
mA
IOL3
Output Sink Current for C1~C8
3V
VO=0.3V
10
30
¾
mA
VIH1
Input High Voltage for R1~R8
3V
¾
1.9
¾
3.0
V
VIL1
Input Low Voltage for R1~R8
3V
¾
0
¾
0.8
V
VIH2
Input High Voltage for C1~C8
3V
¾
1.6
¾
3.0
V
VIL2
Input Low Voltage for C1~C8
3V
¾
0
¾
0.6
V
VIH3
Input High Voltage for AIN
3V
¾
1.5
¾
3.0
V
VIL3
Input Low Voltage for AIN
3V
¾
0
¾
0.6
V
RPH1
Input Pull-high Resistance for AIN
3V
VIN=0V
100
200
400
kW
RPL1
Input Pull-low Resistance for AIN
3V
VIN=3V
70
150
250
kW
RPL2
Input Pull-low Resistance for R1~R8
3V
VIN=3V
120
200
320
kW
RPL3
Input Pull-low Resistance for C1~C8
3V
VIN=3V
300
500
1500
kW
3V
Ta=25°C
450.45
455
459.55
kHz
fOSC
System Frequency
2.0V~
0°C < Ta < 70°C
3.6V
445.90
455
464.10
kHz
Note: fOSC specification is guaranteed by design under 0°C < Ta < 70°C and not subject to production testing.
Rev. 1.20
3
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Functional Description
Keyboard Scan
· The HT6222A keyboard form
The devices remain in the halt mode during the standby
state (at this time, the oscillator stops, and the standby
current<1mA). The HT6220A consists of 6 (8SOP) or 30
(16NSOP) active keys, HT6221A has 32 active keys,
HT6221B has 48 active keys, and the HT6222A has 64
active keys. The keyboard forms of the devices are
shown below.
C 1
C 2
R 1
K 1
R 2
K 2
R 3
R 4
C 3
C 4
C 5
C 6
C 7
C 8
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
· The HT6220A keyboard form
R 5
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 5 3
K 5 7
K 6 1
8 -p in S O P P a c k a g e
C 6
C 7
R 6
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
K 5 4
K 5 8
K 6 2
K 3 5
K 3 9
K 4 3
K 4 7
K 5 1
K 5 5
K 5 9
K 6 3
K 3 6
K 4 0
K 4 4
K 4 8
K 5 2
K 5 6
K 6 0
K 6 4
R 1
K 2 1
K 2 5
R 2
K 2 2
K 2 6
R 3
K 2 3
K 2 7
R 7
R 8
1 6 -p in N S O P P a c k a g e
C 1
C 2
C 3
C 4
C 5
R 1
K 1
K 5
K 9
K 1 3
K 1 7
R 2
K 2
K 6
K 1 0
K 1 4
K 1 8
R 3
K 3
K 7
K 1 1
K 1 5
K 1 9
R 4
K 4
K 8
K 1 2
K 1 6
K 2 0
R 5
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
When one of the keys (6, 30, 32, 48 or 64 keys) is triggered
for over 36ms, the oscillator is enabled and the chip is activated. If the key is pressed and held for 108ms or less, the
108ms transmission codes are enabled and comprised of
a header code (9ms), an off code (4.5ms), low byte address codes (9ms~18ms), high byte address codes
(9ms~18ms), 8-bit data codes (9ms~18ms), and the inverse codes of the 8-bit data codes (18ms~9ms). After the
pressed key is held for 108ms, if the key is still held down,
the transmission codes turn out to be a composition of
header (9ms) and off codes (2.24ms) only.
To avoid mistakes made by keyboard scanning or simultaneous two-key inputs (except for the three double-key
active functions (K21+K22, K21+K23, and K21+K24),
the devices are facilitated with 36ms starting time.
· The HT6221A keyboard form
C 1
C 2
C 3
C 4
C 5
C 6
C 7
C 8
R 1
K 1
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
R 2
K 2
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
R 3
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
R 4
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
The HT6220A (8SOP) and HT6221A/HT6221B/
HT6222A also provide two double-key active functions
(K21+K22 and K21+K23), and three double-key active
functions (K21+K22, K21+K23 and K21+K24) respectively for tape deck recording operations. The double-key operation rules are shown in timing 4 and timing
6.
· The HT6221B keyboard form
C 1
C 2
C 3
C 4
C 5
C 6
C 7
C 8
R 1
K 1
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
R 2
K 2
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
R 3
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
R 4
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
R 5
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 5 3
K 5 7
K 6 1
R 6
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
K 5 4
K 5 8
K 6 2
Rev. 1.20
4
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Transmission Codes
The transmission codes of the devices consist of a 9ms header code, a 4.5ms off code, 16-bit address codes
(18ms~36ms), 9ms~18ms 8-bit data codes, and the inverse code of the 8-bit data codes. The following is an illustration of
the transmission codes.
K e y - in
(K 1 ~ K 6 4 )
K e y E n a b le s
3 6 m s m in .
IR C
F o s c = 4 5 5 k H z
4 .5 m s
0 .5 6 m s
D O U T
9 m s
4 5 m s ~ 6 3 m s
(A 0 ~ A 1 5 + D 0 ~ D 7 + D 0 ~ D 7 )
9 m s
0 .5 6 m s
3 8 k H z ,
6 7 % d u ty c a r r ie r
2 .2 4 m s
9 m s
2 .2 4 m s
1 0 8 m s
1 0 8 m s
Timing 1. Output Format for the DOUT
The output code carrier of the DOUT pin is shown in Timing 2.
3 8 k H z
C a r r ie r
8 .7 7 m s
2 6 .3 m s
Timing 2. 38kHz Carrier
The transmission codes employ the PPM (Pulse Position Modulation) method to represent their two logic states by ²0²
(1.12ms) and ²1² (2.24ms) as shown in Timing 3.
3 8 k H z c a r r ie r
"Z e ro "
0 .5 6 m s
d a ta p e r io d ( 1 .1 2 m s )
3 8 k H z c a r r ie r
"O n e "
d a ta p e r io d ( 2 .2 4 m s )
Timing 3. Logic States
Rev. 1.20
5
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
· Setting the address codes (A0~A15)
The algorithm rule of the address codes (A0~A15) can be selected by mask option.
In this case, the 16-bit on-chip MASK ROM (ROM1 and ROM2) are available, and the value of ROM1 (8 bits) and
ROM2 (8 bits) are decided by one MASK LAYER. The current value of ROM1 and ROM2 are both ²00H². The A0~A7
are set by logical OR between the external switch S0~S7 and the ROM1. The A8~A15 equal some bits inverted to
A0~A7, the inversion are decided by Logical OR between the external switch S8~S15 and the ROM2.
For example:
The following is an illustration of these rules in selecting the address codes (A0~A15).
H T 6 2 2 0 A (8 S O P )
C 6
C 7
2 0 0 k W
2 0 0 k W
S 1 3
S 1 4
( S w itc h O p e n : 0 , S w itc h C lo s e : 1 )
F ill w ith z e r o a u to m a tic a lly
0
E x te r n a l S w itc h S 0 ~ S 1 5 :
0
0
O n - c h ip R O M 1 , R O M 2 :
0
0
0
0
0
0
0
0
0
0
0
b it0
0
0
0
0
b it7
b it0
0
0
0
0
0
0
0
0
1
0
S 1 3 S 1 4
0
0
0
0
b it7
S 0 ~ S 7 O R R O M 1
A 0 ~ A 7 :
0
0
A 0
A 1
0
A 2
0
A 3
0
A 4
0
A 5
0
A 6
0
A 7
A 8 '~ A 1 5 ':
A 8 ~ A 1 5 :
Rev. 1.20
0
A 0
1
A 1
1
A 2
1
A 3
1
A 4
1
A 5
0
A 6
1
6
A 7
1
0
S 8 ~ S 1 5 O R
0
0
R O M 2
0
1
0
0
C o m p le m e n t
1 : n o n in v e r s io n
0 : in v e r s io n
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
H T 6 2 2 0 A (1 6 N S O P )
A IN
C 1
C 2
C 3
C 4
C 5
2 0 0 k W ´ 5
S 8
S 9
S 1 0
S 1 1
S 1 2
1 N 4 1 4 8 ´ 5
S 0
S 1
S 2
S 3
S 4
( S w itc h O p e n : 0 , S w itc h C lo s e : 1 )
F ill w ith z e r o a u to m a tic a lly
E x te r n a l S w itc h S 0 ~ S 7 :
1
S 0
0
S 1
0
S 2
0
S 3
0
S 4
0
0
0
0
0
0
0
0
0
O n - c h ip R O M 1 , R O M 2 :
0
b it0
1
S 8
0
S 9
0
0
0
b it7
b it0
1
0
0
0
S 1 0 S 1 1 S 1 2
0
0
0
0
0
0
0
0
b it7
S 0 ~ S 4 O R R O M 1
A 0 ~ A 7 :
1
0
A 0
A 1
0
A 2
0
A 3
0
A 4
0
A 5
0
A 6
0
A 7
A 8 '~ A 1 5 ':
A 8 ~ A 1 5 :
1
A 0
1
A 1
1
A 2
0
A 3
1
A 4
1
A 5
1
A 6
1
S 8 ~ S 1 2 O R
1
0
0
A 7
1
R O M 2
0
0
0
0
C o m p le m e n t
1 : n o n in v e r s io n
0 : in v e r s io n
H T 6 2 2 1 A /H T 6 2 2 1 B /H T 6 2 2 2 A
A IN
C 1
C 2
C 3
C 4
C 5
C 6
C 7
C 8
2 0 0 k W ´ 8
S 8
S 9
S 1 0
S 1 1
S 1 2
S 1 3
S 1 4
S 1 5
1 N 4 1 4 8 ´ 8
S 0
S 1
S 2
S 3
S 4
S 5
S 6
S 7
( S w itc h O p e n : 0 , S w itc h C lo s e : 1 )
E x te r n a l S w itc h S 0 ~ S 1 5 :
O n - c h ip R O M 1 , R O M 2 :
1
S 0
0
S 1
0
S 2
0
S 3
1
S 4
1
S 5
0
S 6
0
0
0
0
0
0
0
b it0
0
S 7
1
S 8
0
S 9
0
0
0
b it7
b it0
1
0
0
1
0
0
S 1 0 S 1 1 S 1 2 S 1 3 S 1 4 S 1 5
0
0
0
0
0
0
b it7
S 0 ~ S 7 O R R O M 1
A 0 ~ A 7 :
1
0
A 0
A 1
0
A 2
0
A 3
1
A 4
1
A 5
0
A 6
0
A 7
1
A 8 '~ A 1 5 ':
A 8 ~ A 1 5 :
Rev. 1.20
A 0
1
A 1
1
A 2
0
A 3
1
A 4
0
A 5
1
7
A 6
1
A 7
1
0
S 8 ~ S 1 5 O R
1
0
R O M 2
0
1
0
0
C o m p le m e n t
1 : n o n in v e r s io n
0 : in v e r s io n
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
· Values of the data codes (D0~D7)
Table 3: Double-key data code table
The HT6220A/HT6221A/HT6221B/HT6222A contain
6 (8SOP) or 30 (16NSOP), 32, 48 and 64 active keys,
respectively. Each key corresponds to a data code.
For tape deck recording, the HT6220A (8SOP) provides two double-key and the HT6221A/HT6221B/
HT6222A provide three double-key functions. The
double-key, single-key, and double-key operation
rules are shown in Table 3, Table 4, Timing 4, Timing 5
and Timing 6.
KEY
Data Codes
D0~D6
Data Code D7
K21 + K22
1010110
0/1
K21 + K23
0110110
0/1
K21 + K24
1110110
0/1
Note: 1. D7 is defined by an external switch
2. In 8SOP package of HT6220A. The data
code D7 is set to ²1² only.
Table 4: K1~K64 single-key data code table
KEY
Data Codes
D0~D6
Data Code
D7
KEY
Data Codes
D0~D6
Data Code
D7
K1
0000 000
0/1
K33
0000 001
0/1
K2
1000 000
0/1
K34
1000 001
0/1
K3
0100 000
0/1
K35
0100 001
0/1
K4
1100 000
0/1
K36
1100 001
0/1
K5
0010 000
0/1
K37
0010 001
0/1
K6
1010 000
0/1
K38
1010 001
0/1
K7
0110 000
0/1
K39
0110 001
0/1
K8
1110 000
0/1
K40
1110 001
0/1
K9
0001 000
0/1
K41
0001 001
0/1
K10
1001 000
0/1
K42
1001 001
0/1
K11
0101 000
0/1
K43
0101 001
0/1
K12
1101 000
0/1
K44
1101 001
0/1
K13
0011 000
0/1
K45
0011 001
0/1
K14
1011 000
0/1
K46
1011 001
0/1
K15
0111 000
0/1
K47
0111 001
0/1
K16
1111 000
0/1
K48
1111 001
0/1
K17
0000 100
0/1
K49
0000 101
0/1
K18
1000 100
0/1
K50
1000 101
0/1
K19
0100 100
0/1
K51
0100 101
0/1
K20
1100 100
0/1
K52
1100 101
0/1
K21
0010 100
0/1
K53
0010 101
0/1
K22
1010 100
0/1
K54
1010 101
0/1
K23
0110 100
0/1
K55
0110 101
0/1
K24
1110 100
0/1
K56
1110 101
0/1
K25
0001 100
0/1
K57
0001 101
0/1
K26
1001 100
0/1
K58
1001 101
0/1
K27
0101 100
0/1
K59
0101 101
0/1
K28
1101 100
0/1
K60
1101 101
0/1
K29
0011 100
0/1
K61
0011 101
0/1
K30
1011 100
0/1
K62
1011 101
0/1
K31
0111 100
0/1
K63
0111 101
0/1
K32
1111 100
0/1
K64
1111 101
0/1
Note: D7 is defined by an external switch
D7=0 : connect to VDD
D7=1 : connect to VSS
Rev. 1.20
8
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
K 2 1 In p u t
K m
K 2 1
In p u t
K m
3 6 m s < t < 1 2 6 m s
3 6 m s
1 0 8 m s ( m in .)
D O U T
3 6 m s
K 2 1 c o d e tr a n s m is s io n
(a )
K 2 1 In p u t
K m
K 2 1
In p u t
K m
0 < t < 3 6 m s
N o tr a n s m is s io n
D O U T
(b )
K 2 1 In p u t
K 2 1
0 < t < 3 6 m s
K m
In p u t
K m
N o tr a n s m is s io n
D O U T
(c )
K 2 1 In p u t
K m
K 2 1
In p u t
K m
3 6 m s
3 6 m s < t < 1 2 6 m s
3 6 m s
D O U T
1 0 8 m s ( m in .)
K m
c o d e tr a n s m is s io n
(d )
Timing 4. Invalid Double-Key Input
K n In p u t
K n
3 6 m s
t > 1 0 8 m s
D O U T
K n c o d e tr a n s m is s io n
(a )
K n In p u t
K n
t < 1 0 8 m s
1 0 8 m s
3 6 m s
D O U T
K n c o d e tr a n s m is s io n
(b )
Note: Kn can be one of K1~K64
Timing 5. Valid Single-Key Input
Rev. 1.20
9
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
K 2 1 In p u t
K m
K 2 1
In p u t
K m
3 6 m s
3 6 m s
D O U T
t > 1 2 6 m s
1 0 8 m s ( m in .)
K 2 1 c o d e tr a n s m is s io n
K 2 1 + K m c o d e
tr a n s m is s io n
Note: Km can be one of K22~K24
Timing 6. Valid Double-Key Input
DOUT and IR LED
IRC
After the transmission codes are sent, the DOUT pin
generates transmission codes with a carrier, and the
IR-LED goes low to drive a transmission indicator. The
DOUT pin abbreviate exterior transistor, to provide large
current driving ability.
The frequency of the internal RC(IRC) oscillator is depending on the temperature and operating voltage.
At Ta=25°C at 3.0V, the IRC has an accuracy of ±1 per
cent. In the range of 0°C to 70°C at 2.0V~3.6V, the accuracy value of the RC frequency increases to the maximum value of ±2 per cent.
Application Circuits
HT6220A Application Circuit
V
V
D D
3 3 0 W
3
C 6
C 7
(8 S O P )
R 1
6
5
K 2 1
K 2 5
K 2 2
K 2 6
K 2 3
K 2 7
4
7
5
D O U T
H T 6 2 2 0 A
D 7
C 1
R 3
8
4 .7 W
V D D
V S S
R 2
7
In fra re d
6
2
D O U T
H T 6 2 2 0 A
3 3 0 W
L E D
4 .7 W
V D D
2 2 0 k W
4 7 m F /1 6 V
In fra re d
L E D
D D
1
C 2
1 3
2 0 0 k W ´ 5
C 3
1 2
C 4
1 1
C 5
1 0
(1 6 N S O P )
R 1
9
R 2
1 5
V S S
R 3
1 6
R 4
1
R 5
2
R 6
3
8
A IN
4
1 4
2 2 0 k W
K 1
K 5
K 9
K 1 3
K 1 7
K 2
K 6
K 1 0
K 1 4
K 1 8
K 3
K 7
K 1 1
K 1 5
K 1 9
K 4
K 8
K 1 2
K 1 6
K 2 0
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
1 N 4 1 4 8 ´ 5
Note: Typical infrared diode: EL-1L2 ( CORP.)
Rev. 1.20
10
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
HT6221A Application Circuit
V
D D
4 7 m F /1 6 V
In fra re d
1 k W
4 .7 W
L E D
1 1
6
L E D
7
5
D O U T
V D D
H T 6 2 2 1 A
D 7
C 1
C 2
1 9
2 0 0 k W ´ 8
C 3
1 8
C 4
1 7
C 5
1 6
C 6
1 5
C 7
1 4
V S S
C 8
1 3
R 1
1 2
K 1
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
K 2
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
R 2
1
R 3
2
R 4
3
1 0
A IN
4
2 0
1 N 4 1 4 8 ´ 8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)
Rev. 1.20
11
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
HT6221B Application Circuit
V
D D
4 7 m F /1 6 V
In fra re d
1 k W
4 .7 W
L E D
1 1
6
L E D
7
5
D O U T
V D D
H T 6 2 2 1 B
D 7
C 1
C 2
1 9
2 0 0 k W ´ 8
C 3
1 8
C 4
1 7
C 5
1 6
C 6
1 5
C 7
1 4
C 8
1 3
V S S
R 1
1 2
K 1
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
K 2
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 5 3
K 5 7
K 6 1
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
K 5 4
K 5 8
K 6 2
R 2
1
R 3
2
R 4
3
R 5
4
R 6
8
1 0
A IN
9
2 0
1 N 4 1 4 8 ´ 8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)
Rev. 1.20
12
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
HT6222A Application Circuit
V
D D
4 7 m F /1 6 V
In fra re d
1 k W
4 .7 W
L E D
1 3
8
L E D
9
7
D O U T
V D D
D 7
H T 6 2 2 2 A
C 1
C 2
2 1
2 0 0 k W ´ 8
C 3
2 0
C 4
1 9
C 5
1 8
C 6
1 7
C 7
1 6
C 8
1 5
R 1
1 4
K 1
K 5
K 9
K 1 3
K 1 7
K 2 1
K 2 5
K 2 9
K 2
K 6
K 1 0
K 1 4
K 1 8
K 2 2
K 2 6
K 3 0
K 3
K 7
K 1 1
K 1 5
K 1 9
K 2 3
K 2 7
K 3 1
K 4
K 8
K 1 2
K 1 6
K 2 0
K 2 4
K 2 8
K 3 2
K 3 3
K 3 7
K 4 1
K 4 5
K 4 9
K 5 3
K 5 7
K 6 1
K 3 4
K 3 8
K 4 2
K 4 6
K 5 0
K 5 4
K 5 8
K 6 2
K 3 5
K 3 9
K 4 3
K 4 7
K 5 1
K 5 5
K 5 9
K 6 3
K 3 6
K 4 0
K 4 4
K 4 8
K 5 2
K 5 6
K 6 0
K 6 4
V S S
R 2
2 3
R 3
2 4
R 4
1
R 5
2
R 6
3
R 7
4
R 8
5
1 2
A IN
6
2 2
1 N 4 1 4 8 ´ 8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)
Rev. 1.20
13
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Package Information
8-pin SOP (150mil) Outline Dimensions
5
8
A
B
4
1
C
C '
G
H
D
E
a
F
· MS-012
Symbol
A
Nom.
Max.
0.228
¾
0.244
B
0.150
¾
0.157
C
0.012
¾
0.020
C¢
0.188
¾
0.197
D
¾
¾
0.069
E
¾
0.050
¾
F
0.004
¾
0.010
G
0.016
¾
0.050
H
0.007
¾
0.010
a
0°
¾
8°
Symbol
A
Rev. 1.20
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
5.79
¾
6.20
B
3.81
¾
3.99
C
0.30
¾
0.51
C¢
4.78
¾
5.00
D
¾
¾
1.75
E
¾
1.27
¾
F
0.10
¾
0.25
G
0.41
¾
1.27
H
0.18
¾
0.25
a
0°
¾
8°
14
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
16-pin NSOP (150mil) Outline Dimensions
1 6
A
9
B
8
1
C
C '
G
H
D
E
a
F
· MS-012
Symbol
Nom.
Max.
A
0.228
¾
0.244
B
0.150
¾
0.157
C
0.012
¾
0.020
C¢
0.386
¾
0.402
D
¾
¾
0.069
E
¾
0.050
¾
F
0.004
¾
0.010
G
0.016
¾
0.050
H
0.007
¾
0.010
a
0°
¾
8°
Symbol
Rev. 1.20
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
A
5.79
¾
6.20
B
3.81
¾
3.99
C
0.30
¾
0.51
C¢
9.80
¾
10.21
D
¾
¾
1.75
E
¾
1.27
¾
F
0.10
¾
0.25
G
0.41
¾
1.27
H
0.18
¾
0.25
a
0°
¾
8°
15
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
20-pin SOP (300mil) Outline Dimensions
1 1
2 0
A
B
1
1 0
C
C '
G
H
D
E
a
F
· MS-013
Symbol
Nom.
Max.
A
0.393
¾
0.419
B
0.256
¾
0.300
C
0.012
¾
0.020
C¢
0.496
¾
0.512
D
¾
¾
0.104
E
¾
0.050
¾
F
0.004
¾
0.012
G
0.016
¾
0.050
H
0.008
¾
0.013
a
0°
¾
8°
Symbol
Rev. 1.20
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
A
9.98
¾
10.64
B
6.50
¾
7.62
C
0.30
¾
0.51
C¢
12.60
¾
13.00
D
¾
¾
2.64
E
¾
1.27
¾
F
0.10
¾
0.30
G
0.41
¾
1.27
H
0.20
¾
0.33
a
0°
¾
8°
16
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
24-pin SOP (300mil) Outline Dimensions
1 3
2 4
A
B
1 2
1
C
C '
G
H
D
E
a
F
· MS-013
Symbol
Nom.
Max.
A
0.393
¾
0.419
B
0.256
¾
0.300
C
0.012
¾
0.020
C¢
0.598
¾
0.613
D
¾
¾
0.104
E
¾
0.050
¾
F
0.004
¾
0.012
G
0.016
¾
0.050
H
0.008
¾
0.013
a
0°
¾
8°
Symbol
Rev. 1.20
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
A
9.98
¾
10.64
B
6.50
¾
7.62
C
0.30
¾
0.51
C¢
15.19
¾
15.57
D
¾
¾
2.64
E
¾
1.27
¾
F
0.10
¾
0.30
G
0.41
¾
1.27
H
0.20
¾
0.33
a
0°
¾
8°
17
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Product Tape and Reel Specifications
Reel Dimensions
D
T 2
A
C
B
T 1
SOP 8N
Symbol
Description
A
Reel Outer Diameter
B
Reel Inner Diameter
C
Spindle Hole Diameter
D
Key Slit Width
T1
Space Between Flange
T2
Reel Thickness
Dimensions in mm
330.0±1.0
100.0±1.5
13.0
+0.5/-0.2
2.0±0.5
12.8
+0.3/-0.2
18.2±0.2
SOP 16N (150mil)
Symbol
Description
A
Reel Outer Diameter
B
Reel Inner Diameter
C
Spindle Hole Diameter
D
Key Slit Width
T1
Space Between Flange
T2
Reel Thickness
Dimensions in mm
330.0±1.0
100.0±1.5
13.0
+0.5/-0.2
2.0±0.5
16.8
+0.3/-0.2
22.2±0.2
SOP 20W, SOP 24W
Symbol
Description
A
Reel Outer Diameter
B
Reel Inner Diameter
C
Spindle Hole Diameter
D
Key Slit Width
T1
Space Between Flange
T2
Reel Thickness
Rev. 1.20
Dimensions in mm
330.0±1.0
100.0±1.5
13.0
+0.5/-0.2
2.0±0.5
24.8
+0.3/-0.2
30.2±0.2
18
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Carrier Tape Dimensions
P 0
D
P 1
t
E
F
W
C
D 1
B 0
P
K 0
A 0
R e e l H o le
IC
p a c k a g e p in 1 a n d th e r e e l h o le s
a r e lo c a te d o n th e s a m e s id e .
SOP 8N
Symbol
Description
Dimensions in mm
12.0
+0.3/-0.1
W
Carrier Tape Width
P
Cavity Pitch
8.0±0.1
E
Perforation Position
1.75±0.1
F
Cavity to Perforation (Width Direction)
5.5±0.1
D
Perforation Diameter
1.55±0.1
D1
Cavity Hole Diameter
P0
Perforation Pitch
4.0±0.1
P1
Cavity to Perforation (Length Direction)
2.0±0.1
A0
Cavity Length
6.4±0.1
B0
Cavity Width
5.2±0.1
K0
Cavity Depth
2.1±0.1
t
Carrier Tape Thickness
C
Cover Tape Width
1.50
+0.25/-0.00
0.30±0.05
9.3±0.1
SOP 16N (150mil)
Symbol
Description
Dimensions in mm
W
Carrier Tape Width
16.0±0.3
P
Cavity Pitch
8.0±0.1
E
Perforation Position
1.75±0.1
F
Cavity to Perforation (Width Direction)
D
Perforation Diameter
1.55
+0.10/-0.00
D1
Cavity Hole Diameter
1.50
+0.25/-0.00
P0
Perforation Pitch
4.0±0.1
P1
Cavity to Perforation (Length Direction)
2.0±0.1
A0
Cavity Length
6.5±0.1
B0
Cavity Width
10.3±0.1
K0
Cavity Depth
2.1±0.1
7.5±0.1
t
Carrier Tape Thickness
0.30±0.05
C
Cover Tape Width
13.3±0.1
Rev. 1.20
19
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
SOP 20W
Symbol
Description
Dimensions in mm
24.0
+0.3/-0.1
W
Carrier Tape Width
P
Cavity Pitch
12.0±0.1
E
Perforation Position
1.75±0.10
F
Cavity to Perforation (Width Direction)
11.5±0.1
D
Perforation Diameter
1.5
1.50
+0.1/-0.0
+0.25/-0.00
D1
Cavity Hole Diameter
P0
Perforation Pitch
P1
Cavity to Perforation (Length Direction)
2.0±0.1
A0
Cavity Length
10.8±0.1
B0
Cavity Width
13.3±0.1
K0
Cavity Depth
3.2±0.1
4.0±0.1
t
Carrier Tape Thickness
0.30±0.05
C
Cover Tape Width
21.3±0.1
SOP 24W
Symbol
Description
Dimensions in mm
W
Carrier Tape Width
24.0±0.3
P
Cavity Pitch
12.0±0.1
E
Perforation Position
1.75±0.1
F
Cavity to Perforation (Width Direction)
D
Perforation Diameter
1.55
+0.10/-0.00
D1
Cavity Hole Diameter
1.50
+0.25/-0.00
P0
Perforation Pitch
4.0±0.1
P1
Cavity to Perforation (Length Direction)
2.0±0.1
A0
Cavity Length
10.9±0.1
B0
Cavity Width
15.9±0.1
K0
Cavity Depth
3.1±0.1
11.5±0.1
t
Carrier Tape Thickness
0.35±0.05
C
Cover Tape Width
21.3±0.1
Rev. 1.20
20
October 12, 2010
HT6220A/HT6221A/HT6221B/HT6222A
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
Holtek Semiconductor Inc. (Taipei Sales Office)
4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan
Tel: 886-2-2655-7070
Fax: 886-2-2655-7373
Fax: 886-2-2655-7383 (International sales hotline)
Holtek Semiconductor Inc. (Shenzhen Sales Office)
5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057
Tel: 86-755-8616-9908, 86-755-8616-9308
Fax: 86-755-8616-9722
Holtek Semiconductor (USA), Inc. (North America Sales Office)
46729 Fremont Blvd., Fremont, CA 94538, USA
Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holtek.com
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.20
21
October 12, 2010