AN1946 - Intersil

Application Note 1946
ISL78268EVAL1Z Evaluation Board User Guide
Introduction
Key Features
ISL78268 is an automotive grade synchronous buck controller
with the 2-A sourcing/3-A sinking Integrated MOSFET Drivers.
The device supports the wide input supply voltage range of 5V
to 55V for full operation and protected up to 60V when not
switching. The ISL78268EVAL1Z is a fully configured buck
converter evaluation board with ISL78268, MOSFETS, an
inductor, current sense resistors and other necessary
components. The evaluation board has been designed to
quickly evaluate the various features and performance of the
ISL78268.
• Wide operational input voltage range up to 55V (switching),
withstand 60V (non-switching)
• Average output constant current limiting
• Selectable diode emulation mode or forced PWM mode
• Selectable switching clock source: internal or external
• Low shutdown current: IQ <10µA
• Selectable latch-off or hiccup mode fault response
• Comprehensive fault protections:
- Input and output overvoltage protection
- Cycle-by-cycle overcurrent limit (OC1) and
protection (OC2)
- Average current overcurrent protection
- Over-temperature protection
Specification (Default Setting)
• VIN = 14V to 55V
• VOUT = 12V
• VIN overvoltage protection = 58V (rising threshold to trigger
hiccup or latch-off)
• Monitor test points for key signals
• Output overcurrent limit 1 (OC1: cycle-by-cycle) = 9.3A
Reference
• Output overcurrent limit 2 (OC2: hiccup/latch-off) = 12.4A
• Output average constant current limit = 4.05A (if activated)
• ISL78268 Datasheet
• Switching frequency = 300kHz
Ordering Information
• Peak efficiency > 95% (VIN = 15V/ IOUT = 4A)
PART NUMBER
ISL78268EVAL1Z
DESCRIPTION
ISL78268 Evaluation Board
J12: VCC
J1: VIN
J28
J4
J9
VCC
J2: GND
J10: EN
VIN
EN
ISEN1P
ISEN1N
J16
IMON/DE:
VCC
VCC = FORCED PWM MODE
W/O ACL
GND = DE MODE W/O ACL
0V~2V = DE MODE W/ ACL
J11: IMON/DE
J8: IMON/DE
PVCC
J21: PVCC
IMON/DE
BOOT
J20: PHASE
J17: FSYNC
UG
FSYNC
J15
PLL_COMP
ISL78268
J26: VOUT
PH
J24
LG
J7: COMP
J18
COMP
ISEN2P
J27: GND
J22
VCC
ISEN2N
SLOPE
J23
HIC/LATCH : CONNECT TO
VCC FOR LATCH-OFF
MODE OR GND FOR
HICCUP MODE
J13: HIC/LATCH
J5: FB
FB
HIC/LATCH
VCC
PGOOD
J14: PGOOD
J6: SS
SS
SGND
PGND
CLKOUT
J19: CLKOUT
FIGURE 1. ISL78268EVAL1Z BLOCK DIAGRAM
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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All other trademarks mentioned are the property of their respective owners.
Application Note 1946
Functional Description
The ISL78268 is a high voltage synchronous buck controller with
integrated 2A source/3A sink MOSFET drivers. The device
operates over a wide input voltage range, 5V to 55V, and
withstands up to 60V. The full synchronous operation of
ISL78268 enables high conversion efficiency in continuous
conduction mode. Also, the device provides Diode Emulation
mode (DE mode) for efficiency improvement in light load
operation. The ISL78268 also provides comprehensive
protection features of input and output overvoltage,
cycle-by-cycle peak current limiting, average output current
limiting and thermal protection.
The ISL78268EVAL1Z evaluation board is shown in Figures 2
and 3. The board supports quick evaluation of various features of
the ISL78268. The ISL78268EVAL1Z’s default configuration is
for 12V at VOUT, with a peak current limit (OC1: cycle-by-cycle) of
9.3A, peak current protection (OC2: hiccup/ latch-off) 12.4A, and
an average current limit of 4A.
The operation mode of DE mode or Forced PWM mode is
selectable by the connection of IMON/DE pins. The fault
response of hiccup or latch-off is selected by the connection of
HIC/LATCH pin. Voltage or waveforms of key signals such as VCC,
SS, FB, COMP, EN, CLKOUT, PH etc., are pulled out to the monitor
pins for easy measurement. Table 1 shows more details of
connector/monitor-pin descriptions.
Figure 4 shows the schematics of this evaluation board and
Table 3 shows its BOM list. The layout information of the board
are shown in Figures 5 through 10.
limited by the minimum on time of high-side MOSFET
(tMINON_UG) which is 300ns(typ).
• The operation mode of DE mode or Forced PWM mode is
selectable by the connection of IMON/DE pins.
• The fault response of hiccup or latch-off is selected by the
connection of HIC/LATCH pin.
• The average output current limit can be adjusted by replacing
the resistor connected to IMON/DE pin (R4). For the setting of
the average current limit, please refer to “Current Sensing” and
“Average Constant Current Control” sections in the ISL78268
datasheet.
• The cycle-by-cycle peak current limit can be changed by
replacing the current sense resistor (R10) and/or gain set
resistor (R8+R9). Please refer to “Current Sensing” and “Cycleby-Cycle Peak Overcurrent Limiting/Protection” sections in
ISL78268 datasheet for the detailed relation between R10
and/or R8+R9 and peak current limit.
PCB Layout Guideline
The ISL78268EVAL1Z layout is optimized for electrical and
thermal performances. Key considerations are:
• Most of switching nodes are patterned on the top layer with
simple and short routing.
• 4x4 pattern of 300µm vias under the ISL78268 thermal pad
are connected to large copper GND planes (layers 2, 3 and 4)
for effective thermal performances.
Figures 11 through 24 show the performance data taken with
this evaluation board with default configuration.
• Maximize the copper layers of the Power Transistor Drain node
by connecting each layers with multiple via for the effective
thermal performances.
Operating Range
• Place the input ceramic capacitor as close as possible to the
VIN pin.
The default configuration is shown in “Specification (Default
Setting)” on page 1.
• Place the ceramic capacitor as close as possible to minimize
the ringing associated by the parasitic inductance and
capacitance in the high current transition loop.
The board setting can be changed by changing the connections
of setting pins or replacing the resistors and/or capacitors
populated on the board. Some examples are described as
follows:
• The switching frequency on the ISL78268EVAL1Z is fixed at
300kHz. To change the frequency, replace the R18 which is
connected between FSYNC and GND. Please refer to the
“Internal Clock Frequency Setting” section in Datasheet for
detail. Also, the clock can be synchronized with the external
clock source by input square wave at FSYNC pin. The external
clock frequency range will be 50kHz to 1.1MHz.
• Keep the traces of current sense lines symmetric as much as
possible to avoid the offset and noise injection.
• The board size is 2.65 in. x 2.85 in. with 4-layers and 2oz
copper.
• The output voltage of ISL78268EVAL1Z is fixed at 12V in
default setting. This can be changed by replacing feedback
resistor R1. When changing the feedback resistor, the
minimum input voltage on the board will be changed
accordingly. If changing the output voltage, be careful because
the minimum input voltage will be limited by the high-side
MOSFET minimum off time (tMINOFF_UG) of the ISL78268,
which is 285ns (typ). Also, the maximum input voltage will be
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Application Note 1946
ISL78268EVAL1Z Evaluation Board
J1: VIN
J2: GND
J28: VIN - EN
J12: GND - VCC
J6: GND - SS
J11: IMON/DE - VCC
J20: PHASE- GND
J5 GND - FB
J7: GND - COMP
J8: GND - IMONDE
J17: GND - FSYNC
J10: GND - EN - VIN
J19: GND - CLKOUT
J13: VCC - HIC/LATCH - GND
J26: VOUT
J27: GND
FIGURE 2. TOP VIEW
FIGURE 3. BOTTOM VIEW
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Application Note 1946
Connector/Monitor-pin Description
Table 1 shows the jumper/terminal configuration of the ISL78268EVAL1Z.
TABLE 1. ISL78268EV1ZB CONNECTOR/MONITOR-PIN DESCRIPTION
CONNECTOR/
TERMINAL
SIGNAL NAME
DESCRIPTIONS
J1
VIN
Positive input terminal of the system.
J2
GND
Negative input terminal of the system (ground).
J3-1
PGOOD
PGOOD monitor pin
J3-2
GND
GND
J3-3
GND
GND
J3-4
HIC/LATCH
HIC/LATCH monitor pin
J4
VIN - GND
Test point to monitor VIN input voltage (Do Not short with jumper).
J5
FB - GND
Test point to monitor FB voltage (Do Not short with jumper).
J6
SS - GND
Test point to monitor SS voltage (Do Not short with jumper).
J7
COMP - GND
Test point to monitor COMP voltage (Do Not short with jumper).
J8
IMON/DE - GND
Test point to monitor IMON/DE voltage.
Default setting, a jumper is populated at J8 (shorted to GND) and average current limit is disabled.
To activate 4A average current limit feature, remove J8.
To adjust the average current limit level, replace resistor (R4) between IMON/DE and GND. (Do Not short both J8
and J11 with jumper at same time).
J9
ISEN1P - GND
Test Point to monitor ISEN1P waveform. (Do Not short with jumper) For accurate monitoring of the voltage
difference between ISEN1P and ISEN1N, place a differential probe between Pin 2 of J9 and Pin 2 of J16.
J10
GND - EN - VIN
EN signal input terminal. Connect an external enable signal (no higher than VCC voltage) between Pin 1 and Pin 2
of J10 to manually enable/disable the system.
STATUS
MIN VOLTAGE FOR EN PIN*
(V)
MAX VOLTAGE FOR EN PIN*
(V)
ISL78268 Enabled
1.2
VCC Voltage
ISL78268 Disabled
0
1.1
*All voltages in this table are relative to potential at GND (J2). If J28 is shorted with a jumper, short between Pin
2 and Pin 3 of J10 to enable the system automatically when VIN is applied.
J11
IMON/DE -VCC
Short with jumper to make the system operate with Forced PWM mode. Diode Emulation Mode (DE mode) will be
disabled (Do Not short both J8 and J11 with jumper at same time).
J12
VCC - GND
Test point to monitor the VCC voltage (Do Not short with jumper).
J13
GND - HIC/LATCH –
VCC
Protection operation mode (hiccup/latch-off) selection pins. Connect to VCC with jumper for hiccup operation or
short to GND for latch-off operation (Do Not short both side at the same time).
J14
PGOOD - GND
Test point to monitor PGOOD output (Do Not short with jumper).
J15
PH - UG
Test point to monitor the gate voltage (Gate-to-Source voltage) of the high side transistor (Do Not short with
jumper).
J16
ISEN1N - GND
Test point to monitor ISEN1N waveform. (Do Not short with jumper) For accurate monitoring of the voltage
difference between ISEN1P and ISEN1N, place a differential probe between Pin 2 of J9 and Pin 2 of J16.
J17
FSYNC - GND
External synchronization clock input terminal or test point for the FSYNC pin voltage (Do Not short with jumper).
J18
LG - GND
Test point to monitor the gate voltage of the low side transistor (Do Not short with jumper).
J19
CLKOUT - GND
Test point to monitor the output clock (Do Not short with jumper).
J20
PHASE - GND
Test point to monitor the PHASE waveform (Do Not short with jumper).
J21
PVCC - GND
Test point to monitor the internal LDO output voltage (PVCC) (Do Not short with jumper).
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Application Note 1946
TABLE 1. ISL78268EV1ZB CONNECTOR/MONITOR-PIN DESCRIPTION (Continued)
CONNECTOR/
TERMINAL
SIGNAL NAME
DESCRIPTIONS
J22
ISEN2P - GND
Test point to monitor ISEN2P waveform (Do Not short with jumper). For accurate monitoring of the voltage
difference between ISEN2P and ISEN2N, place a differential probe between Pin 2 of J22 and Pin 2 of J23.
J23
ISEN2N - GND
Test point to monitor ISEN2N waveform (Do Not short with jumper). For accurate monitoring of the voltage
difference between ISEN2P and ISEN2N, place a differential probe between Pin 2 of J22 and Pin 2 of J23.
J24
VOUT - GND
Test point to monitor the output voltage (VOUT) (Do Not short with jumper).
J26
VOUT
Positive terminal of buck regulator output (Do Not short with jumper).
J27
GND
Negative terminal of buck regulator output. (ground).
J28
EN - VIN
To enable the system automatically when VIN is applied, short J28 with a jumper and also short between Pin 2 and
Pin 3 of J10.
Quick Start Guide
Setup of Test Equipment
• Prepare 2 Power Supplies, 1 Electric Load, 4 Digital
Multimeters (DMM) and 1 Oscilloscope.
- The first power supply (VIN Power Supply) will be used for
the VIN power rail and should have the capability to supply
up to 60V/5A.
- The second power supply (EN Power Supply) will be used to
supply bias for EN and should have the capability to supply
5V/0.5A. This power supply is not necessary if EN is
connected to VIN with J28 and J10.
- The Electric Load (or Resistive Load) will be used as the load
for VOUT and should have a capability to sink up to 20A.
- The DMMs will be used to monitor the output voltage, the
output current, the input voltage and the input current.
• External Connections
- Connect the VIN Power Supply between VIN(J1) and GND(J2).
- Connect the EN Power Supply (if used) between EN and GND
(J28-center and GND side).
- Connect the Electric Load between VOUT(J26) and GND(J27).
- Place the DMMs appropriately where the parameters are to
be measured. The input and output voltage can be measured
using J4 and J24. The input and output current should be
monitored in series with the respective positive terminals of
VIN and VOUT.
NOTE: To measure the voltage of high current nodes, it is recommended to
use Kelvin connection to avoid the effect of parasitic resistances of the
connections. These connections are supplied at J4 and J24.
• Recommended Power Supply and Load set up
- Set the EN Power Supply voltage to 3.3V. At this time, the
power supply output should remain off.
- Set the VIN Power Supply voltage to 36V (15V~55V). At this
time, the power supply output should remain off.
- Set the Electric Load to 0A. At this time, the load should
remain off.
Measurement Setup
On the ISL78268 Evaluation Board, user can select the following
operation modes; fault response (Hiccup or Latch-off), switching
mode (Diode Emulation mode or Forced PWM mode) and
Average Current Limit (ACL) by changing the connection of the
HIC/LATCH and IMON/DE jumper pins. Table 2 on page 6 shows
the detailed jumper pin settings for different operation modes.
Three typical operation modes examples are shown as follows:
1. Diode Emulation Mode Enabled/Hiccup Mode Enabled/ACL
disabled
• Short a jumper between HIC/LATCH and VCC at J13 to set
to Hiccup Mode
• Short a jumper between IMON/DE and GND at J8 to
disable the Average Current Limit
• Ensure the jumper between IMON/DE and VCC at J11 is
removed (open) to operate in DE Mode
1.1. Power-up and Initial Confirmation
• Turn on the output of VIN Power Supply. Keep EN
Power Supply output off.
- Keep the Electric Load off
- Confirm the voltage applied to VIN of the evaluation
board is correct.
- Confirm the supply current of VIN Power Supply is
less than 3µA.
- Sweep VIN from 15V to 55V
• Confirm the supply current of VIN Power supply is
less than 10µA at all input voltages.
- Set VIN Power Supply to 36V (or desired voltage)
and enable the output of the EN Power Supply.
• Keep the electric load off.
• Confirm the evaluation board output voltage is 12V.
• Confirm the PVCC voltage is 5.2V.
• Confirm the supply current of VIN Power Supply is
approximately 5mA.
• Confirm the frequency of the output clock from
CLKOUT (J19) is approximately 300kHz and the
pulse width is approximately 270ns.
• Confirm the pulse skipping switching at PHASE
node (J20).
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Application Note 1946
1.2. Functional Confirmation and Measurement
• Normal Operation with DE Mode operation at light
load.
- Set the VIN Power Supply to the desired input
voltage, then turn on electric load and set the load
current at desired value.
- Confirm the Evaluation Board output voltage,
output current, input current, efficiency, operation
mode etc.
• Overcurrent Protection.
- Set the VIN Power Supply to the desired input
voltage and sweep the load current from 0A.
- Confirm that at the OC1 level, On-duty becomes
shorter and VOUT starts to drop. Continue to
increase the current and confirm the device
triggered into Hiccup operation.
2. DE Mode Enabled/Hiccup Mode Enabled/ACL Enabled
pin voltage reaches 1.6V, ACL will be triggered. While in
ACL, On-duty becomes shorter and output voltage drops to
keep the output current at the same level.
• Turn off the VIN power supply.
3. Forced PWM Mode Enabled/Latch-off Mode Enabled/ACL
Disabled
• Short a jumper between HIC/LATCH and GND at J13 to set
to latch-off mode.
• Remove a jumper between IMON/DE and GND at J8.
• Short a jumper between IMON/DE and VCC at J11 to
operate in forced PWM mode. In forced PWM mode, the
device always operates in full synchronous mode. In light
load condition, the negative current from VOUT to VIN will
be observed.
• Enable the system as in 1.1.
• Confirm the Input voltage, output voltage, load current,
operation mode and OC2 functionality etc. When Latch-off
is triggered, the device stops switching and keeps
switching off until the EN or VIN is toggled.
• Short a jumper between HIC/LATCH and VCC at J13 to set
to Hiccup Mode.
• Remove a jumper between IMON/DE and GND at J8 to
enable the Average Current Limit.
• Keep jumper between IMON/DE and VCC at J11 open to
operate in DE Mode.
• Turn off the VIN power supply.
4. For more combinations of mode settings, please refer to
Table 2.
• Enable the system as in 1.1.
• Confirm the Input voltage, Output voltage, Load current,
operation mode and ACL functionality etc. When IMON/DE
TABLE 2. ISL78268EV1Z MODE SETTING EXAMPLE
SETTING EXAMPLE
CONNECTOR/
TERMINAL
SIGNAL NAME
INTERNAL CLOCK/
HICCUP/
DE MODE/
ACL ENABLED
(DEFAULT SETTING)
INTERNAL CLOCK/
HICCUP/
DE MODE/
ACL DISABLED
INTERNAL CLOCK/
LATCH-OFF/
FORCED PWM/
ACL DISABLED
SYNC WITH EXT
CLOCK/ HICCUP/
FORCED PWM/
ACL DISABLED
SYNC WITH EXT
CLOCK/
LATCH-OFF/
DE MODE/
ACL ENABLED
J1
VIN
VIN +
VIN +
VIN +
VIN +
VIN +
J2
GND
VIN - (GND)
VIN - (GND)
VIN - (GND)
VIN - (GND)
VIN - (GND)
J3
PGOOD - GND Open
GND - HIC/LATCH
Open
Open
Open
Open
J4
VIN - GND
Open
Open
Open
Open
Open
J5
FB - GND
Open
Open
Open
Open
Open
J6
SS - GND
Open
Open
Open
Open
Open
J7
COMP -GND
Open
Open
Open
Open
Open
J8
IMON/DE - GND
Open
(J11 Open = ACL
Enabled and DE
mode selected)
Open (J11 Short to
Short to GND
(J11 Open = DE mode VCC = ACL Disabled
and Forced PWM
selected)
mode selected)
Open (J11 Short to
VCC = ACL Disabled
and Forced PWM
mode selected)
Open (J11 Open =
ACL Enabled and DE
mode selected)
J9
ISEN1P - GND
Open
Open
Open
Open
Open
J10
EN
Connect to Ext. EN
signal for external
On/Off control.
Or, short J28 to VCC
and short J10 Pin 2-3
for self start-up when
VIN applied.
Connect to Ext. EN
signal for external
On/Off control.
Or, short J28 to VCC
and short J10 Pin 2-3
for self start-up when
VIN applied.
Connect to Ext. EN
signal for external
On/Off control.
Or, short J28 to VCC
and short J10 Pin 2-3
for self start-up when
VIN applied.
Connect to Ext. EN
signal for external
On/Off control.
Or, short J28 to VCC
and short J10 Pin 2-3
for self start-up when
VIN applied.
Connect to Ext. EN
signal for external
On/Off control.
Or, short J28 to VCC
and short J10 Pin 2-3
for self start-up when
VIN applied.
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Application Note 1946
TABLE 2. ISL78268EV1Z MODE SETTING EXAMPLE (Continued)
SETTING EXAMPLE
CONNECTOR/
TERMINAL
J11
SIGNAL NAME
INTERNAL CLOCK/
HICCUP/
DE MODE/
ACL ENABLED
(DEFAULT SETTING)
INTERNAL CLOCK/
HICCUP/
DE MODE/
ACL DISABLED
SYNC WITH EXT
CLOCK/ HICCUP/
FORCED PWM/
ACL DISABLED
SYNC WITH EXT
CLOCK/
LATCH-OFF/
DE MODE/
ACL ENABLED
IMON/DE -VCC
Open
(DE mode)
J12
VCC - GND
Open
Open
Open
Open
Open
J13
GND - HIC/LATCH - Short to VCC
VCC
(Hiccup mode)
Short to VCC
(Hiccup mode)
Short to GND
(Latch-off mode)
Short to VCC
(Hiccup mode)
Short to GND
(Latch-off mode)
J14
PGOOD - GND
Open
Open
Open
Open
J15
PHASE - UG
Open
Open
Open
Open
Open
J16
ISEN1N - GND
Open
Open
Open
Open
Open
Open
Open
(DE mode)
INTERNAL CLOCK/
LATCH-OFF/
FORCED PWM/
ACL DISABLED
Short to VCC
Short to VCC
Open
(Forced PWM mode) (Forced PWM mode) (DE mode)
J17
FSYNC - GND
Open
Open
Open
Open
Open
J18
LG - GND
Open
Open
Open
Open
Open
J19
CLKOUT - GND
Open
Open
Open
Open
Open
J20
PHASE - GND
Open
Open
Open
Open
Open
J21
PVCC - GND
Open
Open
Open
Open
Open
J22
ISEN2P - GND
Open
Open
Open
Open
Open
J23
ISEN2N - GND
Open
Open
Open
Open
Open
J24
VOUT - GND
Open
Open
Open
Open
Open
J26
VOUT
Positive Terminal of
Load
Positive Terminal of
Load
Positive Terminal of
Load
Positive Terminal of
Load
Positive Terminal of
Load
J27
GND
Negative Terminal of Negative Terminal of Negative Terminal of Negative Terminal of Negative Terminal of
Load
Load
Load
Load
Load
J28
EN - VIN
Open
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Open
Open
Open
Open
AN1946.0
July 7, 2014
R12
Q2
AON6246
3
2
1
R15
243
E
J19
2
10k
R20
J13
1
3
2
E
1
C20
1000pF
VCC
E
100pF
EN
C11
J24
2
+12V
VOUT
1
C32
0.022µF
10µF
10µF
C30
10µF
C26
68µF
C29
2
1
DNP
C31
C28
1
2
243
DNP
R28
R24
R23
D1
2
1
BAT46W-V
2
UG
PHASE
LG
PVCC
GND
FIGURE 4. SCHEMATIC
J21
13
0.22µF
1
14
C21
15
C22
4.7µF
BOOT
19
15
R16
CLKOUT
E
3
J10
1
2
6800pF 3.24k
C17
100k
10k
R7
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E
VIN
ISEN1P 21
20
10 PLLCOMP
11
HIC/LATCH
12
CLKOUT
EN
9
E
16
HIC/LATCH
PLL_COMP
R19
R18
1
2
J28
R6
ISEN1N
23
ISEN2N 22
24
VCC
ISEN2P
SGND
FSYNC
8
FSYNC 7
2
E
J17
J11
VIN
18
17
E
E
40.2k
2 VCC
1
1
E
J14
10k
1 SLOPE
BOOT
2
FB
UG
U1
3
PH
COMP
ISL78268ARZ
4
LG
SS
5 IMON/DE
PVCC
6 PGOOD
PGND
EP
25
2
VCC R11
DNP
GND
J27
GND
OUT
100pF
E
E
J23
ISEN2N R29
422
1
2
422
R25
ISEN2P
1
ISEN2P
ISEN2N
ISEN1P
ISEN1N
C15
1µF
J12
2
1
R13
0.1µF
1
2
J8
0.1µF
C19
E
1
E
C18
0.022µF
E 27.4k
FB
COMP
SS
IMON/DE
PGOOD
130k
C12
+
C27
220pF
2
422
1
2
J16
ISEN1N R17
422
ISEN1P R9
J22
R8
182k
R3
C4
28k
1
2
J5
R2
E
R14
10
0.01µF
R4
C25
100pF
E
E
OPEN DNP
PVCC
6800pF 10k
E
1 J6 2
C9
E
J3
C24
E
VCC
C10
100pF
C7
R5
E
PGOOD
GND
GND
HIC/LATCH
2
+
E
E
E
VIN
1
J26
0.005
4.7µH
E
E
J7
1
2
3
4
C16
R27
2
E
Application Note 1946
E
VOUT
1
2
J18
E
OUT
VOUT
100pF
2
1
J9
E
C14
220pF
100pF
GND
OUT
R1
243
C13
R22
3
2
1
C23
4
8
E
LG
R21
Q4
4
AON6246
Q3
DNP
GND
1
OPEN DNP
J20
1
2
0
2
DNP
L1
PHASE
8
7
6
5
0.1µF
1µF
100V
C8
1µF
C6
0.1µF
C5
+
DNP
C3
1
220µF
C2
2
1
2
C1
2
1
+
Q1
DNP
1
2
3
5
6
7
8
0.005
8
7
6
5
R10
1
4
VIN
L2
1
2
1
2
3
5
6
7
8
OUT
243
R26
4
0
VIN
J15
UG
J4
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ISL78268EVAL1Z Schematic
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TABLE 3. ISL78268EVAL1Z BUILD OF MATERIALS LIST
REFERENCE DESIGNATOR QTY UNITS
COMPONENT
TYPE
VALUE
RATING
ACCURACY
(%)
TYPE
SIZE
OTHER DESCRIPTION
MANUFACTURER
MANUFACTURER PART
9
IMAGINEERING INC ISL78268EVAL1ZREVBPCB
0603
SMD, ROHS
TDK
C1608X7R1C105K
X7R
0805
SMD, ROHS
MURATA
GRM21BR71C475KA73L
5
C0G
0603
SMD, ROHS
PANASONIC
ECJ-1VC2A101J
50V
5
C0G
0603
SMD, ROHS
PANASONIC
ECJ-1VC1H101J
Capacitor,
Ceramic
1000pF 25V
10
X7R
0603
SMD, ROHS
AVX
08053C102KAT2A
ea.
Capacitor,
Ceramic
0.01µF
50V
10
X7R
0603
SMD, ROHS
MURATA
GRM39X7R103K050
1
ea.
Capacitor,
Ceramic
0.1µF
25V
10
X7R
0603
SMD, ROHS
MURATA
GRM39X7R104K025AD
C14, C25
2
ea.
Capacitor,
Ceramic
220pF
50V
10
X7R
0603
SMD, ROHS
MURATA
GRM188R71H221KA01D
C19, C32
2
ea.
Capacitor,
Ceramic
0.022µF 100V
10
X7R
0603
SMD, ROHS
VENKEL
C0603X7R101-223KNE
C21
1
ea.
Capacitor,
Ceramic
0.22µF
16V
10
X7R
0603
SMD, ROHS
TDK
C1608X7R1C224K
C7, C17
2
ea.
Capacitor,
Ceramic
6800pF 50V
10
X7R
0603
SMD, ROHS
AVX
06035C682KAT9A
C3, C8, C18
3
ea.
Capacitor,
Ceramic
0.1µF
100V
10
X7R
0805
SMD, ROHS
TDK
C2012X7R2A104K
C5, C6
2
ea.
Capacitor,
Ceramic
1.0µF
100V
10
X7R
1206
SMD, ROHS
VENKEL
C1206X7R101-105KNE
C26, C30, C31
3
ea.
Capacitor,
Ceramic
10µF
16V
10
X5R
1206
SMD, ROHS
VENKEL
C1206X5R160-106KNE
(Pb-Free)
C4
0
ea.
Capacitor,
Ceramic
not
placed
0603
SMD, Not Placed, Place-Holder
for type-3 compensation, ROHS
C23
0
ea.
Capacitor,
Ceramic
not
placed
0603
SMD, Not Placed, Place-Holder,
ROHS
C28
1
ea.
Capacitor,
68µF
Alum. Polymer
8x11.5
RADIAL, 24mΩ, ROHS
UNITED CHEMI-CON APS-250ELL680MHB5S
C1
1
ea.
Capacitor,
Alum.
Electrolytic
RADIAL, ROHS
UNITED CHEMI-CON EKZE800ELL221MK20S
1
ea.
PCB
C15
1
ea.
Capacitor,
Ceramic
1.0µF
16V
10
X7R
C22
1
ea.
Capacitor,
Ceramic
4.7µF
16V
10
C13, C16, C24, C27
4
ea.
Capacitor,
Ceramic
100pF
100V
C10, C11
2
ea.
Capacitor,
Ceramic
100pF
C20
1
ea.
C9
1
C12
220µF
25V
20
Alum.
Polymer
80V
20
12.5x20
Alum.
Electrolyti
c
Application Note 1946
AN1946.0
July 7, 2014
PWB-PCB,
ISL78268EVAL1Z-REVB,
ROHS
ISL78268EVAL1Z REV. B
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TABLE 3. ISL78268EVAL1Z BUILD OF MATERIALS LIST (Continued)
REFERENCE DESIGNATOR QTY UNITS
C2,C29
0
ea.
COMPONENT
TYPE
Capacitor
VALUE
RATING
ACCURACY
(%)
TYPE
SIZE
Not
Placed
1
ea.
Inductor
6.8µH
L2 (HC9-100-R)
0
ea.
Inductor
Not
Placed
D1
1
ea.
DiodeSchottky
U1
1
ea.
IC
Q2, Q4
2
ea.
Transistor,
NMOS
Q1,Q3
0
ea.
Transistor,
NMOS
R22
0
ea.
R14
1
R16
1
MANUFACTURER
MANUFACTURER PART
Not Placed. Place-holder for
additional input and output cap
20
7.5x7.2
SMD, 17.84mΩ, ROHS
COILCRAFT
XAL7070-682MEB
Not Placed. Place-holder for
other Inductor
SMD, ROHS
DIODES INC.
BAT46W-7-F
4x4,
24-pin QFB
ISL78268-Synchronous Buck
Regulator, ROHS
INTERSIL
ISL78268ARZ
5x6,
8-pin DFN
ROHS
ALPHA and OMEGA AON6246
SEMICONDUCTOR
Not
Placed
5x6,
8-pin DFN
Not Placed. Place-holder for
additional NMOS-FET
Resistor
Not
placed
0805
SMD, Not Placed
ea.
Resistor
10Ω
1/10W
1
Thick Film 0603
SMD, ROHS
KOA
RK73H1JT10R0F
ea.
Resistor
15Ω
1/10W
1
Thick Film 0603
SMD, ROHS
YAGEO
RC0603FR-0715RL
Thick Film 0603
SMD, ROHS
VENKEL
CR0603-10W-000T
1
Thick Film 0603
SMD, ROHS
KOA
RK73H1JT1002F
10
SOD-123
100V
200m
W
60V,
80A
R12, R21
2
ea.
Resistor
0Ω
1/10W
R5, R7, R11, R20
4
ea.
Resistor
10kΩ
1/10W
R4
1
ea.
Resistor
130kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
PANASONIC
ERJ-3EKF1303V
R1
1
ea.
Resistor
182kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
YAGEO
RC0603FR-07182KL
R8, R15, R24, R28
4
ea.
Resistor
243Ω
1/10W
1
Thick Film 0603
SMD, ROHS
YAGEO
RC0603FR-07243RL
R13
1
ea.
Resistor
27.4kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
PANASONIC
ERJ-3EKF2742V
R2
1
ea.
Resistor
28kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
VENKEL
CR0603-10W-2802FT
R19
1
ea.
Resistor
3.24kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
PANASONIC
ERJ-3EKF3241V
R18
1
ea.
Resistor
40.2kΩ
1/10W
1
Thick Film 0603
SMD, ROHS
YAGEO
RC0603FR-0740K2L
R9, R17, R25, R29
4
ea.
Resistor
422Ω
1/10W
1
Thick Film 0603
SMD, ROHS
PANASONIC
ERJ-3EKF4220V
AN1946.0
July 7, 2014
R6
1
ea.
Resistor
100kΩ
1/8W
1
Thick Film 0805
SMD, ROHS
VENKEL
CR0805-8W-1003FT
R10,R27
2
ea.
Resistor
0.005Ω 2/3W
1
Thin-Film
0805
Current Sense Resistor, SMD,
ROHS
SUSUMU
KRL2012-M-R005-F
R3
0
ea.
Resistor
not
placed
0603
SMD, Not Placed, Place-Holder
for Type-3 compensation
R23, R27
0
ea.
Resistor
not
placed
0603
SMD, Not Placed, Place-Holder
for DCR Current Sensing
J1, J2, J26, J27
4
ea.
Connector,
Jack
KEYSTONE
575-4
0.175 PLUG MINI BANANA, NICKEL/BRASS,
ROHS
Application Note 1946
L1
OTHER DESCRIPTION
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TABLE 3. ISL78268EVAL1Z BUILD OF MATERIALS LIST (Continued)
REFERENCE DESIGNATOR QTY UNITS
COMPONENT
TYPE
VALUE
RATING
ACCURACY
(%)
TYPE
SIZE
OTHER DESCRIPTION
MANUFACTURER
MANUFACTURER PART
11
J3
1
ea.
Connector,
Header
1x4,
2.54mm
pitch
SOLID, VERTICAL, FRICTION
LOCK, GOLD
MOLEX
22-11-2042
J10, J13
2
ea.
Connector,
Header
1x3,
2.54mm
pitch
CONN-HEADER,
Breakaway1X36, ROHS
BERG/FCI
68000-236HLF
J4-J9, J11, J12,
J14-J24, J28
20
ea.
Connector,
Header
1x2,
2.54mm
pitch
RETENTIVE, ROHS
BERG/FCI
69190-202HLF
Four corners
4
ea.
Screw
4-40x1/4in
PAN, SS, PHILLIPS
4-40x3/4in
4
ea.
Standoff
AFFIX TO BACK OF PCB
1
ea.
Label
Place assy in bag
1
ea.
Unti-static Bag
5x8 in
F/F, HEX, ALUMINUM, ROHS
KEYSTONE
2204 (.250 OD)
LABEL-DATE CODE_LINE 1:
YRWK/REV#, LINE 2: BOM
NAME
INTERSIL
LABEL-DATE CODE
Anti-Static Bag, ZIPLOC, ROHS
INTERSIL
212403-013
Application Note 1946
Four corners
AN1946.0
July 7, 2014
Application Note 1946
Layout Pattern (4-layers)
FIGURE 5. SILK PATTERN (TOP)
FIGURE 6. TOP LAYER
FIGURE 7. LAYER 2
FIGURE 8. LAYER 3
FIGURE 9. BOTTOM LAYER
FIGURE 10. SILK PATTERN (BOTTOM)
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12
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July 7, 2014
Application Note 1946
100
12.30
95
12.25
90
12.20
85
VIN = 24V
80
12.15
VIN = 15V
VOUT (V)
EFFICIENCY (%)
Typical Performance Curves
VIN = 36V
75
VIN = 55V
70
12.10
12.05
65
11.95
60
11.90
55
50
1
2
3
4
VIN = 36V
VIN = 24V
11.85
VOUT = 12V, TA = +25°C
0
VIN = 55V
12.00
5
11.80
0
IOUT (A)
2
3
4
5
IOUT (A)
FIGURE 11. EFFICIENCY (AT +25°C): DE MODE, VOUT = 12V,
L = 4.7µH, fSW = 300kΩ
FIGURE 12. LOAD REGULATION
VIN: 5V/DIV
VIN: 5V/DIV
VOUT : 2V/DIV
VOUT : 2V/DIV
PH: 10V/DIV
PH: 10V/DIV
IL: 2A/DIV
1
VIN = 15V
IL: 2A/DIV
2µs/DIV
2µs/DIV
FIGURE 13. DE MODE: VIN = 36V, VOUT = 12V, IOUT = 2.5A,
L = 4.7µH, COUT = 98µF, fSW = 300kHz (CONTINUOUS
CONDUCTION OPERATION)
FIGURE 14. DE MODE: VIN = 36V, VOUT = 12V, IOUT = 1.0A,
L = 4.7µH, COUT = 98µF, fSW = 300kHz
(DISCONTINUOUS CONDUCTION OPERATION)
VIN: 5V/DIV
VIN: 5V/DIV
VOUT : 2V/DIV
VOUT : 2V/DIV
PH: 10V/DIV
PH: 10V/DIV
IL: 2A/DIV
IL: 2A/DIV
2µs/DIV
2µs/DIV
FIGURE 15. FORCED PWM MODE, VIN = 36V, VOUT = 12V,
IOUT = 2.5A, L = 4.7µH, COUT = 98µF, fSW = 300kHz
FIGURE 16. FORCED PWM MODE, VIN = 36V, VOUT = 12V,
IOUT = 1.0A, L = 4.7µH, COUT =98µF, fSW = 300kHz
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Application Note 1946
Typical Performance Curves (Continued)
VOUT : 5V/DIV
VOUT : 5V/DIV
SS: 1V/DIV
SS: 1V/DIV
FB: 1V/DIV
FB: 1V/DIV
PH: 10V/DIV
PH: 10V/DIV
500µs/DIV
500µs/DIV
FIGURE 17. SOFT-START (NON-PREBIASED): DE MODE, VIN = 36V,
VOUT = 12V, IOUT = 2.5A, L = 4.7µH, C OUT = 98µF,
fSW = 300kHz
FIGURE 18. SOFT-START (NON-PREBIASED): DE MODE, V IN = 36V,
VOUT = 12V, IOUT = 0A, L = 4.7µH, COUT = 98µF,
fSW = 300kHz
VOUT : 5V/DIV
VOUT: 5V/DIV
SS: 1V/DIV
SS: 1V/DIV
FB: 1V/DIV
FB: 1V/DIV
PH: 10V/DIV
PH: 10V/DIV
500µs/DIV
FIGURE 19. SOFT-START (NON-PREBIASED): FORCED-PWM MODE,
VIN = 36V, VOUT = 12V, IOUT = 2.5A, L = 4.7µH,
COUT = 98µF, fSW = 300kHz
VOUT(AC): 500mV/DIV
500µs/DIV
FIGURE 20. SOFT-START (NON-PREBIASED): FORCED-PWM MODE,
VIN = 36V, VOUT = 12V, IOUT = 0A, L = 4.7µH,
COUT = 98µF, fSW = 300kHz
VOUT(AC):200mV/DIV
COMP:
500mV/DIV
(1.5V DC-OFFSET)
COMP:
1V/DIV
IL: 2A/DIV
IL: 3A/DIV
PH: 20V/DIV
500µs/DIV
FIGURE 21. TRANSIENT RESPONSE: DE MODE, VIN = 36V,
VOUT = 12V, IOUT = 0.1A TO 4.5A, L = 4.7µH,
COUT = 98µF
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14
PH: 10V/DIV
500µs/DIV
FIGURE 22. TRANSIENT RESPONSE: FORCED-PWM MODE,
VIN = 36V, VOUT = 12V, IOUT = 0.1A TO 4.5A, L = 4.7µH,
COUT = 98µF
AN1946.0
July 7, 2014
Application Note 1946
Typical Performance Curves (Continued)
VOUT : 5V/DIV
PH:20V/DIV
560ms
IOUT: 1A/DIV
SS: 2V/DIV
IMON/DE: 0.5V/DIV
VOUT : 5V/DIV
PH: 20V/DIV
IL: 3A/DIV
100ms/DIV
FIGURE 23. HICCUP: ACL, VIN = 30V, VOUT = 12V, RIMON = 156kΩ
20ms/DIV
FIGURE 24. AVERAGE CONSTANT OUTPUT CURRENT CONTROL,
VIN = 36V, VOUT (SETTING) = 12V, CIMON = 1nF,
RIMON = 130kΩ, ACL = 4.05A,
RL = 5.0Ω TO 2.0Ω, FLOAD = 10Hz, DUTY OF LOAD
CHANGE = 50%
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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15
AN1946.0
July 7, 2014