Application Note 1592 ISL80101 High Performance 1A LDO Evaluation Board User Guide Description What’s Inside The ISL80101 is a high performance, low voltage, high current, low dropout linear regulator specified at 1A. Rated for input voltages from 2.2V to 6V, the LDO can provide outputs from 0.8V to 5V on the adjustable version. Salient features of the part include: The evaluation kit contains the following: • Very Fast Load Transient Response • ±1.8% Guaranteed VOUT Accuracy over Line, Load and Temperature • Typical Dropout of 130mV at 1A • Adjustable Soft-Start and In-Rush Current Limiting • The ISL80101EVAL2Z • Fixed output versions of ISL80101 • The ISL80101 datasheet • This evaluation kit document Test Steps 1. Select the desired output voltage by shorting one of the jumpers from J1 through J6. • PG Feature 2. Ensure that the output capacitor and CPB are set according to recommended values shown in Table 1. • Short-Circuit and Over Temperature Protection 3. Connect the input supply and the load. The ISL80101EVAL2Z provides a simple platform to evaluate performance of the ISL80101. It comes with the adjustable output version of the IC. Jumpers are provided to easily set popular output voltages. Fixed output versions are sampled in the accompanying kit. 4. Enable the IC using jumper JP1 and observe the output. FIGURE 1. ISL80101EVAL2Z September 9, 2010 AN1592.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1592 Optimizing LDO Performance Performance of the ISL80101 can be optimized by following these simple guidelines. Phase Boost Capacitor (CPB) On the adjustable version of the ISL80101, as shown in Figure 2, a small capacitor can be placed across the top resistor in the feedback resistor divider to place a zero at: (EQ. 1) F Z = 1 ⁄ ( 2 • pi • R TOP • C PB ) This zero increases the crossover frequency of the LDO and provides additional phase resulting in faster load transient response. VIN VOUT PG EN CPB RTOP ISL80101 ADJ CIN COUT RBOTTOM SS Table 1 gives the recommended values for output capacitor (MLCC X5R/X7R) and CPB for different voltage rails. Right selection of output capacitor and CPB also helps to increase PSRR at high frequencies. TABLE 1. VOUT (V) RTOP (kΩ) RBOTTOM (Ω) CPB (pF) COUT (µF) 5.0 2.61 287 100 10 3.3 2.61 464 100 10 2.5 2.61 649 82 10 1.8 2.61 1.0k 82 10 1.5* 2.61 1.3k 68 10 1.5 2.61 1.3k 150 22 1.2* 2.61 1.87k 120 22 1.2* 2.61 1.87k 270 47 1.0 2.61 2.61k 220 47 0.8 2.61 4.32k 220 47 *Either option could be used depending on cost/performance requirements. Layout Guidelines FIGURE 2. ISL80101 TYPICAL APPLICATION Output Capacitor (COUT) Output capacitor selection is important to achieve the desired load transient performance. The ISL80101 uses state-of-the-art internal compensation to be compatible with different types of output capacitors including multi-layer ceramic, POSCAP and aluminum/tantalum electrolytic. A good PCB layout is important to achieve expected performance. Consideration should be taken when placing the components and routing the trace to minimize the ground impedance, and keep the parasitic inductance low. The input and output capacitors should have a good ground connection and be placed as close to the IC as possible. The ‘SENSE’ trace in fixed voltage parts and the ‘ADJ’ trace in adjustable voltage parts must be away from noisy planes and traces. There is a growing trend to use very-low ESR multilayer ceramic capacitors (MLCC) for applications because they can support fast load transients and also bypass very high frequency noise from other sources. However, effective capacitance of MLCC's drops with applied voltage, age and temperature. X7R and X5R dielectric ceramic capacitors are strongly recommended as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. 2 AN1592.0 September 9, 2010 Application Note 1592 Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, ILOAD = 0A 1.8 1.2 ΔVOUT (%) EN (1V/DIV) SS (1V/DIV) VOUT (1V/DIV) 0.6 0 -0.6 -1.2 -1.8 -50 PG (1V/DIV) FIGURE 3. START-UP WAVEFORMS 1.83 50 75 100 125 150 1.2 +25°C ΔVOUT (%) OUTPUT VOLTAGE (V) 25 1.8 1.81 -40°C 1.79 +125°C 1.77 0.6 +25°C 0 -0.6 -40°C +125°C -1.2 2 3 4 5 SUPPLY VOLTAGE (V) -1.8 6 0.50 0.75 1.00 200 180 DROPOUT VOLTAGE (mV) +125°C 3.00 2.75 -40°C +25°C 2.50 2.25 2.00 1.75 1.50 0 0.25 FIGURE 6. OUTPUT VOLTAGE vs LOAD CURRENT 3.50 3.25 0 OUTPUT CURRENT (mA) FIGURE 5. OUTPUT VOLTAGE vs INPUT VOLTAGE GROUND CURRENT (mA) 0 FIGURE 4. OUTPUT VOLTAGE vs TEMPERATURE 1.85 1.75 -25 JUNCTION TEMPERATURE (°C) TIME (500µs/DIV) 1A 160 140 120 0.5A 100 80 60 40 20 0.25 0.50 0.75 1.00 OUTPUT CURRENT (A) FIGURE 7. GROUND CURRENT vs LOAD CURRENT 3 0 -40 -25 -10 0.25A 5 20 35 VOUT = 2.5 50 65 80 95 110 125 TEMPERATURE (°C) FIGURE 8. DROPOUT AT 1A vs TEMPERATURE AN1592.0 September 9, 2010 Application Note 1592 Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, ILOAD = 0A (Continued) 90 1A 80 500mA 100mA 70 PSRR (dB) 60 VOLTAGE RAILS AT 50mV/DIV 0mA 50 40 30 VIN = 3.7V, VOUT = 3.3V, COUT = 10µF, CPB = 100pF 20 10 VIN = 2.9V, VOUT = 2.5V, COUT = 10µF, CPB = 82pF VIN = 2.5V, VOUT = 1.8V, COUT = 10µF, CPB = 82pF 0 100 1k 10k 100k FREQUENCY (Hz) FIGURE 10. VIN = 2.5V, VOUT = 1.0V, COUT = 47µF, CPB = 220pF 90 VIN = 2.5V, VOUT = 1.5V, COUT = 22µF, CPB = 150pF 80 500mA 1A 70 VIN = 2.5V, VOUT = 1.2V, COUT = 47µF, CPB = 270pF 1A 0mA 50 40 30 20 1mA di/dt = 4A/µs 20µs/DIV 10 0 100 FIGURE 9. LOAD TRANSIENT WAVEFORMS 80 1A 70 70 100mA 60 1M 0mA 40 30 10 100k FIGURE 12. VIN = 2.5V, VOUT = 1.2V, COUT = 22µF, CPB = 120pF 1M 0mA 30 10 4 100mA 40 20 10k FREQUENCY (Hz) 1A 50 20 1k 500mA 60 50 0 100 10k 100k FREQUENCY (Hz) 90 500mA PSRR (dB) 80 1k FIGURE 11. VIN = 2.5V, VOUT = 1.2V, COUT = 47µF, CPB = 270pF 90 PSRR (dB) 100mA 60 PSRR (dB) VIN = 2.5V, VOUT = 1.0V, COUT = 47µF, CPB = 220pF 1M 0 100 1k 10k 100k FREQUENCY (Hz) 1M FIGURE 13. VIN = 2.5V, VOUT = 1.5V, COUT = 22µF, CPB = 150pF AN1592.0 September 9, 2010 Application Note 1592 Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 1.8V, CIN = COUT = 10µF, TJ = +25°C, ILOAD = 0A (Continued) 90 80 90 500mA 1A 70 80 100mA 0mA 50 40 30 30 10 10 1k 10k FREQUENCY (Hz) 100k 0 100 1M FIGURE 14. VIN = 2.5V, VOUT = 1.5V, COUT = 10µF, CPB = 68pF 0mA 100mA 40 20 0 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 15. VIN = 2.5V, VOUT = 1.8V, COUT = 10µF, CPB = 82pF 90 90 100mA 80 70 500mA 70 60 1A 60 50 PSRR (dB) PSRR (dB) 50 20 0mA 40 30 40 10 10 10k 100k FREQUENCY (Hz) 1M FIGURE 16. VIN = 2.9V, VOUT = 2.5V, COUT = 10µF, CPB = 82pF 5 500mA 0mA 1A 30 20 1k 100mA 50 20 0 100 1A 60 PSRR (dB) PSRR (dB) 60 80 500mA 70 0 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 17. VIN = 3.7V, VOUT = 3.3V, COUT = 10µF, CPB = 100pF AN1592.0 September 9, 2010 Application Note 1592 Schematic VOUT VIN VOUT VIN CON1 CON2 C5 C3 CPB R1 ADJ J1 J2 J3 J4 J5 J6 C6 R2 TP1 ISL80101 C4 N/C PG EN GND SS JP1 TP2 R3 R4 R5 R6 R7 R8 C2 CON4 CON3 Bill of Materials ITEM QTY REFERENCE DESIGNATOR 1 2 C5, C6 10µF CAP, SMD, 0805, 16V, 10%, Generic 2 1 CPB 82pF CAP, SMD, 0603 Generic 3 1 U1 ISL80101IRAJZ Intersil 4 1 R1 2.61kΩ RES, SMD, 0603, 1% Generic 5 1 R2 100kΩ RES, SMD, 0603, 1% Generic 6 1 R3 1kΩ RES, SMD, 0603, 1% Generic 7 1 R4 464Ω RES, SMD, 0603, 1% Generic 8 1 R5 1.3kΩ RES, SMD, 0603, 1% Generic 9 1 R6 1.87kΩ RES, SMD, 0603, 1% Generic 10 1 R7 2.61kΩ RES, SMD, 0603, 1% Generic 11 1 R8 649Ω RES, SMD, 0603, 1% Generic 12 1 JP1 Jumper Generic 13 6 J1, J2, J3, J4, J5, J6 Jumper Generic 14 1 TP1 Test Point Keystone 5007 15 4 CON1, CON2, CON3, CON4 Terminal Connector Keystone 1514-2 C2, C3, C4, TP2 VALUE DESCRIPTION PART NUMBER MANUFACTURER ISL80101IRAJZ DNP NOTE: Available fixed versions of the ISL80101 will be sampled in an accompanying kit. Certain fixed versions will be available at a later date. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 6 AN1592.0 September 9, 2010 Application Note 1592 ISL80101EVAL2Z Evaluation Board Layout FIGURE 18. ISL80101EVAL2Z COMPONENT PLACEMENT FIGURE 19. ISL80101EVAL2Z TOP LAYER FIGURE 20. ISL80101EVAL2Z BOTTOM LAYER 7 AN1592.0 September 9, 2010