ISL6252AEVAL2Z Evaluation Board Setup Procedure ® Application Note October 25, 2007 AN1362.0 Low Cost Multi-Chemistry Battery Charger Controller Features The ISL6252, ISL6252A is a highly integrated battery charger controller for Li-ion/Li-ion polymer batteries and NiMH batteries. High Efficiency is achieved by a synchronous buck topology and the use of a MOSFET, instead of a diode, for selecting power from the adapter or battery. The low side MOSFET emulates a diode at light loads to improve the light load efficiency and prevent system bus boosting. • ±3% Accurate Input Current Limit • ±0.5% Charge Voltage Accuracy (-10°C to +100°C) The constant output voltage can be selected for 2-, 3- and 4-series Li-ion cells with 0.5% accuracy over-temperature. It can be also programmed between 4.2V +5%/cell and 4.2V -5%/cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input current limit for the AC adapter is programmable to within 3% accuracy to avoid overloading the AC adapter, and to allow the system to make efficient use of available adapter power for charging. It also has a wide range of programmable charging current. The ISL6252, ISL6252A provides outputs that are used to monitor the current drawn from the AC adapter, and monitor for the presence of an AC adapter. The ISL6252, ISL6252A automatically transitions from regulating current mode to regulating voltage mode. Ordering Information PART NUMBER (Note) PACKAGE (Pb-Free) PKG. DWG. # -10 to +100 24 Ld QSOP M24.15 ISL6252AHAZ* ISL6252 AHAZ -10 to +100 24 Ld QSOP M24.15 ISL6252HAZ* ISL 6252HAZ • ±25% Accurate Battery Trickle Charge Current Limit (ISL6252A) • Programmable Charge Current Limit, Adapter Current Limit and Charge Voltage • Fixed 300kHz PWM Synchronous Buck Controller with Diode Emulation at Light Load • Output for Current Drawn from AC Adapter • AC Adapter Present Indicator • Fast Input Current Limit Response • Input Voltage Range 7V to 25V • Support 2-, 3- and 4-Cell Battery Pack • Up to 17.64V Battery-Voltage Set Point • Thermal Shutdown • Support Pulse Charging • Less than 10µA Battery Leakage Current • Charge Any Battery Chemistry: Li-ion, NiCd, NiMH, etc. • Pb-Free (RoHS Compliant) Applications TEMP RANGE (°C) PART MARKING • ±3% Accurate Battery Charge Current Limit • Notebook, Desknote and Sub-notebook Computers • Personal Digital Assistant Pinout ISL6252, ISL6252A (24 LD QSOP) TOP VIEW *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 VDD 1 24 DCIN ACSET 2 23 ACPRN EN 3 22 CSON CELLS 4 21 CSOP ICOMP 5 20 CSIN VCOMP 6 19 CSIP ICM 7 18 PHASE VREF 8 17 UGATE CHLIM 9 16 BOOT ACLIM 10 15 VDDP VADJ 11 14 LGATE GND 12 13 PGND CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1362 What’s Inside Step 3: Select the Battery Charger Current Limit (Table 3) This Evaluation Board Kit contains the following materials: • Qty(1) ISL6251EVAL2Z Evaluation Board • Qty(1) ISL6252EVAL2Z Setup Procedure What is Needed The following materials are recommended to perform testing: • One adjustable 25V 6A power supply • Two adjustable electronic loads with constant current mode and constant voltage mode • Two DVMs • One 500MHz four channel oscilloscope • Four passive oscilloscope voltage probes • Two 10ADC Current Probes • One signal generator Jumper Selection Guide The CHLIM pin chooses the desired battery charger current limit threshold. Preset battery charger current limit thresholds are selected by placing a shunt jumper across the appropriate pins of JP4. For other battery charger current limit thresholds, install a shunt jumper across pins 3 and 4, which connects the wiper of potentiometer R22 to CHLIM. Potentiometer R22 may be removed and replaced with resistors R6 and R7. TABLE 3. JUMPER JP4 FUNCTIONS 100% CURRENT CHLIM PIN SHUNT FEEDBACK JUMPER CONNECTED CSOP TO CSON TO: LOCATION 100% CONSTANT CURRENT 1-3 VREF 120mV 4.80A Removed Floating 0V 0A 3-5 GND 0V 0A 3-4 R22 or R6/R7 0mV to 120mV 0A to 4.8A Step 1: Select the Number of Cells (Table 1) Step 4: Select the AC Adapter Current Limit (Table 4) The CELLS pin chooses the correct output voltage clamp for a given number of cells series-connected in the battery pack. Select the output voltage by placing a shunt jumper across the appropriate pins of JP1. The ACLIM pin chooses the desired AC adapter current limit threshold. Preset AC adapter current limit thresholds are selected by placing a shunt jumper across the appropriate pins of JP5. For other AC adapter current limit thresholds, install a shunt jumper across pins 3 and 4 which connects the wiper of potentiometer R23 to ACLIM. Potentiometer R23 may be removed and replaced with resistors R17 and R18. TABLE 1. JUMPER JP1 FUNCTIONS SHUNT JUMPER LOCATION 1-2 NUMBER OF CELLS CONNECTED IN SERIES CELLS PIN CONNECTED TO: VDD 100% CONSTANT OUTPUT VOLTAGE 4 16.8 2-3 GND 3 12.6 Removed Floating 2 8.4 TABLE 4. JUMPER JP5 FUNCTIONS 100% ADAPTER CURRENT ACLIM PIN CONNECTED TO: 100% CURRENT FEEDBACK CSIP TO CSIN 1-3 VREF 100mV 5.15A Removed Floating 75mV 3.90A SHUNT JUMPER LOCATION Step 2: Select the Cell Trim Voltage (Table 2) 3-5 GND 50mV 2.65A The VADJ pin trims the battery charger output voltage limit. Preset battery charger output voltage limits are selected by placing a shunt jumper across the appropriate pins of JP6. For other battery charger output voltage limits install a shunt jumper across pins 3 and 4 which connects the wiper of potentiometer R24 to VADJ. Potentiometer R24 may be removed and replaced with resistors R19 and R21. Resistor R20 limits the trim increase to 1%. Shorting R20 allows the trim to increase 5%. Decreasing trim range is unaffected. 3-4 R23 or R17/R18 50mV to 100mV 2.65A to 5.15A Interface Connections TABLE 5. HEADER H1 Input Power TABLE 2. JUMPER JP6 FUNCTIONS SHUNT JUMPER LOCATION VADJ PIN BATTERY VOLTAGE CHANGE PER CELL 1-3 Through R20 to VREF +5% 3-5 To GND -5% 5-6 Floating None 3-4 R24 Wiper or R19/R21 2 Adjustable between -5% to +5% H2 System Load Output H3 Battery Charger Output PIN# 1 CONNECT TO “+” INPUT POWER 2 “+” SENSE (if used) 3 “-” SENSE (if used) 4 “-” INPUT POWER 1 “+” SYSTEM LOAD OUTPUT 2 “+” SENSE (if used) 3 “-” SENSE (if used) 4 “-” SYSTEM LOAD OUTPUT 1 “+” BATTERY CHARGER OUTPUT 2 “+” SENSE (if used) 3 “-” SENSE (if used) 4 “-” BATTERY CHARGER OUTPUT AN1362.0 October 25, 2007 ISL6252AEVAL2Z Schematic AC ADAPTER 2 C16 18 C10 DCIN JP7 TP27 C3 CSIN 5 6 7 8 CSOP IRF7811AV ACPRN 23 3 CSON CSOP 22 4 EN CELLS 5 ICOMP CSIN 20 6 VCOMP ICM CSIP PHASE 19 VREF CHLIM UGATE BOOT 17 9 10 ACLIM VDDP 15 R16 C9 11 VADJ GND LGATE PGND 14 0 0.1UF R28 LGATE 0 VADJ TP17 ACLIM TP18 TP19 TP20 TP7 DNP R17 R23 20K TP14 DNP R22 20K JP5 1 2 34 56 R18 ACLIM_ADJ JP4 1 2 34 56 R7 CHLIM_ADJ R6 R24 50K DNP R20 33.2K DNP DNP R21 TP8 DNP JP6 1 2 34 56 R19 VADJ_ADJ VADJ_LIM JP9 1 2 L1OUT 0.01UF Q2 51 4 3 2 1 C8 4.7 22UF JP10 1 2 C14 TP24 C1 H3 0.1UF 22UF P4 C13 13 10UF C2 CHLIM TP10 10K TP1 R29 TP4 2.2UF VDD 0.025 P3 TP11 TP23 VREF 15UH UGATE R15 TP2 R1 16 ISL6252AHRZ CELLS BATTERY L1 R25 C7 12 JP11 PHASE D2 JP1 R14 C6 100PFVCOMP C5 6800PF TP16 10K 0.01UF EN R3 100K TP13 1 2 JP8 FDS6612A 8 1X4 18 1 2 5 6 7 8 7 Q1 21 BOOT ICOMP 1 1 2 23 3 4 4 2.2 24 ACSET R12 DCIN 2 4 3 2 1 VDD BAT54WT1 100K R4 1 NOT POPULATED TP29 TP28 1 2 3 4 1X4 Application Note 1362 H4 C4 1UF C15 JP2 12 3 U1 JP3 12 TP26 JP16 1 2 TP9 TP3 TP5 NOT POPULATED TP25 0.1UF TP21 H2 1 2 3 4 1X4 1 2 ACPRN 1 2 3 1X3 C12 0.1UF 0.1UF JP17 1 2 ACSET R11 10.2K JP12 NOT POPULATED Q5 NOT POPULATED TP22 R13 1 2 1 CSIP 1 2 3 4 1X4 NDS352AP 3 R8 TP15 0.1UF P2 0.020 130K C11 H1 SYSTEM R2 D1 P1 AN1362.0 October 25, 2007 Application Note 1362 TABLE 6. BILL OF MATERIALS QTY REF DES 1 C6 1 DESCRIPTION MFG NAME PART NUMBER Capacitor, SMD, 0603, 100pF, 50V, 5%, COG TDK C1608COG1H101J C7 Capacitor, SMD, 0805, 0.01µF, 50V, 5%, COG TDK C2012COG1H103J 1 C5 Capacitor, SMD, 0805, 6800pF, 50V, 5%, COG TDK C2012COG1H682J 3 C2, C4, C8 Capacitor, SMD, 0805, 1.0µF, 16V, 20%, X7R TDK C2012X7R1C105M 3 C3, C9, C10 Capacitor, SMD, 0805, 0.1µF, 50V, 10%, X7R TDK C2012X7R1H104K 2 C14, C15 Capacitor, SMD, 1812, 22µF, 25V, 20%, X5R TDK C4532X5R1E226M 1 D2 SURFACE MOUNT SCHOTTKY BARRIER DIODE Diodes Inc. BAT54WT1 1 L1 Choke, SMD, 8mm, 15µH, 20%, 5.65A, Shielded Sumida CDRH127/LD-150NC 1 U1 IC, Battery Charger, 24 Ld QSOP, -10°C to +100°C Intersil ISL6252HAZ 1 Q2 MOSFET, N-CH, 8P, SOIC, 30V, 8.4A, 0.022Ω Fairchild FDS6612A 1 Q1 MOSFET, N-CH, 8P, SOIC, 30V, 10.8A, 0.011Ω IR IRF7811AV 1 Q5 MOSFET, P-CH, 3P, SOT23, -30V, -0.9A, 0.5Ω Fairchild NDS352AP 1 D1 DIODE SCHOTTKY 40V 10A POWERDI5 Diodes Inc. PDS1040-13 1 R2 Resistor, Shunt, SMD, 2010, 0.020Ω, 1W, 1% IRC LRC-LRF2010-01-R020-F 1 R1 Resistor, Shunt, SMD, 2010, 0.025Ω, 1W, 1% IRC LRC-LRF2010-01-R025-F 1 R13 Resistor, SMD, 0805, 18Ω, 0.125W, 5% KOA RK73B2AT180J 1 R12 Resistor, SMD, 0805, 2.2Ω, 0.125W, 5% KOA RK73B2AT2R2J 1 R15 Resistor, SMD, 0805, 4.7Ω, 0.125W, 5% KOA RK73B2AT4R7J 1 R14 Resistor, SMD, 0805, 10kΩ, 0.125W, 1% KOA RK73H2AT1002F 1 R11 Resistor, SMD, 0805, 7.87kΩ, 0.125W, 1% KOA RK73H2AT7871F 3 R3, R4, R8 Resistor, SMD, 0805, 100kΩ, 0.125W, 1% KOA RK73H2AT1003F 1 R20 Resistor, SMD, 0805, 33.2kΩ, 0.125W, 1% KOA RK73H2AT3322F 1 R16 Resistor, SMD, 0805, 0Ω, 2A, 50mΩ Max KOA RK73Z2AT 4 AN1362.0 October 25, 2007 5 Application Note 1362 FIGURE 1. TOP SILK AN1362.0 October 25, 2007 6 Application Note 1362 FIGURE 2. TOP LAYER AN1362.0 October 25, 2007 7 Application Note 1362 FIGURE 3. LAYER 2 GROUND (TOP VIEW) AN1362.0 October 25, 2007 8 Application Note 1362 FIGURE 4. LAYER 3 SIGNAL (TOP VIEW) AN1362.0 October 25, 2007 9 Application Note 1362 FIGURE 5. LAYER 4 GROUND (TOP VIEW) AN1362.0 October 25, 2007 10 Application Note 1362 FIGURE 6. LAYER 5 GROUND (TOP VIEW) AN1362.0 October 25, 2007 11 Application Note 1362 FIGURE 7. BOTTOM COPPER (BOTTOM VIEW) AN1362.0 October 25, 2007 12 Application Note 1362 FIGURE 8. BOTTOM SILK SCREEN (BOTTOM VIEW) AN1362.0 October 25, 2007 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com