Application Note 1463 ZL2004EV1 Evaluation Board Description Specifications The ZL2004 is an integrated mixed-signal power conversion and management IC that combines an efficient step-down DC/DC converter with key power and thermal management functions in a single package. The ZL2004 incorporates current sharing and adaptive efficiency-optimization algorithms to provide a flexible, efficient power IC building block. This board has been designed and optimized for the following conditions: • VIN = 12V (Board range: 5V to 14V) • IIN,MAX = 16A • VOUT = 1.8V • IOUT, MAX = 40A The ZL2004EV1 is a 6-layer board that provides a single-phase power rail up to 40A loads using the ZL2004 controller and ZL1505 driver ICs. The design has been optimized for a high step-down ratio with high load currents. • FSW = 400kHz • VOUT ripple = 1% • Transient response = 3.5% (15A to 25A step load @ 2.5A/µs) A USB to SMBus adapter is used to connect the ZL2004EV1 board to a PC. The PMBus command set is accessed by using the Zilker Labs PowerNavigator™ evaluation software from a PC running Microsoft Windows. • Board temperature: +25°C Functional Description The ZL2004EV1 provides all circuitry required to evaluate the features of the ZL2004. The ZL2004EV1 has a performance-optimized single-phase ZL2004 circuit layout that allows efficient operation up to the maximum output current of 40A. Power and load connections are provided through plug-in sockets. Features • Synchronous buck DC/DC converter • Output current up to 40A • Configurable through SMBus • Single-supply operation Figure 1 shows a functional block diagram of the ZL2004EV1 board. The SMBus address is selectable through a jumper on the top side of the board. All power to the board (VIN and I2C bus) must be removed before changing the jumpers. • Convenient power connection • Onboard enable switch • Power good indicator The hardware enable function is controlled by a toggle switch on the ZL2004EV1 board. The power good (PG) VIN J5 VDD Circuit J4 J10 VDD VDD (optional ) PWMH PWMH PWML PWML ZL2004 GH ZL1505 GL VOUT EN SYNC SMBus PG FIGURE 1. ZL2004EV1 BLOCK DIAGRAM August 20, 2009 AN1463.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1463 LED indicates the correct state of PG when external power is applied to the ZL2004EV1 board. The right angle headers at opposite ends of the board are for connecting a USB to SMBus adapter board or for daisy chaining of multiple evaluation boards. Figure 2 “ZL2004EV1 Schematic – Main Circuit” shows the operational circuit. The circuit consists of the ZL2004 controller and ZL1505 driver ICs with minimal component count to realize a 40A buck converter. The board layout has been optimized for efficiency and thermal performance. Figure 3 shows the ZL1505 driver and power train circuit. The bias for the ZL1505 is supplied by an on-board VDD circuit. Figure 4 shows the on-board VDD circuit for powering the ZL1505’s VDD supply. The jumper J5 connects the supply power to the VDD circuit. Jumper J10 connects the VDD circuit to the ZL1505. The J4 jumper enables the on-board VDD circuit. Note that this circuit uses a ZL2105 controller set to SMBus address 0x2F. Optionally, a 5V to 7.5V bias can be supplied through the P3 connector (labeled VDD+/VDD-). Remove jumpers J5, J10, and J4 when using an external supply for VDD. Figure 5 “ZL2004EV1 Schematic - Interface Circuit” is the interface and SMBus address selection circuitry for the ZL2004. Operation Stand-Alone Operation The ZL2004 is easy to setup and operate. It is configured, out of the box, to provide an output voltage of 1.8V at 40A from a 12V source. All input and output connections should to be made before turning the input supply on. When the input power supply is turned on, the ZL2004 will output the configured voltage and the load applied to VOUT+/VOUT- can be varied. PMBus Operation The ZL2004 utilizes the PMBus protocol via its SMBus interface. This functionality can be controlled via USB from a PC running the PowerNavigator evaluation software in a Windows XP or Windows 2000/NT operating system. For PMBus operation, connect the included USB to SMBus adapter board to J6 of the ZL2004EV1 board. Connect the desired load and an appropriate power supply to the input and connect the included USB cable to the PC running the evaluation software. Place the ENABLE switch in “DISABLE” and turn on the power. Use the mouse-over pop-ups for PowerNavigator help. Refer to application note AN2033 [2] for PMBus details. The ENABLE switch can then be moved to “ENABLE” and the ZL2004EV1 board can be tested. Alternately, the PMBus ON-OFF CONFIG and OPERATION commands may be used. Quick Start Guide Stand Alone Operation 1. Set ENABLE switch to “DISABLE” 2. Apply load to VOUT+/VOUT3. Connect 12V power supply to VIN+/VIN- (supply turned off) 4. If using an external VDD supply, remove jumpers J5, J10, and J4. Connect an external 5V to 7.5V supply to VDD+/VDD- to bias the ZL1505 driver circuit. 5. Turn 12V power supply on. If using an external supply for driver circuit, turn it on. 6. Set ENABLE switch to “ENABLE” 7. Monitor ZL2004EV1 board operation using an oscilloscope USB (PMBus) Operation 1. Follow step 1 - 5 above 2. Insert the Zilker Labs Eval Kit CD 3. Connect USB to SMBus adapter board to J6 of ZL2004EV1 4. Connect supplied USB cable from computer to USB to SMBus adapter board a. Upon first-time connection, the Found New Hardware Wizard will appear. b. Windows XP users: Select ‘No’ at prompt to search the Internet for drivers. c. Follow the steps on the screen to install the drivers from the CD. 5. Install the PowerNavigator evaluation software by running setup.exe from the PowerNavigator_installer folder on the CD. 6. Set ENABLE switch on EVB to “ENABLE” 7. Monitor and configure the ZL2004EV1 board using PMBus commands in the evaluation software 8. Test the ZL2004EV1 operation using an oscilloscope and the evaluation software. The evaluation software allows modification of all ZL2004 PMBus parameters. The ZL2004 has been pre-configured as described in this document, but the user may modify the operating parameters through the eval software or by loading a predefined scenario from a configuration file. 2 AN1463.0 August 20, 2009 Schematics VIN JP1 PG_0 1 HW_EN 4 J1 2 3 EN SMA 3 R1 100K R46 3.3 R50 NI V25 SENA XTEMP SA1 C10 4.7uF 6.3V VIN VOUT VOUT TEMP+ TEMP- C11 C12 C13 C14 C15 100uF 100uF 100uF 100uF 100uF 6.3V 6.3V 6.3V 6.3V 6.3V ZL1505 Circuit VTRK_IN R3 100K J9 Address Selection VMON R5 11.0K 1 3 5 7 9 Ref Value Add. R17 R18 R19 R20 R21 19.6K 21.5K 23.7K 26.1K 28.7K 0x20 0x21 0x22 0x23 0x24 VSEN- R6 49.9R VSEN+ R9 49.9R 2 4 6 8 10 J9 SGND_1 R10 6.65K 1 2 1 2 J2 SG Vout pinstrapped to 3.3V Override with PMBus. Pinstrap output voltage can be modified to lower the max output voltage. VOUT PWML ISENA ISENB SENB PGND_1 PGND_2 Ground Unification PWMH GND SGND PWM PWM2 ISENA ISENB C9 4.7uF 6.3V V25 C5 0.1μF 25V G_LO VDD G_HI VR U1 C4 10uF 16V C3 22uF 16V C8 22uF 16V C7 10uF 16V 24 23 22 21 20 19 18 17 VDD VR PWMH PGND PWML ISENA ISENB ISENR 33 ZL2004 FC V0 V1 VMON CFG2 VTRK VSEN+ VSEN- SCL SDA SALRT DGND SYNC SA0 SA1 ILIM SCL SDA SALRT 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 C2 22uF 16V NI = Not Installed FIGURE 2. ZL2004EV1 SCHEMATIC – MAIN CIRCUIT J3 C16 C17 820uF 820uF 6.3V 6.3V P1 + VOUT - Application Note 1463 R2 0 SYNC SA0 PG DLY EN CFG MGN DDC XTEMP V25 32 31 30 29 28 27 26 25 C6 4.7uF 6.3V FLEX PG PG SCL SDA SALRT C1 22uF 16V R51 NI DDC SYNC SA0 VDD AN1463.0 August 20, 2009 Schematics (Continued) VIN VIN FLEX C29 10uF 16V D11 NI 4 VDD C30 10uF 16V VDD C31 10uF 16V C32 10uF 16V R30 NI C33 R31 0 R32 1.0 8 7 6 5 Q5 BSC042N03LS G 4 U4 ZL1505 9 C34 10 BST 1 HSEL VDD GH 6 1 2 3 R34 NI 2 8 7 6 5 GH 4 SW PWMH 4 PWMH PWML PWML 5 PWML GND 7 3 SW VOUT GL 8 GL R35 3.92K 4 EPAD 11 1 2 3 ISENB 8 7 6 5 C35 0.27uF Q9 BSC016N03LS 4 Q8 BSC016N03LS ISENB TEMP- 8 7 6 5 R36 NI ISENA Q6 2N3904 L2 0.45uH 1 2 3 LSEL PWMH ISENA Q7 BSC042N03LS G 1 2 3 GND C36 100uF 6.3V C37 100uF 6.3V GND NI = Not Installed AN1463.0 August 20, 2009 FIGURE 3. ZL2004EV1 SCHEMATIC – ZL1505 CIRCUIT Application Note 1463 R33 0 TEMP+ Schematics (Continued) VIN C44 0.1μF 25V C40 10uF 16V SCL SDA SALRT SA0_A SCL SDA SALRT R40 42.2K ZL2105 VR BST VDDP VDDP SW SW PGND PGND CP2 SGND 0 Ohm DGND SYNC SA UVL0 ILIM SCL SDA SALRT XTEMP C43 0.047μF 27 26 BST_A 25 24 23 SW_A 22 21 20 19 J10 Instal J10 to use ZL2105 derived VDD VDD_A L40 22uH C42 10uF 16V VDD R42 402 C46 47uF 16V C47 47uF 16V C48 47uF 16V 37 R59 V0 V1 DLY SS VTRK VSEN N/C VDR CP1 SYNC 10 11 12 13 14 15 16 17 18 SYNC 1 2 3 4 5 6 7 8 9 SG_A VIN_A VSEN_A Address Set to 25 C41 0.1μF 25V R43 1.00K XX1000 Ground Unification SG_A ZILKER LABS, INC. CONFIDENTIAL AND PR SG_A FIGURE 4. ZL2004EV1 SCHEMATIC – VDD CIRCUIT FOR ZL1505 4301 WESTBANK DRIVE Application Note 1463 U1002 C50 10uF 16V 10uF C45 16V 91 36 35 34 33 32 31 30 29 28 SG_A C49 10uF 16V R48 PG EN CFG MGN FC V25 VDDS VDDL VRA 5 R44 42.2K 1 2 2 V25_A 1 EN_VDD Install J4 to enable VDD Instal J5 to use VIN to derive VDD R41 3.3 1 2 J5 J4 AN1463.0 August 20, 2009 Schematics (Continued) Board to Board Interface R13 10.0K R11 10.0K Place pullups near the last load on the bus. R12 10.0K Vaux R14 +Vi2c FROM PREQUEL J6 SCL SCL 2 4 6 8 10 SALRT SALRT SDA SDA Interface Logic 10.0K VTRK_IN DDC 1 3 5 7 9 R55 49.9R MSTR SYNC PG_0 R15 49.9R MSTR_EN SYNC VTRK_IN DDC SYNC PG_0 HEADER VOUT VOUT Vaux PG Enable Switch Debounce PG SOCKET 4 D4 5 6 6 TO SEQUEL J8 2 1 4 3 6 5 8 7 10 9 R22 ESDA6V1-4BC6 Disable Monitor Enable 10.0K 3 2 1 2 A MSTR_EN 1 NC C27 2.2uF 16V 3 2 5 VCC R25 49.9R SW1 1 U3 SN74AUP1G17 R23 10.0K C28 0.1μF Y 4 HW_EN HW_EN C26 0.1μF GND 3 25V 25V VIN P2 D1 STPS20L45CG J7 1 2 3 JACK_BARREL C19 180uF 16V C20 180uF 16V C21 180uF 16V C22 180uF 16V C23 22uF 16V Power In D2 BAT54 U2 MIC2920A-3.3BS VO G G 4 VI 2 1 D3 BAT54 + VIN - +Vi2c VDD P3 + VDD - C18 22uF 16V This regulator allows stand alone operation when not using a USB interface dongle. When no Vi2c is applied (i.e USB dongle), this regualtor supplies VAUX current from VIN thus efficiency measurements will be affected. VAUX 3 D6 GRN R16 4 5 6 AN1463.0 August 20, 2009 C24 22uF 16V S1 D1 G1 G2 D2 Q1 FDG6303N S2 3 2 1 1 21.5K Power Good LED R24 10.0K D5 BAT54 2 3 S1 D1 G1 G2 D2 Q2 FDG6304P S2 6 5 4 R27 10.0K R26 392 4 PG\ 5 S1 D1 G1 G2 VOUT 3 ZILKER LAB 2 PG C25 22uF 16V 6 D2 S2 1 Q4 FDG6303N Title SCHEM Size B FIGURE 5. ZL2004EV1 SCHEMATIC - INTERFACE CIRCUIT Docume Mond Application Note 1463 SW_SPDT Application Note 1463 Board Layout – Silkscreen FIGURE 6. PCB – TOP LAYER FIGURE 7. PCB – INNER LAYER 1 (VIEWED FROM TOP) 7 AN1463.0 August 20, 2009 Application Note 1463 Board Layout – Silkscreen (Continued) FIGURE 8. PCB – INNER LAYER 2 (VIEWED FROM TOP) FIGURE 9. PCB – INNER LAYER 3 (VIEWED FROM TOP) 8 AN1463.0 August 20, 2009 Application Note 1463 Board Layout – Silkscreen (Continued) FIGURE 10. PCB – INNER LAYER 4 (VIEWED FROM TOP) FIGURE 11. PCB – INNER LAYER 5 (VIEWED FROM TOP) 9 AN1463.0 August 20, 2009 Application Note 1463 Board Layout – Silkscreen (Continued) FIGURE 12. PCB – INNER LAYER 6 (VIEWED FROM TOP) FIGURE 13. PCB – BOTTOM LAYER 10 AN1463.0 August 20, 2009 Bill of Materials ITEM QTY. REFERENCE VALUE TOL. RATING PCB FOOTPRINT TYPE MANUFACTURER PART NUMBER 11 8 C1, C2, C3, C8, C18, C23, 22µF C24, C25 10% 16V X5R SM1210 Murata GRM32ER61C226KE20L 2 2 C4, C7 10µF ±10% 16V X7R SM1210 Murata GRM32DR71C106KA01L 3 5 C5, C26, C28, C41, C44 0.1µF 10% 25V X7R SM0603 Kemet C0603C104K3RACTU 4 5 C6, C9, C10, C33, C34 4.7µF 6.3V X5R SM0603 Panasonic-ECG ECJ-1VB0J475M 5 10 16V X5R SM1210 Kemet C1210C476M9PACTU 6 2 C16, C17 820µF 6.3V ELECT POLY SM_CAP_10.5X10.5_PXA UnitedChemi-Con APXA6R3ARA821MJC0G 7 4 C19, C20, C21, C22 180µF 16V ELECT POLY SM_CAP_8.3X8.3_PXA UnitedChemi-Con APXA160ARA181MHC0G 8 1 C27 2.2µF 16V X5R SM0805 Murata GRM21BR61C225KA88L 9 4 C29, C30, C31, C32 10µF Capacitor SM1206 Kemet C1206C106K4RACTU 10 1 C35 0.27µF 16V X7R SM0805 Panasonic-ECG ECJ-2YB1C274K 11 5 C40, C42, C45, C49, C50 10µF 20% 16V X5R SM1206 TDK Corporation C3216X5R1C106M 12 1 C43 0.047µF ±10% 25V X7R SM0603 Panasonic-ECG ECJ-1VB1E473K 13 1 D1 STPS20L45CG 45V-20A SCHOTT-2CC D-2PAK ST Micro STPS20L45CG Schottky C11, C12, C13, C14, C15, 47µF C36, C37, C46, C47, C48 ±20% 0.1 14 3 D2, D3, D5 BAT54 30V SOD523 ON Semiconductor BAT54XV2T1OS 15 1 D4 ESDA6V1-4BC6 6.1V, 80W SOT23_6L ST Micro ESDA6V1-4BC6 16 1 D6 GRN 2V SM0805 Chicago Minature CMD17-21VGC 17 1 JP1 4 PIN SIP4/100 Tyco 3-644456-4 18 5 J2, J3, J4, J5, J10 2 PIN SIP2/100 Tyco 3-644456-2 19 1 J6 HEADER HDR10DUAL100X100 Samtec TSW-105-08-T-D-RA 20 1 J7 JACK_BARREL JACK_RA.079PIN Kobiconn 163-5004-E 21 1 J8 SOCKET HDRF5DUALRA100X100 Samtec SSQ-105-02-T-D-RA 1.5A AN1463.0 August 20, 2009 22 1 J9 HEADER 5x2 PIN 23 1 L2 0.45µH HDR10DUAL100X100 24 1 L40 22µH 25 3 P1, P2, P3 JACK_BANANA 15A 26 2 Q1, Q4 FDG6303N 25V 27 1 Q2 FDG6304P 25V 28 2 Q5, Q7 BSC042N03LS G 30V 29 1 Q6 2N3904 40V 20% Samtec TSW-105-07-T-D Pulse PA1294.450 IHLP_2525BD COILTRONICS DR73-220-R JACK EMERSON 108-0740-001 Dual N-Chan SC70_6 Fairchild FDG6303N Dual P-Chan SC70_6 Fairchild FDG6304P 70 Inductor 1.62A SH DRUM NPN FLMP/SO8FL_ALLP Infineon SOT-23 ON Semiconductor MMBT3904LT3 Application Note 1463 1 Bill of Materials (Continued) ITEM QTY. 30 2 REFERENCE VALUE Q8, Q9 BSC016N03LS TOL. RATING TYPE 30V 1% PCB FOOTPRINT MANUFACTURER PART NUMBER 12 FLMP/SO8FL_ALLP Infineon SM0402 Vishay/Dale CRCW0402100KFKED SM0402 ROHM MCR01MZPJ000 1/16W SM0402 Vishay/Dale CRCW040211K0FKED THK FILM SM0603 ROHM MCR03EZPFX49R9 2 R1, R3 100k 32 1 R2 0 33 1 R5 11.0k 1% 34 5 R6, R9, R15, R25, R55 49.9R 0.01 35 1 R10 6.65k 1% 1/16W SM0402 Panasonic-ECG ERJ-2RKF6651X 36 8 R11, R12, R13, R14, R22, 10.0k R23, R24, R27 1% 1/16W SM0402 Yageo RC0402FR-0710KL 37 2 R16, R18 21.5k 1% 1/16W SM0402 Vishay/Dale CRCW040221K5FKED 38 1 R17 19.6k 1% 1/16W SM0402 Vishay/Dale CRCW040219K6FKED 39 1 R19 23.7k 1% 1/16W SM0402 Vishay/Dale CRCW040223K7FKED 40 1 R20 26.1k 1% 1/16W SM0402 Vishay/Dale CRCW040226K1FKED 41 1 R21 28.7k 1% 1/16W SM0402 Vishay/Dale CRCW040228K7FKED 42 1 R26 392 1% THK FILM SM0603 Panasonic-ECG ERJ-3EKF3920V 43 2 R31, R33 0 SM0603 ROHM ERJ-3GEY0R00V 44 1 R32 1 1% SM0603 Susumu Co Ltd RP1608S-1R0-F 45 1 R35 3.92k 1% SM0603 Panasonic-ECG ERJ-3EKF3921V 46 2 R40, R44 42.2k 1% SM0603 Panasonic-ECG ERJ-3EKF1622V 47 2 R41, R50 3.3 1% SM0603 Susumu Co Ltd RP1608S-3R3-F 48 1 R42 402 ±1% SM0603 Panasonic-ECG ERJ-3EKF4020V 49 1 R43 1.00k ±1% SM0603 Panasonic-ECG ERJ-3EKF1001V 50 2 R46, R59 0Ω SM0603 ROHM ERJ-3GEY0R00V 1% 1/16W 100mW Resistor AN1463.0 August 20, 2009 51 1 R48 91 SM0603 ROHM MCR03EZPFX91R0 52 1 SW1 SW_SPDT 100mW SW_TOG_SPDT NKK G13AP-RO 53 1 U1 ZL2004 MLF36 Zilker Labs 54 1 U2 MIC2920A-3.3BS SOT223_1234_FLD Micrel 55 1 U3 SN74AUP1G17 SC70_5 Texas Instruments SN74AUP1G17DCKR 56 1 U4 ZL1505 MLF10 57 1 U1002 ZL2105 MLF36_6X6BX ZILKER LABS INC MIC2920A-3.3WS ZL2105ALNFT Application Note 1463 31 Application Note 1463 Default Configuration Text The following text is loaded into the ZL2004EV1 as default settings. Each PMBus command is loaded via the ZL2004EV1 interface software. The # symbol is used for a comment line. # Configuration file for ZL2004 on ZL2004EV1 RESTORE_FACTORY STORE_DEFAULT_ALL STORE_USER_ALL RESTORE_DEFAULT_ALL MFR_ID Zilker_Labs MFR_MODEL ZL2004EV1 Vout MFR_REVISION Rev 2 MFR_LOCATION Austin_TX ON_OFF_CONFIG 0x16 VOUT_COMMAND 1.80 VOUT_MAX 2.16 VOUT_MARGIN_HIGH 1.89 VOUT_MARGIN_LOW 1.71 VOUT_DROOP 0.0 IOUT_SCALE 0.65 IOUT_CAL_OFFSET 1 TON_DELAY 5 TON_RISE 5 TOFF_DELAY 5 TOFF_FALL 5 FREQUENCY_SWITCH 400 VOUT_OV_FAULT_LIMIT 2.07 VOUT_OV_FAULT_RESPONSE 0x80 VOUT_UV_FAULT_LIMIT 1.53 VOUT_UV_FAULT_RESPONSE 0x80 OVUV_CONFIG 0x80 13 AN1463.0 August 20, 2009 Application Note 1463 Default Configuration Text (Continued) IOUT_OC_FAULT_LIMIT 62.5 IOUT_AVG_OC_FAULT_LIMIT 75 IOUT_UC_FAULT_LIMIT -25 IOUT_AVG_UC_FAULT_LIMIT -20 MFR_IOUT_OC_FAULT_RESPONSE 0x80 MFR_IOUT_UC_FAULT_RESPONSE 0x80 MFR_VMON_OV_FAULT_LIMIT 7.8 VMON_OV_FAULT_RESPONSE 0X80 MFR_VMON_UV_FAULT_LIMIT 4.5 VMON_UV_FAULT_RESPONSE 0X80 VIN_OV_WARN_LIMIT 14.3 VIN_OV_FAULT_LIMIT 14.5 VIN_OV_FAULT_RESPONSE 0x80 VIN_UV_WARN_LIMIT 4.4 VIN_UV_FAULT_LIMIT 4.0 VIN_UV_FAULT_RESPONSE 0x80 OT_WARN_LIMIT 110.0 OT_FAULT_LIMIT 120 OT_FAULT_RESPONSE 0x80 UT_WARN_LIMIT -20 UT_FAULT_LIMIT -30 UT_FAULT_RESPONSE 0x80 PID_TAPS A=9829.50, B=-16416.50, C=6637.12 POWER_GOOD_ON 1.62 POWER_GOOD_DELAY 5 DEADTIME 0x3838 DEADTIME_CONFIG 0x0808 MAX_DUTY 94 14 AN1463.0 August 20, 2009 Application Note 1463 Default Configuration Text (Continued) TRACK_CONFIG 0x06 MFR_CONFIG 0x7AD4 NLR_CONFIG 0XD2218363 USER_CONFIG 0x6010 TEMPCO_CONFIG 0xA8 MISC_CONFIG 0x0480 ISHARE_CONFIG 0x0000 INTERLEAVE 0x0000 SEQUENCE 0x0000 DDC_GROUP 0x00000000 DDC_CONFIG 0x0000 INDUCTOR 0.47 STORE_DEFAULT_ALL RESTORE_DEFAULT_ALL Measured Data The following graphs show measured data from the ZL2004EV1 board. Efficiency Adaptive diode emulation and adaptive frequency modes are disabled for this efficiency measurement. 100 VIN = 12V VOUT = 1.8V EFFICIENCY (%) 95 90 85 80 75 70 0 5 10 15 20 25 30 35 40 OUTPUT CURRENT (A) FIGURE 14. EFFICIENCY, VIN = 12V, VOUT = 1.8V, EXTERNAL VDD = 7.5V 15 AN1463.0 August 20, 2009 Application Note 1463 Measured Data The following graphs show measured data from the ZL2004EV1 board. (Continued) Ramp-up/Ramp-down Characteristics 2.0 OUTPUT VOLTAGE (V) 1.5 1.0 0.5 0 -0.5 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.07 0.08 0.09 0.10 TIME (ms) FIGURE 15. RAMP UP WAVEFORM 2.0 OUTPUT VOLTAGE (V) 1.5 1.0 0.5 0 -0.5 0 0.01 0.02 0.03 0.04 0.05 0.06 0.10 TIME (ms) FIGURE 16. RAMP DOWN WAVEFORM 16 AN1463.0 August 20, 2009 Application Note 1463 Measured Data The following graphs show measured data from the ZL2004EV1 board. (Continued) Dynamic Load Response FIGURE 17. DYNAMIC LOAD RESPONSE, 15A TO 25A LOAD STEP Phase/Gain Plot ZL2004EV1, EM20016 TAPS 10054.5, -17917.0, 7941.75 VOUT = 1.8V IOUT = 20A FSW = 400kHz FIGURE 18. ZL2004EV1 PHASE/GAIN PLOT 17 AN1463.0 August 20, 2009 Application Note 1463 References [1] ZL2004 Data Sheet, Zilker Labs, Inc., 2008. [2] AN2033 – PMBus™ Command Set, Zilker Labs, Inc., 2008. Ordering Information PART NUMBER ZL2004EVK1 DESCRIPTION ZL2004 Evaluation Kit, one channel Revision History DATE REV. # CHANGE August 2009 AN1463.0 April 2008 1.0 Initial Release July 2008 1.1 Updated output capacitor values from 47µF to 100µF August 2008 1.2 Updated schematic and BOM. Changed R40, R44 from 16.2k to 42.2k ZL2105 device address changed from 0x25 to 0x2F September 2008 1.3 Updated Default Configuration text October 2008 1.4 Changed dynamic response limit from 3% to 3.5% Converted to Intersil format and assigned file number AN1463. This is the first release with this file number. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 18 AN1463.0 August 20, 2009