M62384FP 8-Bit, 4-Channel, 3 to 5 V D-A Converter (Buffered) REJ03F0077-0100Z Rev.1.0 Sep.19.2003 Description The M62384 is a CMOS-structure semiconductor integrated circuit incorporating four 8-bit D-A converter channels with output buffer op-amps. Serial data transfer type input can easily be used through a combination of three lines: DI, CLK, and LD. Outputs incorporate buffer op-amps that have a drive capacity of 1 mA or above for both sink and source, and can operate over the entire voltage range from almost ground to VCC (0 to 5 V), making peripheral elements unnecessary and enabling configuration of a system with few component parts. Support of power supply voltages of 3 V to 5 V enables the M62384 to be used in a wide range of applications. Features • 12-bit serial data input (3-line type: SDI, SCK, SLD) • Serial data transfer clock frequency: 10 MHz (max.) • Output buffer op-amps Operable over entire voltage range from almost ground to VCC • Power-on reset and external reset functions • Chip select function Up to 4 chips connectable on the same bus • Supported power supply voltage: 3 V to 5 V (2.7 V to 5.5 V) Application Signal gain setting and automatic adjustment in CTV and display monitors, conversion from digital data to analog data in consumer and industrial products Pin Connection Diagram (Top View) 16 CS1 Ao1 2 15 CS0 Ao2 3 14 RST VCC 4 Vref 5 Ao3 6 Ao4 7 GND 8 M62384FP GND 1 13 VDD 12 SCK 11 SDI 10 SLD 9 VSS Package: 16P2N This product is currently under development, and specifications and other details may be modified at a future date. Rev.1.0, Sep.19.2003, page 1 of 8 M62384FP Block Diagram SDI 11 12-bit shift register SCK 12 VDD 13 RST 14 VSS 9 Vref 5 8 Power-on reset 10 SLD Channel decoder 16 CS1 15 CS0 8-bit latch 8-bit latch 8-bit latch 8-bit latch 8-bit D-A 8-bit D-A 8-bit D-A 8-bit D-A VCC 4 Rev.1.0, Sep.19.2003, page 2 of 8 2 3 6 7 Ao1 Ao2 Ao3 Ao4 1 GND M62384FP Pin Functions Pin No. Symbol Function 1, 8 GND Analog GND: analog circuit GND (D-A converter lower reference voltage) 2 Ao1 D-A converter output pins (ch1 to ch4): full-swing buffer output Output voltage: Ao (00)h = 0V, Ao (FF)h = 255/256 × VREF 3 6 Ao2 Ao3 7 4 Ao4 Vcc 5 9 Vref Vss D-A converter upper reference voltage input pin Digital GND 10 SLD Serial load signal input pin (Schmitt trigger input: with input hysteresis) When SLD is high, data is loaded from shift register into 8-bit latch corresponding to address. 11 SDI Serial data input pin (TTL input in case of 5 V power supply) Inputs serial data with a 12-bit data length (MSB-first). 12 SCK Serial clock signal input pin (Schmitt trigger input: with input hysteresis) At rising edge, data is read into shift register one bit at a time. 13 VDD Digital power supply pin (3 V to 5 V) When power supply rises, D-A output is reset (0 V output: power-on reset). 14 RST Forced reset pin (TTL input in case of 5 V power supply) L: D-A output (AO1 to 4) = Fixed setting of 0 V H: Reset release (power-on reset operation) 15 CS0 16 CS1 Chip select pins (TTL input in case of 5 V power supply) Access possible only when chip select data (D11, D10) and pin (CS1, CS0) logic match. Analog power supply (3 V to 5 V) Must rise simultaneously with VDD or after VDD rise. Absolute Maximum Ratings (Unless specified otherwise, Ta = 25ºC) Item Symbol Rated Value Unit Power supply voltage VCC,VDD -0.3 to 7.0 V Digital input voltage Reference voltage input voltage VDIN Vref -0.3 to Vcc+0.3 (≤ 7.0) -0.3 to Vcc+0.3 (≤ 7.0) V V D-A output voltage Permissible loss VAO Pd -0.3 to Vcc+0.3 (≤ 7.0) 300 V mW Operating ambient temperature Storage temperature Topr Tstg -20 to +75 -40 to +125 °C °C Rev.1.0, Sep.19.2003, page 3 of 8 Conditions DC voltage (“H” level) M62384FP Recommended Operating Conditions (Unless specified otherwise, VCC = VDD = 5 V ±10%, Vref = 2 V to VCC, VSS = GND = 0 V, fsck = 5 MHz, VDINH = VDD, VDINL = VSS, Ta = 20ºC to 75ºC) Specification Values Item Symbol Min. Analog power supply voltage Digital power supply voltage VCC VDD Reference voltage Serial clock frequency Typ. Max. Unit Test Conditions 2.7 2.7 5.5 5.5 V V VCC = VDD VCC = VDD Vref fsck 2.0 5.5 10 V MHz Vref ≤ VCC “H” level digital input voltage “L” level digital input voltage VDINH VDINL 0.5VDD VSS VDD 0.2VDD V V Clock “H” pulse width Clock “L” pulse width tsckH tsckL 30 30 Clock rise time Clock fall time tsckR tsckF Data setup time Data hold time tDCH tCHD 10 20 ns ns Load setup time Load hold time tCHL tLDC 40 20 ns ns Load “H” pulse width Reset “L” pulse width tLDH tRSTL 20 50 ns ns Load setup time after reset release tRCHL 50 ns ns ns 200 200 VCC = VDD ≥ 2.7V VCC = VDD ≥ 2.7V ns ns Timing Chart t SCKR t SCKH t SCKF SCK t SCKL SDI t LDC t DCH t CHD t LDH t CHL SLD t LDD t RCHL AO RST t RSTL Rev.1.0, Sep.19.2003, page 4 of 8 M62384FP Electrical Characteristics (Unless specified otherwise, VCC = VDD = 5 V ±10%, Vref = 2 V to VCC, VSS = GND = 0 V, fsck = 5 MHz, VDINH = VDD, VDINL = VSS, Ta = 20ºC to 75ºC) (1) Digital block Specification Values Item Symbol Digital block circuit current IDD Input leakage current Input threshold voltage IDINLK VDINT Input hysteresis voltage ∆VDINT Min. Typ. −10 0.2VDD 0 Max. Unit 1.0 mA 10 0.5VDD µA V 100 Test Conditions VDIN = VSS to VDD mV (2) Analog block Specification Values Item Symbol Typ. Max. Unit Test Conditions Analog block circuit current ICC Min. 0.8 2.0 mA No load Reference voltage input current Iref 0.5 1.0 mA All channels: Maximum current conditions VCC = VDD = 2.7V to 5.5V IA0: With no load Differential nonlinearity error SDL −1.0 1.0 LSB Nonlinearity error Zero scale error SNL SZERO −1.5 −2.0 1.5 2.0 LSB LSB Full-scale error Output current SFULL IAO −2.0 ±0.5 2.0 LSB mA Settling time tLDD Power-on reset voltage VPR 0.8 5 10 µS 1.5 2.5 V VOA = 0.1V to VCC − 0.1V VOA = 0.5↔4.5V, IOA = 0.1mA, Co = 50pF output absorbed within ±0.5 LSB VCC = 0 V → 5 V, V0A = 0 V setting voltage (reference values) Digital Data Format MSB(First) D11 LSB D10 D9 D8 D7 D6 D5 Chip select data Address data D4 D3 D2 D1 D0 DAC data (1) Chip select data D11 D10 CS1 CS0 0 0 L L 0 1 1 0 L H H L 1 1 H H Data is transferred only when logic of D11 and D10 matches CS pin setting (CS1, CS0). Rev.1.0, Sep.19.2003, page 5 of 8 M62384FP (2) Address data D8 D9 Channel Selection 0 0 AO1 selected 0 1 AO2 selected 1 1 0 1 AO3 selected AO4 selected DAC Data D7 D6 D5 D4 D3 D2 D1 D0 D-A output 0 0 0 0 0 0 0 0 (0/256)×Vref 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 (1/256)×Vref (2/256)×Vref 0 ⋅⋅ ⋅ 0 ⋅⋅ ⋅ 0 ⋅⋅ ⋅ 0 ⋅⋅ ⋅ 0 ⋅⋅ ⋅ 0 ⋅⋅ ⋅ 1 ⋅⋅ ⋅ 1 ⋅⋅ ⋅ (3/256)×Vref 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 (254/256)×Vref (255/256)×Vref ⋅⋅ ⋅ Data Timing Chart SDI D11 D10 D9 D8 D2 D1 D0 SCK SLD Ao When SLD is high, data captured in the shift register is loaded into the 8-bit latch corresponding to the address. Therefore, SCK should be held high or low when SLD is high. Rev.1.0, Sep.19.2003, page 6 of 8 M62384FP Sample Application Circuit SDI SCK MCU SLD RST RST SLD SCK SDI VCC VDD VCC Ao1 VDD Vref Chip select setting (connected to either VDD or GND) Vref CS0 Ao3 CS1 GND GND Ao2 Ao4 VSS M62384FP Rev.1.0, Sep.19.2003, page 7 of 8 HE Rev.1.0, Sep.19.2003, page 8 of 8 G Z1 E 1 16 EIAJ Package Code SOP16-P-300-1.27 z Detail G e D JEDEC Code — y b 8 9 x Weight(g) 0.2 M F A Detail F A2 Lead Material Cu Alloy L1 MMP c A1 A A1 A2 b c D E e HE L L1 z Z1 x y Symbol e1 b2 e1 I2 b2 Dimension in Millimeters Min Nom Max 2.1 0.2 0.1 0 — 1.8 — 0.5 0.4 0.35 0.25 0.2 0.18 10.2 10.1 10.0 5.4 5.3 5.2 — 1.27 — 8.1 7.8 7.5 0.8 0.6 0.4 — 1.25 — — 0.605 — — 0.755 — — 0.25 — 0.1 — — 0˚ — 8˚ — 0.76 — — 7.62 — — 1.27 — Recommended Mount Pad e Plastic 16pin 300mil SOP I2 16P2N-A M62384FP Package Dimensions L Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. http://www.renesas.com RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 © 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0