M61516FP
7.1ch Electronic Volume with 10 Input Selector
REJ03F0204-0201
Rev.2.01
Mar 31, 2008
Application
Receiver, AV Amp, Mini Stereo etc.
Feature
• Electronic volume
(1) 8 channel Independent Electronic Volume with High Voltage Transistor. (0 ~ –92 dB/1 dB step, –95, –∞ dB)
(2) Built-in Zero-Crossing Detector Circuit for reduce click noise at changing volume value.
• Tone control
(1) Bass/Treble, 0 to ±10 dB/2 dB step
(2) Add a Bypass Model/Tone Mode changing SW
• Input selector
(1) Front L/R channel 10 Input Selector
(2) 2 sets of multi channel input
• REC output
4 Lines REC Output (Both L and R channels)
• Input attenuator
0/–3/–6/–9/–12 dB
• Output gain control
0/+3/+6/+9/+12 dB
• Balance out
Built-in Balance out (for ADC)
• Loudness *1
Built-in Loudness circuit of center tap type in FL/FRch
Note: 1. Balance output and loudness function can't be used at the same time.
Recommended Operating Condition
Supply voltage range: AVCC = 7.0 V (Typ), AVEE = –7.0 V (Typ), DVDD = 5.0 V (Typ)
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 1 of 22
M61516FP
TONE
Zero Cross
Loudness
Tap
CLOCK
LATCH
DATA
DGND
DVDD
REC OUTL
AVEE
AVCC
System Block Diagram
µ-COM
Interface
Output Gain
Control
TONE
Lch
Rch
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
Loudness
Tap
Input
attenuator
TONE
Loudness
/Balance – Output L
Input
attenuator
Output Gain
Control
TONE
FLchVOL
To Loudness tap
FRchVOL
To Loudness tap
FLOUT
Zero-Cross
Zero-Cross
FROUT
Zero-Cross
COUT
Zero-Cross
SLOUT
Zero-Cross
SBLOUT
Zero-Cross
SBROUT
Zero-Cross
SROUT
Zero-Cross
SWOUT
Balance + Output L
INGND
Loudness
/Balance – Output R
Balance + Output R
REC OUTR
VOLGND OUTGND
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 2 of 22
M61516FP
TRE R 41
SWIN2 47
25 LATCH
26 DATA
21 FLVIN
50 k
+
–
FR VOL
Loudness
A
Loudness Tap
B
20 TONEOUT L
Tone
Output
Selector
19 TRE L
18 BASS L2
50 k
FRONT channel
Input selector
50 k
50 k
SR VOL SBR VOL SW VOL
50 k
C VOL
+
–
+
–
+
–
+
–
+
–
SBLIN2 49
+
–
CIN2 48
SLIN2 50
22 VOLGND2
FL VOL
–
+
TONE
BASS/TRE
SBRIN2 46
Output
Gain
Control
50 k
50 k
SRIN2 45
23 TIM1
ZERO CROSS
DITECTOR&
TIMER
DITECTOR
TONE
BASS/TRE
FRIN2 44
–
+
+
–
Tone
Output
Selector
50 k
BASS R1 43
24 DVDD
MCU
I/F
Output
Gain
Control
BASS R2 42
27 CLOCK
28 DGND
29 AVCC
30 OUTGND
31 FLOUT
32 SLOUT
33 SBLOUT
34 COUT
35 SWOUT
36 SBROUT
37 SROUT
38 FROUT
39 FRVIN
40 TONEOUT R
Block Diagram and Pin Configuration (Top View)
50 k
SBL VOL
17 BASS L1
16 FRIN1
50 k
15 SRIN1
FRONT
channel
Input
selector
SL VOL
FLIN2 51
14 SBRIN1
VOLGND3 52
13 SWIN1
VOLGND4 53
12 CIN1
BALANCE L/+ 54
11 SBLIN1
Lch Balance Output
+
–
BALANCE L/–/LOUD L 55
A
Loudness
B
10 k
10 SLIN1
10 k Lch
BALANCE Out
9
FLIN1
8
VOLGND1
7
REC L4
6
REC L3
5
REC L2
4
REC L1
3
INLJ
INRJ 63
2
INLI
INRI 64
1
INLH
REC SW
+
–
50 k
50 k
REC SW
50 k
–
+
REC SW
–
+
REC SW
Input Selector
Input Selector
INLG 80
INLF 79
INLE 78
INLD 77
INLC 76
INLB 75
INLA 74
AVEE 73
INRA 72
INRB 71
INRC 70
INRD 69
INRE 68
INRG 66
INRH 65
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 3 of 22
50 k
Input attenuator
Input attenuator
50 k
REC R1 62
REC SW
50 k
REC R2 61
REC SW
50 k
REC R3 60
50 k
REC R4 59
REC SW
+
–
REC SW
INRF 67
BALANCE R/+ 58
10 k
Rch Balance Output
50 k
–
+
BALANCE R/–/LOUD R 57
10 k Rch
50 k
INGND 56
M61516FP
Pin Description
Pin No.
Name
Function
74, 75, 76, 77,
78, 79, 80, 1, 2, 3
INLA, B, C, D, E, F, G, H, I, J
Input pin of L channel (10 Input Selector)
4, 5, 6, 7,
59, 60, 61, 62
Output pin of REC (Lch and Rch)
8, 22, 52, 53
9, 51
10, 50
11, 49
12, 48
13, 47
14, 46
15, 45
16, 44
17, 18, 42, 43
19, 41
20, 40
REC L1, L2, L3, L4
REC R1, R2, R3, R4
VOLGND 1, 2, 3, 4
FLIN1/FLIN2
SLIN1/SLIN2
SBLIN1/SBLIN2
CIN1/CIN2
SWIN1/SWIN2
SBRIN1/SBRIN2
SRIN1/SRIN2
FRIN1/FRIN2
BASS L1, L2/BASS R1, R2
TRE L/ TRE R
TONEOUT L/TONEOUT R
21
23
FLVIN
TIM1
Input pin of FL channel volume
Timer setting terminal for Zero-Cross Detector
24
12, 26, 27
28
29
30
31
32
33
34
35
36
37
38
39
54, 55
56
57, 58
DVDD
LATCH, DATA, CLOCK
DGND
AVCC
OUTGND
FLOUT
SLOUT
SBLOUT
COUT
SWOUT
SBROUT
SROUT
FRONT
FRVIN
LOUDL/BALANCE L/+, L/–
INGND
LOUDR/BALANCE R/+, R/–
Power supply to internal logic circuit
Input pin of Control trigger/data/clock
Ground of internal logic circuit
Positive power supply to internal analog circuit
Ground for OUTPUT Block
Output pin of FL channel
Output pin of SL channel
Output pin of SBL channel
Output pin of C channel
Output pin of SW channel
Output pin of SBR channel
Output pin of SR channel
Output pin of FR channel
Input pin of FR channel volume
Pin of L channel loudness setting/Balance output (+/–)
Ground for Input Block
Pin of R channel loudness setting/Balance output (+/–)
63, 64, 65, 66, 67,
68, 69, 70, 71, 72
73
INRA, B, C, D, E, F, G, H, I, J
Input pin of R channel (10 Input Selector)
AVEE
Negative power supply to internal analog circuit
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 4 of 22
Analog Ground (for 8ch Volume)
Input pin of FL channel (2 Input Selector)
Input pin of SL channel (2 Input Selector)
Input pin of SBL channel (2 Input Selector)
Input pin of C channel (2 Input Selector)
Input pin of SW channel (2 Input Selector)
Input pin of SBR channel (2 Input Selector)
Input pin of SR channel (2 Input Selector)
Input pin of FR channel (2 Input Selector)
Frequency characteristic setting pin in the tone control (BASS)
Frequency characteristic setting pin in the tone control (TREBLE)
Output pin of tone
M61516FP
Absolute Maximum Ratings
Item
Power supply
Symbol
Supply voltage
Power dissipation
Thermal derating
Operating temperature
Storage temperature
Pd
Kθ
Topr
Tstg
Ratings
±7.8
6.0
1250
12.5
–20 ~ +55
–40 ~ +125
Unit
V
mW
mW/°C
°C
°C
Thermal Deratings
(Maximum Rating)
Power Dissipation Pd (W)
1.5
1.0
0.5
0
0
25
55
50
75
100
125
150
Ambient Temperature Ta (°C)
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 5 of 22
Condition
AVCC – AVEE
DVDD – GND
Ta ≤ 25 °C
Ta > 25 °C
M61516FP
Recommended Operating Conditions
(Ta = 25 °C, unless otherwise noted)
Item
Analog supply voltage (Positive)
Analog supply voltage (Negative)
Digital supply voltage
Logic "H" level input voltage
Logic "L" level input voltage
Note:
Symbol
AVCC
AVEE
DVDD
VIH
VIL
Min
4.5
–7.3
4.5
2.4
DGND
Typ
7.0
–7.0
5.0
—
—
Max
7.3
–4.5
5.5
DVDD
0.5
Unit
V
V
V
V
V
Condition
DGND reference
DGND reference
VEE ≤ DGND < VDD ≤ VCC
Relationship between Data and Clock
LATCH SIGNAL
H
DATA
D0
D1
D29
L
H
CLOCK
L
H
LATCH
L
Note:
Data signal is read at the rising edge of clock.
Signal in latched at the rising edge of the latch signal.
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 6 of 22
D30
D31
D0
M61516FP
Clock and Data Timings
tSC
tcr
75%
CLOCK
25%
25%
tr
tf
tWLC
tWHC
75%
DATA
25%
tr
tf
tSD
tHD
tr
tWHC
tf
tSL
75%
LATCH
25%
Timing Definition of Digital Block
Item
Clock cycle time
Clock pulse width ("H" level)
Clock pulse width ("L" level)
Rising time of clock, data and latch
Falling time of clock, data and latch
Data setup time
Data hold time
Latch setup time
Latch pulse width
Clock setup time
Symbol
tcr
tWHC
tWLC
tr
tf
tSD
tHD
tSL
tWHL
tSC
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 7 of 22
Min
Limits
Typ
Max
Unit
8
3.2
3.2
—
—
1.6
1.6
2
3.2
8
—
—
—
—
—
—
—
—
—
—
—
—
—
0.8
0.8
—
—
—
—
—
µs
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 8 of 22
Tone
Output
Selector
SBLch Volume
Cch Volume
Tone
Control
Bass
Tone
Control
Treble
SBRch Volume
SWch Volume
REC REC REC REC Balance
Output Output Output Output /loudness
1
2
3
4
0
Note: When D30 = 0, D31 = 1 and D30 = 1 , D31 = 0 slots are set up, the detection movement of Zero-Cross is done.
Refer to 15 ~ 19 pages for the setting data transmitting interval.
SRch Volume
Front
Channel
Input
Selector
SLch Volume
VOL
Input
Selector
FRch Volume
Output
Gain
Control
FLch Volume
Input Selector
Input
attenuator
0
0
0
All ch
LoudOutput
ness
Mute
0
1
0
0
0
1
0
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
M61516FP
Data Control Specification
For kinds of input format options are availably by changing slot settings of D30, D31.
When the IC is powered up, the internal setting are not fixed.
M61516FP
Setting Code
Early Establishment
(1) Input Selector
(D30 = 0, D31 = 0)
Setting
ALL OFF
A
B
C
D
E
F
G
H
I
J
D0
0
0
0
0
0
0
0
0
1
1
1
(6) Tone Control (Bass/Treble)
(D30 = 0, D31 = 0)
D1
0
0
0
0
1
1
1
1
0
0
0
D2
0
0
1
1
0
0
1
1
0
0
1
(2) Input Attenuator
(D30 = 0, D31 = 0)
Setting
0 dB
–3 dB
–6 dB
–9 dB
–12 dB
D4
0
0
0
0
1
D3
0
1
0
1
0
1
0
1
0
1
0
ATT
Bass
Treble
+10 dB
+8 dB
+6 dB
+4 dB
+2 dB
0 dB
–2 dB
–4 dB
–6 dB
–8 dB
–10 dB
D5
0
0
1
1
0
D6
0
1
0
1
0
Setting
External IN1
External IN2
D8
0
0
1
1
0
OFF
ON
D9
0
1
0
1
0
(4) Tone Input Selector
(D30 = 0, D31 = 0)
Setting
Bypass
Tone
0
1
(5) All Channel Output Mute
(D30 = 0, D31 = 1)
D28
0
Mute ON
1
D17
D21
1
0
1
0
1
0
1
0
1
0
1
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 9 of 22
D10
0
1
D29
0
1
(9) FRONT Input Selector
(D30 = 0, D31 = 0)
Setting
Bypass
External IN1
External IN2
D11
0
0
1
D12
0
1
0
(10) Balance/Loudness Change SW
(D30 = 0, D31 = 0)
D13
Setting
Mute OFF
D16
D20
0
0
1
1
0
0
0
1
1
0
0
(8) Loudness
(D30 = 0, D31 = 1)
Setting
D7
0
0
0
0
1
D15
D19
1
1
0
0
0
0
0
0
0
1
1
(7) Volume Input Selector
(D30 = 0, D31 = 0)
(3) Output Gain Control
(D30 = 0, D31 = 0)
Setting
0 dB
+3 dB
+6 dB
+9 dB
+12 dB
D14
D18
1
1
1
1
1
0
0
0
0
0
0
Setting
Balance Out
Loudness
D26
0
1
(11) REC Output
(D30 = 0, D31 = 0)
REC Output
Setting
OFF
ON
REC1
D22
REC2
D23
REC3
D24
REC4
D25
0
1
0
1
0
1
0
1
M61516FP
(12) 8 Channel Volume
(FLch, FRch, Cch, SWch: D30 = 0, D31 = 1/SLch, SRch, SBLch, SBRch: D30 = 1, D31 = 0)
FLch
SLch
D0
D1
D2
D3
D4
D5
D6
FRch
SRch
D7
D8
D9 D10 D11 D12 D13
Cch
SBLch D14 D15 D16 D17 D18 D19 D20
SWch
ATT SBRch D21 D22 D23 D24 D25 D26 D27
0 dB
0
0
0
0
0
0
0
–1 dB
0
0
0
0
0
0
1
–2 dB
0
0
0
0
0
1
0
–3 dB
0
0
0
0
0
1
1
–4 dB
0
0
0
0
1
0
0
–5 dB
0
0
0
0
1
0
1
–6 dB
0
0
0
0
1
1
0
–7 dB
0
0
0
0
1
1
1
–8 dB
0
0
0
1
0
0
0
–9 dB
0
0
0
1
0
0
1
–10 dB
0
0
0
1
0
1
0
–11 dB
0
0
0
1
0
1
1
–12 dB
0
0
0
1
1
0
0
–13 dB
0
0
0
1
1
0
1
–14 dB
0
0
0
1
1
1
0
–15 dB
0
0
0
1
1
1
1
–16 dB
0
0
1
0
0
0
0
–17 dB
0
0
1
0
0
0
1
–18 dB
0
0
1
0
0
1
0
–19 dB
0
0
1
0
0
1
1
–20 dB
0
0
1
0
1
0
0
–21 dB
0
0
1
0
1
0
1
–22 dB
0
0
1
0
1
1
0
–23 dB
0
0
1
0
1
1
1
–24 dB
0
0
1
1
0
0
0
–25 dB
0
0
1
1
0
0
1
–26 dB
0
0
1
1
0
1
0
–27 dB
0
0
1
1
0
1
1
–28 dB
0
0
1
1
1
0
0
–29 dB
0
0
1
1
1
0
1
–30 dB
0
0
1
1
1
1
0
–31 dB
0
0
1
1
1
1
1
–32 dB
0
1
0
0
0
0
0
–33 dB
0
1
0
0
0
0
1
–34 dB
0
1
0
0
0
1
0
–35 dB
0
1
0
0
0
1
1
–36 dB
0
1
0
0
1
0
0
–37 dB
0
1
0
0
1
0
1
–38 dB
0
1
0
0
1
1
0
–39 dB
0
1
0
0
1
1
1
–40 dB
0
1
0
1
0
0
0
–41 dB
0
1
0
1
0
0
1
–42 dB
0
1
0
1
0
1
0
–43 dB
0
1
0
1
0
1
1
–44 dB
0
1
0
1
1
0
0
–45 dB
0
1
0
1
1
0
1
–46 dB
0
1
0
1
1
1
0
–47 dB
0
1
0
1
1
1
1
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 10 of 22
FLch
SLch
D0
D1
D2
D3
D4
D5
D6
FRch
SRch
D7
D8
D9 D10 D11 D12 D13
Cch
SBLch D14 D15 D16 D17 D18 D19 D20
SWch
ATT SBRch D21 D22 D23 D24 D25 D26 D27
–48 dB
0
1
1
0
0
0
0
–49 dB
0
1
1
0
0
0
1
–50 dB
0
1
1
0
0
1
0
–51 dB
0
1
1
0
0
1
1
–52 dB
0
1
1
0
1
0
0
–53 dB
0
1
1
0
1
0
1
–54 dB
0
1
1
0
1
1
0
–55 dB
0
1
1
0
1
1
1
–56 dB
0
1
1
1
0
0
0
–57 dB
0
1
1
1
0
0
1
–58 dB
0
1
1
1
0
1
0
–59 dB
0
1
1
1
0
1
1
–60 dB
0
1
1
1
1
0
0
–61 dB
0
1
1
1
1
0
1
–62 dB
0
1
1
1
1
1
0
–63 dB
0
1
1
1
1
1
1
–64 dB
1
0
0
0
0
0
0
–65 dB
1
0
0
0
0
0
1
–66 dB
1
0
0
0
0
1
0
–67 dB
1
0
0
0
0
1
1
–68 dB
1
0
0
0
1
0
0
–69 dB
1
0
0
0
1
0
1
–70 dB
1
0
0
0
1
1
0
–71 dB
1
0
0
0
1
1
1
–72 dB
1
0
0
1
0
0
0
–73 dB
1
0
0
1
0
0
1
–74 dB
1
0
0
1
0
1
0
–75 dB
1
0
0
1
0
1
1
–76 dB
1
0
0
1
1
0
0
–77 dB
1
0
0
1
1
0
1
–78 dB
1
0
0
1
1
1
0
–79 dB
1
0
0
1
1
1
1
–80 dB
1
0
1
0
0
0
0
–81 dB
1
0
1
0
0
0
1
–82 dB
1
0
1
0
0
1
0
–83 dB
1
0
1
0
0
1
1
–84 dB
1
0
1
0
1
0
0
–85 dB
1
0
1
0
1
0
1
–86 dB
1
0
1
0
1
1
0
–87 dB
1
0
1
0
1
1
1
–88 dB
1
0
1
1
0
0
0
–89 dB
1
0
1
1
0
0
1
–90 dB
1
0
1
1
0
1
0
–91 dB
1
0
1
1
0
1
1
–92 dB
1
0
1
1
1
0
0
–95 dB
1
0
1
1
1
1
1
–∞ dB
1
1
1
1
0
0
0
M61516FP
Electrical Characteristics
Unless otherwise noted, Ta = 25 °C, AVCC = 7 V, AVEE = –7 V, DVDD = 5 V, f = 1 kHz, RL = 10 kΩ,
Tone/Volume = 0 dB, Front channel Input selector/Tone Output Selector = Bypass,
Input attenuator/output Gain Control = 0 dB
(1) Power Supply Characteristics
Item
Symbol
Min
Limits
Typ
Max
Unit
Test Condition
With AVDD = 7 V and AVSS = –7 V
Pin 29 pin current, when no signal is provided
With AVDD = 7 V and AVSS = –7 V
Pin 73 pin current, when no signal is provided
With DVDD = 5 V
Pin 24 pin current, when no signal is provided
Analog positive power
circuit current
AIcc
—
50
70
mA
Analog negative power
circuit current
AIee
—
50
70
mA
Digital power circuit
current
DIdd
—
3.0
6.0
mA
(2) Input/Output Characteristics (Over All)
Item
Min
Limits
Typ
Max
Unit
Test Condition
25
50
100
kΩ
3.0
4.2
—
Vrms
9 ~ 16, 44 ~ 51 pin
When each selector chooses a terminal concerned.
THD = 1%
–2.0
—
0
0.005
2.0
0.09
dB
%
Vn
(VOL)
—
4
12
µVrms
Vn
(tone)
—
8
16
µVrms
Symbol
Ri
Input
resistance
Maximum input VOM
voltage
Pass gain
Gv
Distortion
THD
Output noise
voltage
Vi = 0.3 Vrms, FLAT
DIN-AUDIO
Vi = 0.3 Vrms
JIS-A, Rg = 0 Ω
Tone Output selector = Bypass
JIS-A, Rg = 0 Ω
Tone Output Selector = Tone
(3) 8 Channel Volume Characteristics
Symbol
Min
Limits
Typ
Max
Unit
Test Condition
Maximum attenuation
ATTmax
—
–100
–90
dB
Volume gain between channels
Cross talk between channels
Dvol
CT
–1.5
—
0
–80
1.5
–65
dB
dB
Volume setting = 0 dB
Vi = 1 Vrms, JIS-A, VOL = –∞
Pin 31, 32, 33, 34, 35, 36, 37, 38 output
Item
Vo = 0.5 Vrms, RL = 10 kΩ, JIS-A,
Rg = 0 Ω
(4) Tone Control Characteristics
Unless otherwise noted, Front channel Input selector = external IN1, Tone Output Selector = Tone,
Input pin 9, 16, Output pin 20, 40
Symbol
Min
Limits
Typ
Max
Unit
Test Condition
Tone control voltage gain
(Boost/Bass)
G (BASS) B
+8
+10
+12
dB
Tone control voltage gain
(Cut/Bass)
G (BASS) C
–8
–10
–12
dB
Tone control voltage gain
(Boost/Treble)
G (TRE) B
+8
+10
+12
dB
Tone control voltage gain
(Cut/Treble)
G (TRE) B
–8
–10
–12
dB
Balance between channels
BALT
–2
0
+2
dB
f = 100 Hz
Bass +10 dB setting
f = 100 Hz
Bass –10 dB setting
f = 10 kHz
Treble +10 dB setting
f = 10 kHz
Treble –10 dB setting
Boost condition +10, –10 dB
Item
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 11 of 22
50 k
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 12 of 22
63
64
65
66
67
68
69
70
71
72
50 k
+
–
50 k
50 k
50 k
50 k
REC output
4 5 6 7
10 k
B A
Loudness
Tap
Balance/loudness
Change SW
56
FRIN2 58
FRIN1 16
SRIN2 57
SRIN1 15
SBRIN2 56
SBRIN1 14
SWIN2 55
SWIN1 13
CIN2 54
CIN1 12
SBLIN2 53
SBLIN1 11
SLIN2 52
SLIN1 10
FLIN2 51
FLIN1 9
–
57
–
55
10 k
10 k
Front channel
Input Selector
+
54
Front channel
Input Selector
Volume Input
Selector
20 k
–
+
Input attenuator
(0, –3, –6, –9, –12 dB)
Input attenuator
(0, –3, –6, –9, –12 dB)
50 k
INLA
INLB
INLC
INLD
INLE
INLF
INLG
INLH
INLI
INLJ
50 k
20 k
10 k
+
+
–
58
+
–
AVEE 73
–7 V
74
75
76
77
78
79
80
1
2
3
+
–
INRJ
INRI
INRH
INRG
INRF
INRE
INRD
INRC
INRB
INRA
+
–
62 61 60 59
Rch
Lch
Balance Out
Balance Out
REC output (Loudness) INGND (Loudness)
SLVOL
6.2 k
37
36
35
34
33
32
0.1 µ
18
Tone
Bass/Treble
+
–
+
–
+
–
+
–
+
–
+
–
17
0.1 µ
50 k
SRVOL
50 k
SBRVOL
50 k
SWVOL
50 k
CVOL
50 k
SBLVOL
50 k
42
0.1 µ
Tone
Bass/Treble
43
0.1 µ
6.2 k
19
3300 p
SROUT
SBROUT
SWOUT
COUT
SBLOUT
SLOUT
41
3300 p
40
20
Tone Output Selector
+
–
TIMER
DITECTOR
ZERO CROSS
DITECTOR
(8 ch)
–
+
Tone Output Selector
OUTGND
30
50 k
+
–
FRVOL
50 k
21
+
–
38
FLOUT
31
0.22 µ
23
CLOCK
DATA
27
LATCH
26
25
FROUT
53 VOLGND4
52 VOLGND3
22 VOLGND2
8 VOLGND1
Output Gain Control
50 k
50 k
FLVOL
MCU
I/F
Output gain Control
39
DVDDAVCC
DGND +5 V +7 V
28
24 29
M61516FP
Block Diagram
M61516FP
Tone Control
(1) Bass
<Boost>
–
OUT
+
IN
+
–
R3
R2
1
f0 =
2π
C1C2R2
1
C1 + C2
R1
Q≈
C1
C2
GV = 20 log
R1
(HZ)
R1 (R2 + R3) C1C2
R2 + R3
R1 + 2
R3 + 2
R1
<Cut>
IN
+
–
OUT
–
+
R2
1
f0 =
Q≈
2π
R3
(HZ)
R1 (R2 + R3) C1C2
C1C2R2
1
C1 + C2
R1
GV = 20 log
R3 + 2
R1
R2 + R3 + 2
R1
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 13 of 22
C2
R1
(dB)
C1
(dB)
M61516FP
(2) Treble
<Boost>
–
+
IN
OUT
+
–
R2
R1
R1 + R2
GV = 20 log
R1
(dB)
C1
<Cut>
IN
+
–
R2
–
+
R1
GV = 20 log
R1
R1 + R2
(dB)
C1
<Curve of characteristics>
Tone gain GV (dB)
+10 dB
0 dB
–10 dB
100
1k
Frequency f (Hz)
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 14 of 22
10 k
OUT
M61516FP
Balance/Loudness
M61516FP has balance output (L/R channel) for external A/D converter.
The balance output (negative side/pin 55, 57) can use not only balance output also loudness capacitor connection
terminal. (for loudness frequency setting) Please choose balance output or loudness capacitor connection terminal
comply with your system.
Balance output and loudness function can't used at the same time.
1. Balance Output
Balance/Loudness function switch setting: Balance Output (D26 = 0, D30 = 0, D31 = 0)
Tone amp
–+
–+
Input gain control
10 k
– +
10 k
To loudness tap in volume block
54 (58)
balance/loudness
Function switch: set balance output
55 (57)
A/D converter
2. Loudness
Balance/Loudness function switch setting: loudness (D26 = 1, D30 = 0, D31 = 0)
M61516FP has loudness circuit center tap type in FL/FRch volume block
<A chracteristic curve>
31 (38)
0
Output gain control
Loudness switch
balance/loudness
function switch: loudness setup
(57) 55
Loudness capacitor
the frequency establishment
Tone output gain GV (dB)
(ATT = –16 dB point)
Connect to loudness tap
FL/FRch Volume
– +
(39) 21
–5 dB
–10
–20
–30
100
1k
10 k
Frequency f (Hz)
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 15 of 22
M61516FP
Zero-Crossing Detection Circuit
1. Meaning of Zero-Crossing Detection Circuit
In the conventional Serial Data Control Type Volume, Analog SW inside switches over simultaneously with Latch
Condition Detector. And the operation completes.
DATA
D29
D30
D31
CLOCK
Latch Conditions
LATCH
Audio Signal
Noise Factor when Signal is present
Signal GND (0 V)
In this case the changing noise occurs at the time of Latch Condition Detector, the Analog SW switches over (Zerocross Detector Strobe occurs) in the moment that the Analog Signal cross Signal Ground (0 V).
DATA
D29
D30
D31
CLOCK
Latch Conditions
LATCH
Zero-cross Detector Strobe
(Form signal from inside IC)
Analog SW changing
Signal GND (0 V)
Other, In the case of Audio Signal isn't inputted (No signal), even if only Zero-cross Detector Circuit detects Latch
Condition, Analog SW doesn't switch over for the Audio Signal never cuts Signal Ground (0 V).
The Time Function switches the Analog SW after some time T.
The related type of C (Pin 23) and T is as the following.
T = 13.8E104 • C (s)
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 16 of 22
M61516FP
2. Connection of Zero-Crossing Detector and Timer Setting
Internal analog SW moves by [Zero-cross Detector Strobe] or [Compulsion SW of Timer Circuit].
For example, case of T = 10 ms.
D29
DATA
D30
D31
T = 10 ms
Latch Conditions
CLOCK
LATCH
Pattern 1
Zero-cross Detector Strobe
(Form signal from inside IC)
Audio Signal
SW Changing
Pattern 2
Zero-cross Detector Strobe
(Form signal from inside IC)
Audio Signal
SW Changing
In case of Pattern 1, the Zero-cross Detector Strobe occurs with the Zero-cross Detector Function, and SW is switched.
But in case of Pattern 2, the Timer Function switches the Analog SW after T = 10 ms, for the Audio Input Signal didn't
cut the Signal Ground after T = 10 ms which were set with the timer.
Timer Setting Time setting for Frequency band of Input Audio Signal.
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 17 of 22
M61516FP
3. Timer Setting System
T = 10 ms
D31
DATA
Latch
Conditions
CLOCK
LATCH
1
1
f = = = 50 Hz
2•T
2 • 10 ms
Audio Signal
Note:
In case of Timer Setting Time/T = 10 ms setting
D31
DATA
Audio Signal
Zero-cross Detect
50 Hz ≤
50 Hz ≥
OK
OK
NG
Upper figure
Pattern 1
Pattern 2
T = 10 ms
Latch Conditions
CLOCK
LATCH
Pattern 1
Audio Signal
f = 30 Hz
Pattern 2
Audio Signal
Note:
Timer Setting Time is about T = 10 ms usually.
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 18 of 22
f = 30 Hz
M61516FP
4. Connection of Data Transmission and Timer Setting
M61516FP has the function to make the Serial Data invalid until it generations the Zero-cross Detector Strobe in IC,
after the Latch Condition detected.
Timer Setting T
Latch Conditions
D0~D31
DATA
Latch Conditions
D0~D31
"A"
"B"
CLOCK
LATCH
Serial Data Transmission Interval IT
Zero-cross Detector Strobe
(Form signal from inside IC)
Audio Signal
SW Changing for DATA " A "
In case of upper figurative. The order of DATA " B " is invalid.
In to make the Serial Data Transmission Interval IT from MCU (microcomputer) to M61516FP
Serial Data Transmission Interval = IT > Timer Setting = T
the reading error of the data doesn't occur.
Note: Serial Data Transmission Interval IT = Interval of between Latch Condition and Latch Condition
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 19 of 22
M61516FP
Application Example
1. Loudness
C SBL SL FL
25
MCU
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AVCC
7V
DGND
26
FR SR SBR SW
3300 p
41
44
TONE
BASS/TRE
45
46
47 k
SWIN2
47
+
–
FR VOL
Loudness tap
A
Loudness Tap
B
21
+
–
+
–
+
–
+
–
+
–
+
–
49
47 k
SLIN2
50 k
50
FRONT channel
Input selector
47 k
FLIN2
3300 p
19
0.1 µ
50 k
50 k
SR VOL SBR VOL SW VOL
50 k
C VOL
50 k
SBL VOL
6.2 k
TONE
BASS/TRE
48
47 k
SBLIN2
20
Tone
Output
Selector
18
47 k
CIN2
0.22 µ
22
FL VOL
50 k
47 k
SBRIN2
Output
Gain
Control
50 k
47 k
SRIN2
23
ZERO CROSS
DITECTOR &
TIMER
DITECTOR
–
+
FRIN2
Tone
Output
Selector
50 k
0.1 µ 43
+
–
6.2 k
50 k
Output
Gain
Control
42
–
+
0.1 µ
DVDD
5V
24
MCU
I/F
17
0.1 µ
16
FRIN1
47 k
50 k
15
FRONT
Channel
Input
Selector
SL VOL
51
47 k
SRIN1
47 k
14
SBRIN1
47 k
13
52
SWIN1
47 k
12
53
CIN1
10 k
8
10 k
REC SW
+
–
Input
attenuator
50 k
50 k
REC SW
REC SW
–
+
REC SW
–
+
REC SW
Input
attenuator
Input Selector
Input Selector
REC L4
6
REC L3
5
REC L2
4
REC L1
2
47 k
INLI
47 k
1
64
INRI
INLJ
47 k
63
INRJ
7
3
50 k
62
REC R1
REC SW
50 k
61
REC R2
REC SW
50 k
60
REC R3
50 k
59
FLIN1
47 k
Rch Balance Output
REC SW
REC R4
9
Rch
50 k
58
SLIN1
47 k
BALANCE Output
–
+
57
0.047 µ
10
Lch
50 k
56
10 k
50 k
ADC
Single
Input
A
Loudness
B
SBLIN1
47 k
10 k
+
–
55
0.047 µ
11
Lch Balance Output
50 k
54
+
–
Single
Input
47 k
INLH
47 k
47 k
47 k
47 k
47 k
47 k
47 k
47 k
47 k
AVEE
–7 V
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 20 of 22
47 k
47 k
47 k
47 k
47 k
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
47 k
65
47 k
47 k
M61516FP
2. Balance Output
C SBL SL FL
25
MCU
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AVCC
7V
DGND
26
FR SR SBR SW
3300 p
41
42
44
46
47 k
SWIN2
21
+
–
+
–
20
TONE
BASS/TRE
45
47
FR VOL
Loudness tap
A
loudness
B
Tone
output
selector
+
–
+
–
+
–
+
–
+
–
+
–
49
47 k
SLIN2
FRONT channel
Input
selector
50
47 k
FLIN2
0.1 µ
50 k
50 k
50 k
SR VOL SBR VOL SW VOL
50 k
C VOL
50 k
SBL VOL
6.2 k
TONE
BASS/TRE
48
47 k
SBLIN2
3300 p
19
18
47 k
CIN2
0.22 µ
22
FL VOL
50 k
47 k
SBRIN2
Output
Gain
control
50 k
47 k
SRIN2
23
ZERO CROSS
DITECTOR &
TIMER
DITECTOR
–
+
FRIN2
Tone
output
selector
50 k
0.1 µ 43
50 k
Output
Gain
Control
6.2 k
–
+
0.1 µ
DVDD
5V
24
MCU
I/F
17
0.1 µ
16
FRIN1
47 k
50 k
15
SL VOL
51
SRIN1
47 k
FRONT channel
Input
selector
14
SBRIN1
47 k
47 k
52
13
SWIN1
47 k
53
12
CIN1
47 k
8
10 k
+
–
Input
attenuator REC SW
50 k
50 k
REC SW
–
+
REC SW
–
+
REC SW
Input
attenuator
Input selector
Input selector
7
REC L4
6
REC L3
5
REC L2
4
REC L1
3
2
47 k
INLI
47 k
64
INRI
INLJ
47 k
63
INRJ
50 k
REC SW
50 k
62
REC R1
REC SW
50 k
61
REC R2
REC SW
50 k
60
REC R3
50 k
59
FLIN1
47 k
Balance/loudnessSW
REC SW
REC R4
9
10 k Rch
50 k
–
+
BALANCE Output
–
+
57
SLIN1
47 k
50 k
56
10
10 k Lch
50 k
–
ADC
A
Loudness
B
SBLIN1
47 k
10 k
+
–
55
58
11
Balance/loudnessSW
+
–
+
54
1
INLH
47 k
47 k
47 k
47 k
47 k
47 k
47 k
47 k
47 k
AVEE
–7 V
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 21 of 22
47 k
47 k
47 k
47 k
47 k
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
47 k
65
47 k
47 k
M61516FP
Package Dimensions
JEITA Package Code
P-QFP80-14x20-0.80
RENESAS Code
PRQP0080GB-A
Previous Code
80P6N-A
MASS[Typ.]
1.6g
HD
*1
D
64
41
65
HE
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
ZE
*2
E
40
Reference Dimension in Millimeters
Symbol
80
25
1
ZD
24
D
E
A2
HD
HE
A
A1
bp
c
c
Index mark
A
A2
F
*3
y
bp
L
A1
e
Detail F
REJ03F0204-0201 Rev.2.01 Mar 31, 2008
Page 22 of 22
e
y
ZD
ZE
L
Min Nom Max
19.8 20.0 20.2
13.8 14.0 14.2
2.8
22.5 22.8 23.1
16.5 16.8 17.1
3.05
0.1 0.2
0
0.3 0.35 0.45
0.13 0.15 0.2
0°
10°
0.65 0.8 0.95
0.10
0.8
1.0
0.4 0.6 0.8
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes
warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property
rights or any other rights of Renesas or any third party with respect to the information in this document.
2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including,
but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass
destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com )
5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a
result of errors or omissions in the information included in this document.
6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability
of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular
application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products.
7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications
or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality
and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or
undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall
have no liability for damages arising out of the uses set forth above.
8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below:
(1) artificial life support devices or systems
(2) surgical implantations
(3) healthcare intervention (e.g., excision, administration of medication, etc.)
(4) any other purposes that pose a direct threat to human life
Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing
applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all
damages arising out of such applications.
9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range,
movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages
arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as
swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products.
Renesas shall have no liability for damages arising out of such detachment.
12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas.
13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have
any other inquiries.
http://www.renesas.com
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
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Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
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Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2377-3473
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
Renesas Technology Malaysia Sdn. Bhd
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2008. Renesas Technology Corp., All rights reserved. Printed in Japan.
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