RENESAS M62362P

M62362P/FP
1280 Resolution 3ch Multiplying D/A Converter
REJ03D0873-0201
Rev.2.01
Dec 27, 2007
Description
The M62362P is an integrated circuit semiconductor of CMOS structured with 3 channels of built-in 1280 step
resolution (equivalent 10.3-bit) multiplication type D/A converters.
The 3-wire serial interface method and it is able to cascading serial use with DO terminal.
The device is suited for use in high accuracy automatic adjustment combination with microcomputer.
Features
• Digital data transfer method: 3-wire serial data transfer method
• High resolution
Resolution is more over 10-bit and error is less than ±1 LSB
• Capable of 4 quadrant multiplication
• Short setting time
• With reset terminal
Recommended Operating Condition
Digital section supply voltage: VDD = 5 V ± 10%
Application
Signal gain control of display-monitor or CTV. Conversion from digital control data to analog control data for homeuse and industrial equipment.
Automatic adjustment by combination with EEPROM and microcomputer. (Replacement of conventional half-fixed)
Block Diagram
VDAref
VO1
RESET
VIN1
BS
DI
CLK
13-bit shift register
11-bit
D/A converter
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12
Address
decoder
11-bit
latch
(11)
11-bit
latch
11-bit
latch
11-bit
D/A converter
11-bit
D/A converter
VIN2
VO2
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 1 of 10
VIN3
VO3
Do
GND
VDD
M62362P/FP
Pin Arrangement
M62362P
M62362FP
VIN 2
1
14
VDAref
VIN 2
1
16
2
15
VO 1
VDAref
VO 2
2
13
VO 1
VO 2
VIN 3
3
12
VIN 1
VIN 3
3
14
VIN 1
VO 3
4
11
RESET
VO 3
4
13
RESET
DO
5
10
BS
DO
5
12
BS
GND
6
9
DI
GND
6
11
DI
VDD
7
10
CLK
NC
8
9
NC
VDD
8
7
CLK
(Top view)
NC: No connection
(Top view)
Outline: 14P4
Outline: PRSP0016DE-A (16P2N-A)
Pin Description
Pin No.
9 (11)
5
8 (10)
10 (12)
11 (13)
13 (15)
2
4
7
6
1
3
12 (14)
14 (16)
Note:
Pin Name
DI
DO
CLK
BS
RESET
VO1
VO2
VO3
VDD
GND
VIN2
VIN3
VIN1
VDAref
Function
Serial data input terminal
Serial data output terminal
Serial clock input terminal
When BS terminal level is "H" latch circuit data is load
When RESET terminal level is "L", all D/A output terminal became "L"
1280 resolution D/A output
Power supply terminal
GND terminal
D/A converter input terminal
D/A converter reference voltage input terminal
( ) : M62362FP
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 2 of 10
M62362P/FP
Block Diagram for Explanation of Terminals
VDD
GND
DI
13-bit shift register
CLK
Do
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12
BS
Address decoder
11
RESET
11-bit latch
11-bit latch
11-bit latch
11-bit
D/A converter
11-bit
D/A converter
11-bit
D/A converter
VDAref
VIN1
VO1
VIN2
VO2
VIN3
VO3
Absolute Maximum Ratings
Item
Supply voltage
Digital input voltage (DI, CLK, BS)
Input voltage
Output voltage
D/A reference voltage
Operating temperature
Storage temperature
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 3 of 10
Symbol
VDD
VIND
VIN
VO
VDAref
Topr
Tstg
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–20 to +85
–40 to +125
Unit
V
V
V
V
V
°C
°C
M62362P/FP
Electrical Characteristics
<Digital Part>
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +85°C, unless otherwise noted.)
Item
Min
Limits
Typ
Max
Unit
4.5
–10
—
0.8 VDD
—
VDD – 0.4
5.0
—
—
—
—
—
5.5
10
0.2 VDD
—
0.4
—
V
µA
V
V
V
V
Symbol
Supply voltage
Input leak current
Input low voltage
Input high voltage
Output low voltage
Output high voltage
VDD
IILK
VIL
VIH
VOL
VOH
Conditions
VIN = 0 to VDD
IOL = 2.5 mA
IOH = –400 µA
<Analog Part>
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +85°C, unless otherwise noted.)
Item
Symbol
Min
Limits
Typ
Max
Unit
0
0
—
—
—
0.75
VDD
VDD
1.5
V
V
mA
VIN
VO
IIN
D/A reference source current
IDAref
–4.5
–2.25
—
mA
D/A output sink or source
current
Output impedance
Resolution
Differential nonlinearity
Nonlinearity
Nonlinearity for channels
IO
–1.0
—
1.0
µA/LSB
RO
RES
DNL
NL
∆NL
—
—
–1
–0.6
–0.4
1.8
1280
—
—
—
3.6
—
1
0.6
0.4
kΩ
STEP
LSB
%FS
%FS
Accuracy
Input voltage
Output voltage
Input current
Note:
Polarity of current, (+) is sink into IC and (–) is source from IC.
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 4 of 10
Conditions
VIN = 0 to VDD
VIN = 5 V, VDAref = 0 V
Proportional to (VIN – VDAref)
VIN1 = VIN2 = VIN3 = 5 V,
VDAref = 0 V
Proportional to (VIN – VDAref)
Constant for all D/A output mode
M62362P/FP
AC Characteristics
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +85°C)
Item
Clock "L" pulse width
Clock "H" pulse width
Clock rise time
Clock fall time
Data setup time
Data hold time
LD setup time
LD hold time
LD "H" pulse width
Data output delay time
Data output setting time
Input/output response time
Symbol
tCKL
tCKH
tCR
tCF
tDCH
tCHD
tCHL
tLDC
tLDH
tDO
tLDD
Min
Limits
Typ
Max
Unit
200
200
—
—
60
100
200
100
100
70
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
200
200
—
—
—
—
—
350
20
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
Conditions
CL ≤ 100 pF
No load
f = 10 kHz
Timing Chart
tCR
tCKH
tCF
CLK
tCKL
DI
tDCH
tLDC
tCHD
tLDH
tCHL
BS
tLDD
D/A output
tDO
DO output
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 5 of 10
M62362P/FP
Digital Data Format
First
MSB
Last
LSB
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
DAC data
DAC select
data
DAC Data
D0
0
1
0
1
:
1
0
:
1
D1
0
0
1
1
:
1
0
:
1
D2
0
0
0
0
:
1
0
:
1
D3
0
0
0
0
:
1
0
:
1
D4
0
0
0
0
:
1
0
:
1
D5
0
0
0
0
:
1
0
:
1
D6
0
0
0
0
:
1
0
:
1
D7
0
0
0
0
:
1
0
:
1
D8
0
0
0
0
:
0
1
:
1
D9
0
0
0
0
:
0
0
:
1
D10
0
0
0
0
:
1
1
:
1
D/A Output
VDAref
(VIN – VDAref) / 1280 × 1 + VDAref
(VIN – VDAref) / 1280 × 2 + VDAref
(VIN – VDAref) / 1280 × 3 + VDAref
:
(VIN – VDAref) / 1280 × 1279 + VDAref
VIN
:
VIN
DAC Select Data
D11
0
0
1
1
D12
0
1
0
1
DAC Selection
Don't care
ch1
ch2
ch3
Timing Chart (Model)
MSB
DI
D12
LSB
D11
CLK
D10
.............
D1
D0
.............
BS
RESET
D/A
output
Note:
Input data is carried out BS signal "L" besides CLK signal positive edge. CLK, BS, is keep generally
"H" level.
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 6 of 10
M62362P/FP
Typical Characteristics
M62362P Differential Nonlinearity
0.5
0.4
0.3
DNLIN (LSB)
0.2
0.1
0
100
200
300
400
500
600
700
800
900
1000 1100 1200 1300
900
1000 1100 1200 1300
−0.1
−0.2
−0.3
−0.4
−0.5
Step Number
M62362P Nonlinearity
0.5
0.4
0.3
NLIN (%)
0.2
0.1
0
100
200
300
400
500
600
700
−0.1
−0.2
−0.3
−0.4
−0.5
Step Number
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 7 of 10
800
M62362P/FP
M62362P Output Rise Characteristics (Setting Time)
5V
Output
0V
5V
BS
0V
0
1 µs
2
3
4
M62362P Output Fall Characteristics (Setting Time)
5V
Output
0V
5V
BS
0V
0
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 8 of 10
1 µs
2
3
4
M62362P/FP
Precaution for Use
M62362 have 5 terminals these are input free voltage at use. (VDD, VIN1, VIN2, VIN3, VDAref) If ripple and spike is input
to these terminals, accuracy of conversion is down. So, when use this device, please connect capacitor among to each
terminals and GND for stable operation.
Application Example
+
1 µF
VDD
VDD
Do
CLK
DI
BS
Vo1
RESET
VIN1
Vo2
VO
0.1 µF
VIN
0.1 µF
0.1 µF
VIN2
Vo3
VIN3
GND
VDAref
0.1 µF
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 9 of 10
+
VDAref
M62362P/FP
Package Dimensions
14P4
Plastic 14pin 300mil DIP
Lead Material
Alloy 42/Cu Alloy
14
8
1
7
c
Weight(g)
1.0
e1
JEDEC Code
—
E
EIAJ Package Code
DIP14-P-300-2.54
D
A2
e
JEITA Package Code
P-SOP16-5.3x10.1-1.27
RENESAS Code
PRSP0016DE-A
b1
Previous Code
16P2N-A
b
MASS[Typ.]
0.2g
9
*1
E
16
HE
A
A1
A2
b
b1
c
D
E
e
e1
L
A1
LA
SEATING PLANE
Dimension in Millimeters
Min
Nom
Max
4.5
—
—
0.51
—
—
3.3
—
—
0.4
0.5
0.6
1.4
1.5
1.8
0.22
0.27
0.34
19.0
19.2
18.8
6.15
6.3
6.45
2.54
—
—
7.62
—
—
3.0
—
15°
0°
—
Symbol
F
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
1
8
Index mark
A2
A1
c
D
Reference
Symbol
L
A
*2
e
y
*3
bp
Detail F
D
E
A2
A1
A
bp
c
HE
e
y
L
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 10 of 10
Dimension in Millimeters
Min Nom Max
10.0 10.1 10.2
5.2 5.3 5.4
1.8
0.1 0.2
0
2.1
0.35 0.4 0.5
0.18 0.2 0.25
0°
8°
7.5 7.8 8.1
1.12 1.27 1.42
0.1
0.4 0.6 0.8
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Colophon .7.2