M-982-02 Precise Call Progress Tone Detector INTEGRATED CIRCUITS DIVISION Features Description • • • • • • • • • The M-982-02 is an integrated circuit, precise tone detector for special-purpose use in automatic following of switched telephone calls. The circuit uses low power CMOS techniques to provide the complete filtering and control required for this function. The basic timing of the M-982-02 is designed to permit operation with almost any progress tone system.The use of integrated circuit techniques allows the M-982-02 to pack the five filters for call progress following into a single 22-pin DIP or 20-pin SOIC. A 3.58 MHz crystal-controlled time base guarantees accuracy and repeatability. Precise Detection of Call Progress Tones Linear (Analog) Input Digital (CMOS Compatible), Tri-State Outputs Single Supply, 3V to 5V (Low Power CMOS) Inexpensive 3.58MHz Time Base Wide Dynamic Range (30dB) Lower Power Consumption (Power-Down Mode) 425Hz Detection 22-Pin DIP and 20-Pin SOIC Packages Applications • • • • • • Automatic Dialers Dialing Modems Traffic Measurement Equipment Test Equipment Service Evaluation Billing Systems Pin Configuration The M-982-02 is an enhanced drop-in replacement for the M-982-01. It has a wider operating voltage range (down to 3V). It has lower power consumption under normal operating conditions. In addition, a power down (PD) feature is provided to further reduce power consumption when inactive. It includes a 425Hz detector to support common international call progress requirements. Ordering Information Part Description M-982-02P 22-Pin plastic DIP M-982-02S 20-Pin Plastic SOIC M-982-02T 20-Pin Plastic SOIC, Tape and Reel Block Diagram DS-M-982-02-R05 www.ixysic.com 1 M-982-02 INTEGRATED CIRCUITS DIVISION 1 Specifications 1.1 Absolute Maximum Ratings Symbol Ratings Units 7 V VSS - 6.5 to VDD + 0.3 V VSS - 0.3 to VDD + 0.3V VDD Input Voltage on SIGIN Input Voltages (Except SIGIN) Operating Temperature - 40 to +85 V °C Storage Temperature Range - 40 to +150 °C Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. 1.2 Electrical Characteristics Parameter VDD Conditions Min Max Units - 2.7 5.5 V Operating Conditions Power Supply Noise 0.1 to 5kHz - 20 mVP-P Power Current Drain (IDD) VREF Open - 15 mA VREF - 48% of VDD 52% of VDD V Impedance - 3.25 8.25 k In-Band Signal -1 +1 % of fo XRANGE = Open -30 (24.5mV) 0 (775mV) XRANGE = VSS -40 (7.8mV) -10 (245mV) XRANGE = Open -33 (17.4mV) -3 (549mV) XRANGE = VSS -43 (5.5mV) -13 (173.5mV) Duration (tDD) - 200 - ms Bridge Time (tBB) - - 20 ms VREF Frequency Range Level: VDD=5V Level: VDD=3V Signal Detection Level Skew Between Adjacent In-Band signals High-Level to Low-Level Signal for Detection of Both (tIL) - dBm dBm 1 - 6 dB 1 - s - SIGIN about -24dBm - 200 SIGIN < -24dBm - 240 ms - Time from DET n to STROBE (tDS) - - 10 ms - Frequency Range - -6 -6 % of fo XRANGE = Open - -50 (2.5mV) XRANGE = VSS - -60 (0.8mV) XRANGE = Open Level: VDD=3V Interval Duration (tID) Time to Output (tIO) 2 - For Detection of Both Level: VDD=5V Outputs - High = 0dBm (775mV) Low = -30dBm (24.5mV) Time to Output (tDO) Signal Rejection Notes dBm - -53 (1.7mV) XRANGE = VSS - -63 (0.6mV) - 160 - ms - ms - 200 DET n, VOL ISINK = -1mA - 0.5 STROBE Pins VOH ISOURCE = 1mA VDD - 0.5 - DET n Pins IOZ VO = VDD , VSS - 1 www.ixysic.com dBm V 1 - A R05 M-982-02 INTEGRATED CIRCUITS DIVISION Parameter Conditions VIL EN, OE, XRANGE, MODE, PD Pins VIH Pull-Up and Pull-Down Currents SIGIN Pin Max Units - - 0.5 V VDD = 5V VDD - 2 - VDD = 2.7V VDD - 0.5 - VDD = 5V 12.5 50 4 20 /XRANGE = VSS - 2 6 PD = VDD - 4 10 Voltage Range - -6.5 VDD Input Impedance f = 500Hz 80 - k Input Spectrum - - 28 kHz - 0.2 VDD - 0.2 - VIL External Clock Connected to XIN Pin VIH XOUT Open Duty Cycle Capacitance Clock XIN, XOUT with Oscillator Active Internal Resistance Tri-State Operation V 60 % - 10 pF - M ms 20 - 30 VOL CL = 20pF, ISINK = -1mA - 0.2 VOH CL = 20pF, ISOURCE = 1mA VDD - 0.2 - Duty Cycle CL = 20pF 40 60 tEN (High Z to LOW Z) CL = 50pF - - 250 tDE (Low Z to High Z) RL = 100k - - 250 - V 40 - X358 Pin A PD Hi to Lo Power-Up (TPU) Notes V VDD = 2.7V MODE = VSS Inputs Min - V % ns - Unless otherwise noted, VDD-VSS = 5V, TA = 25°C, PD at logical low state, and XRANGE at logical high state. Power levels are in dBm referenced to 600. DC voltages are referenced to VSS . 1. Per tone. R05 www.ixysic.com 3 M-982-02 INTEGRATED CIRCUITS DIVISION 1.3 Pin Functions Pin Description DET 1 Active high tri-state output, detect for 350Hz. DET 2 Active high tri-state output, detect for 400Hz/620Hz. (See Note.) DET 3 Active high tri-state output, detect for 440Hz. DET 4 Active high tri-state output, detect for 480Hz. DET 5 Active high tri-state output, detect for 425Hz. EN Active high enabled, when low drives STROBE low. OE Active high input. When low tri-state DET n pins. SIGIN Analog signal input (internally capacitive coupled). STROBE Active high output, indicates valid DET n. VDD Most positive power supply input pin. VREF Internally generated mid-power supply voltage (output). VSS Most negative power supply input pin. X358 Buffered oscillator output (3.58 MHz). XIN Crystal oscillator or digital clock input. XOUT Crystal oscillator output. Used only with a crystal. Use X358 when clock output signal is required. XRANGE Active low input. Adds 10dB of gain to input stage. MODE PD Compatibility selection. Connection to VSS selects 400Hz detection. (M-981-02 emulation.) Connection to VDD or no connection selects 620Hz detection. Power-down operation, logic high inhibits internal clock. Internal pull-down resistor. Note: This output indicates 400Hz detect when MODE is connected to VSS and 620Hz detect when open or connected to VDD . Call Progress Tones 4 Frequency 1 (Hz) Frequency 2 (Hz) Use 350 440 Dial Tone 400 Off Special 440 Off Alert Tone 440 480 Audible Ring 440 620 Pre-empt 480 Off Bell High Tone 480 620 Reorder (Bell Low) 350 Off Special 620 Off Special 941 1209 DTMF * (asterisk) 425 Off European www.ixysic.com R05 M-982-02 INTEGRATED CIRCUITS DIVISION 2 Call Progress Tone Detection Call progress tones are audible tones sent from switching systems to calling parties to show the status of calls. Calling parties can identify the success of a call placed by what is heard after dialing. The type of tone used and its timing vary from system to system, and, though intended for human ears these signals can provide valuable information for automated calling systems. continuously, and last until the first dial digit is received by the switching system. Line Busy, on the other hand, is turned off and on at a rate of 1 Hz with a 50% duty cycle, or an interruption rate of 60 times per minute (60 IPM). The tones can be distinguished in this way. It should be noted that while such techniques will usually be effective, there are some circumstances in which the M-982-02 cannot be accurately used. Examples include situations where ringback tone may be short or not even encountered. Ringback may be provided at ringing voltage frequency (20 or 30 Hz) with some harmonics and may not fall in the detect range, and speech or other strong noise may obscure tones making cadence measurement difficult. The M-982-02 contains five signal detectors sensitive to the frequencies often used for these progress tones. Electronic equipment monitoring the DET n outputs of the M-982-02 can determine the nature of signals present by measuring their duty cycle. See “Typical Application” on page 6 for a diagram of a circuit that could be used to permit a microcomputer to directly monitor tones on the telephone line. Much of the character of the progress tones is in their duty cycle or cadence (sometimes referred to as interruption rate). This information, coupled with level and frequency indication from the M-982-02, can be used to decide what progress tones have been encountered. For example, dial tones as shown in “Call Progress Tones” on page 4 are usually “on” Standards do exist and should be consulted for your particular application. In North America, AT&T’s “Notes on the Network” or EIA’s RS-464 PBX standard should be reviewed. In Europe, tone plans may vary with locale, in which case the CEPT administration in each country must be consulted. Outside these areas, national PTT organizations can provide information on the systems within their borders. Truth Table Signal Present (fo) MODE Det 1 Det 2 Det 3 Det 4 Det 5 Strobe PD OE EN 350Hz 400Hz (Note) 620Hz (Note) 440Hz 480Hz 425Hz Other (no detect) X 0 1 / Open X X X X 1 X X X X X 0 X 1 1 X X X 0 X X X 1 X X 0 X X X X 1 X 0 X X X X X 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Any X 0 0 0 0 0 0 1 1 X Any X 0 0 0 0 0 0 0 1 0 1 Any X High Impedance X 0 0 Any X High Impedance 0 0 0 0 Any X High Impedance X 1 0 X Note: Connect MODE pin to VSS to select 400Hz detect on DET 2; connect to VDD or leave open to select 620Hz detect on DET 2. R05 www.ixysic.com 5 M-982-02 INTEGRATED CIRCUITS DIVISION Signal Timing Tri-State Timing Power-Down Timing Typical Application 6 www.ixysic.com R05 M-982-02 INTEGRATED CIRCUITS DIVISION 3 Manufacturing Information 3.1 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 3.2 Reflow Profile This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020 must be observed. Device Maximum Temperature x Time M-982-02P M-982-02S 245°C for 30 seconds 250°C for 30 seconds 3.3 Board Wash IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be used. R05 www.ixysic.com 7 M-982-02 INTEGRATED CIRCUITS DIVISION 3.4 Mechanical Dimensions 3.4.1 M-982-02P 22-Pin DIP Package A A1 b b2 C D E E1 e ec L Drawing not to scale. Does not reflect actual part marking. Tolerances (Inches) Metric Approximation (mm) Min Nom 0.015 0.014 0.045 0.009 1.065 0.390 0.330 0.060 1.085 0.415 0.360 0.100 BSC 0° 15° 0.115 0.130 Max Min Nom Max 0.210 0.022 0.065 0.015 1.120 0.425 0.390 0.38 0.36 1.1 0.23 27.1 9.9 8.4 1.5 27.6 10.5 9.1 2.54 BSC 5.33 0.56 1.7 0.38 28.4 10.8 9.9 15° 0.160 0° 2.9 3.3 15° 4.1 3.4.2 M-982-02S 20-Pin SOIC Package Tolerances (mm) Drawing not to scale. Does not reflect actual part marking. Min A A1 b D E e H L Max 2.35 2.65 0.10 0.30 0.33 0.51 12.60 13.00 7.4 7.6 1.27 BSC 10.00 10.65 0.40 1.27 SAE Approximation (Inches) Min Max 0.0926 0.1043 0.0040 0.0118 0.013 0.020 0.4961 0.5118 0.2914 0.2992 0.050 BSC 0.394 0.419 0.016 0.050 For additional information please visit our website at: www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-M-982-02-R05 ©Copyright 2012, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 12/22/2012 8 www.ixysic.com R05