SM3320A Optical Sensor IC OVERVIEW The SM3320A is an image sensor IC with a built-in single element photodiode of 1mm2 and programmable signal conditioning circuit. The IC can detect wider range of light wave from ultraviolet to infrared. The SM3320 integrates all the elements required for optical sensor into an ultra-miniature package. The signal condition circuit has a programmable gain amplifier with dark current compensation circuit, so that it can operate in wider temperature range. With 3 addressing bits, up to 8 SM3320A can be paralleled. PACKAGE DIMENSIONS (Unit: mm) Y B 5.5 ±0.1 ▪ High-sensitivity preamplifier for ultraviolet to infrared detection using a single IC ▪ Dark current compensation circuit built-in for stable signal output ▪ Gain setting and output control function using serial interface (DATA, SE, CLK, OE) ▪ Connection up to 8 devices in parallel according to 3-bit address setting ▪ Transimpedance range: 500k to 240M ▪ Photodiode detector size: 2.3mm×0.6mm (1.0mm2 photodetector surface area) ▪Anti-reflection film coating with little sensitivity changing by wavelength ▪ Supply voltage range: 2.7 to 5.5V (single supply) ▪ Current consumption: 1.5mA (typ)@VDD=5V, no load ▪ Operating temperature range: -40 to +85°C ▪ Package: 12 pin HCOB X Photodiode detector A 0.6 ±0.1 FEATURES 0.35 1.15 ±0.2 3.2 ±0.1 0.5 0.25 ±0.05 Photodiode detector dimensions(Origin:Package center) A B X -1.15 1.15 Package type : 12pin HCOB Package size : 3.2mm×5.5mm Photodiode detector size : 2.3mm×0.6mm (1.0mm2 photo detector surface area) Y -0.7 -0.1 ORDERING INFORMATION SM3320A IC1 SM3320A IC2 SM3320A IC3 VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD TYPICAL APPLICATION CIRCUIT DATA OE CLK SE VDD 12 pin HCOB VSS REF A0 A1 A2 OUT SM3320A DATA OE CLK SE VDD Package VSS REF A0 A1 A2 OUT Device ADC ADC CPU SEIKO NPC CORPORATION - 1 SM3320A PINOUT NC DATA OE CLK SE VDD 12 11 10 9 8 7 1 2 3 4 5 6 VSS REF A0 A1 A2 OUT (Top view) PIN DESCRIPTION No. Name 1 VSS S Ground 2 REF O Reference voltage 3 A0 I Address setting input 0 4 5 A1 A2 I I Address setting input 1 Address setting input 2 6 OUT O Analog output 7 VDD S Supply voltage 8 SE I Serial I/F enable input 9 CLK I 10 11 OE DATA I I/O 12 I/O NC *. I/O: Input/Output pin Function Serial I/F clock input Output enable control Serial I/F data input/output - I: Input pin Leave open-circuit for normal use O: Output pin S: Supply pin BLOCK DIAGRAM Preamplifier − Photodiode + Sample & Hold Offset Cancel Postamplifier OUT Buffer Drak Current Compensation Timing Generator VDD GND OE SE DATA A2 CLK A1 Serial Interface A0 REF Reference Voltage Source SEIKO NPC CORPORATION - 2 SM3320A SPECIFICATIONS Absolute Maximum Ratings VSS=0V Parameter Symbol Condition Rating Unit -0.3 to +7.0 V DATA, CLK, SE, OE, A0, A1, A2 pins -0.3 to VDD+0.3 V OUT, REF pins -0.3 to VDD+0.3 V -55 to +90 °C *1 VDD VDD pin *1*2 VIN Supply voltage Input voltage *1*2 Output voltage VOUT Storage temperature*3 TSTG *1. This parameter rating is the values that must never exceed even for a moment. This product may suffer breakdown if this parameter rating is exceeded. Operation and characteristics are guaranteed only when the product is operated at recommended operating conditions. *2. VDD is a VDD value of recommended operating conditions. *3. When stored in nitrogen or vacuum atmosphere applied to IC itself only (excluding packaging materials). Recommended Operating Conditions Recommended operating conditions guarantee the electrical characteristic. VSS=0V Parameter Supply voltage Symbol VDD Rating Condition TYP MAX 2.7 5.0 5.5 V 100 pF *1 OUT output load *1 REF output load Operating temperature Ta Unit MIN -40 100 pF 85 °C *1. The output load of the OUT and REF outputs presumes capacitive load only. For current load, an error in the output voltage occurs, so the outputs must be used under high-impedance conditions. Note. Since it may influence the reliability if it is used out of range of recommended operating conditions, this product should be used within this range. SEIKO NPC CORPORATION - 3 SM3320A Electrical Characteristics DC Characteristics Recommended operating conditions by standard circuit, unless otherwise noted. Parameter Current consumption Logic input voltage 1 Logic input voltage 2 Logic input current 1 Logic input current 2 Logic output impedance REF output voltage OUT maximum output voltage Output impedance Symbol IDD VIH1 VIL1 VIH2 VIL2 IIH1 IIL1 IIH2 IIL2 ZDATA VREF MIN OE=0V, No output load DATA,CLK,SE,A0,A1,A2 pins TYP MAX 1.5 3.0 0.8VDD 0.2VDD 0.8VDD OE pin 0.2VDD DATA,CLK,SE,A0,A1,A2 pins 1 -1 10 OE pin, VDD=5.0V -20 400 *1 Load capacitance < 100pF OUT pin*2 20 -10 DATA pin, read mode VOUTH ZO Rating Condition 0.08VDD 0.10VDD 0.65VDD 0.70VDD 400 0.12VDD Unit mA V V A A Ω V V 1000 Ω *1. If a large load capacitance is connected to REF, the REF voltage may begin to oscillate. Accordingly, the load capacitance connected to the REF output should be 100pF or lower. *2. The output impedance ZO is given by the following equation, where V10 is the output voltage for 10kΩ load resistance and V0 is the output voltage with no load. ZO = (V0/V10-1)*10 [kΩ] SEIKO NPC CORPORATION - 4 SM3320A Photodiode Characteristics Recommended operating conditions by standard circuit, unless otherwise noted. Parameter*1 Symbol Rating Condition MIN TYP MAX Unit Photodetector sensitivity 1 Photodetector sensitivity 2 470nm 525nm 0.17 0.26 A/W A/W Photodetector sensitivity 3 680nm 0.46 A/W Photodetector sensitivity 4 870nm 0.45 A/W Photodetector sensitivity 5 Photodetector sensitivity temperature characteristics 1 Photodetector sensitivity temperature characteristics 2 Photodetector sensitivity temperature characteristics 3 Photodetector sensitivity temperature characteristics 4 Photodetector sensitivity temperature characteristics 5 940nm 0.29 A/W 470nm -1600 ppm/°C 525nm -1000 ppm/°C 680nm -300 ppm/°C 870nm 500 ppm/°C 940nm 3500 ppm/°C *1. It is a characteristic decided by the device unit. PPhotodiode D受光感度特性 （代表特性） Spectral response [A/W][A/W] Photo受光感度 sensitivity 0.6 0.5 0.4 0.3 0.2 0.1 0.0 300 400 500 600 700 800 900 1000 1100 1200 1100 1200 波長 [nm][nm] Wavelength Photodetector sensitivity characteristic Photo sensitivity temperature [ppm/°C] 受光感度温度特性 [ppm/℃] PD受光感度温度特性 （代表特性） Photodiode Spectral response 4000 3000 2000 1000 0 -1000 -2000 300 400 500 600 700 800 900 1000 波長 [nm][nm] Wavelength Photodetector sensitivity temperature characteristic SEIKO NPC CORPORATION - 5 SM3320A Analog Electrical Characteristics Recommended operating conditions by standard circuit, unless otherwise noted. Parameter Symbol Rating Condition MIN CS[00] MΩ 1.0 MΩ 2.0 MΩ 4.0 1.5 MΩ MΩ 3.0 MΩ 6.0 MΩ CS[11] 12.0 MΩ CS[00] 3.5 MΩ 7.0 14.0 MΩ MΩ CS[11] 28.0 MΩ CS[00] 7.5 MΩ 15.0 MΩ TS[00] CS[10] CS[11] CS[00] CS[01] TS[01] CS[10] CS[01] CS[10] TS[10] CS[01] TS[11] CS[10] Preamplifier conversion time 30.0 MΩ CS[11] TS[00] 60.0 20 MΩ 30 s TS[01] 40 60 s TS[10] 80 120 s TS[11] 160 240 ±1 s dB 40 40 mV mV Postamplifier gain error REF reference, [01111111] below REF reference, [11111111] below Dark voltage Unit MAX 0.5 CS[01] Preamplifier transimpedance*1 TYP -40 -40 *1. Design value: The preamplifier transimpedance can be set by specifying the preamplifier feedback capacitance (CS[1:0]) and the preamplifier conversion time (TS[1:0]). The preamplifier outputs the voltage proportional to the photocurrent of the photodiode. This is considered to be virtual impedance, and it calls preamplifier transimpedance. The preamplifier transimpedance (Rti) is calculated using the following equation. The sample and hold circuit operate in sync with the preamplifier conversion time. In order to determine the output voltage, the sample and hold circuit must complete a full cycle after optical irradiation. The irradiation time should be set to [Twice the maximum value at preamplifier conversion time (detection time) + Analog output loaded time] or longer. When optical irradiation is completed before analog output load, output voltage may become a fall or zero. It is necessary to irradiate the optical irradiation continuously until the analog output load is completed. Irradiation time Light Source Serial Interface Gain setting time Analog output load Output control time Detection time Analog output loaded time Preamplifier conversion time TS[00] TS[01] TS[10] TS[11] Detection time ≥60s ≥120s ≥240s ≥480s Output voltage = VREF + (Rti × Photodiode photocurrent × Postamplifier gain) SEIKO NPC CORPORATION - 6 SM3320A AC Characteristics Write mode Parameter Recommended operating conditions by standard current, unless otherwise noted. Rating Condition Unit MIN TYP MAX Symbol Clock LOW-level pulse width twlw CLK pin 40 ns Clock HIGH-level pulse width twhw CLK pin 40 ns Data setup time 1 tsu1 Between SE-CLK 40 ns Data setup time 2 tsu2 Between DATA-CLK 40 ns Data hold time 1 th1 Between SE-CLK 140 ns Data hold time 2 Clock frequency th2 fclkw Between DATA-CLK 40 tst OUT pin, 100pF load, 1V output amplitude variation, time to reach 95% level tz OUT pin CI SE,OE,CLK,DATA pins Output capacitance CO OUT pin Interface wait time tsi Settling time Output disable time*1 *2 Input capacitance *2 10 ns MHz 2 s 5 s pF 5 pF 0.1 100 ns *1. Design value: The output control time is described as a standard. *2. Design value: The terminal capacitance per one terminal is described. The substrate design is described as a standard. 0.5VDD base, unless otherwise noted. OE tsi SE R/W DATA A2 tsu2 GS1 2 GS0 th2 twhw twlw 1 CLK A1 3 15 th1 16 1/fclkw tsu1 tst tz OUT 95% 100% Read mode Recommended operating conditions by standard current, unless otherwise noted. Parameter Symbol Rating Condition MIN Clock LOW-level pulse width twlr CLK pin 100 Clock HIGH-level pulse width twhr CLK pin 100 Clock frequency SE hold time fclkr tse Data conflict avoidance time tZZ Read-out data delay time tRD TYP MAX ns ns 1 Between SE-CLK Unit 500 MHz ns 0 ns DATA pin, load capacitance=100pF 400 ns 0.5VDD base, unless otherwise noted. SE DATA R/W A2 A1 - CS1 tZZ CLK 1 2 3 7 8 tRD CS0 GS1 GS0 twhr 9 twlr 15 tse 16 1/fclkr SEIKO NPC CORPORATION - 7 SM3320A FUNCTIONAL DESCRIPTION Basic Function The SM3320A detects the current generated from a photodiode and outputs a voltage signal. The transimpedance of the preamplifier can be adjusted for coarse adjustment of the sensitivity. The transimpedance adjustment range is 0.5MΩ to 60MΩ, set using 4 adjustment bits. Also, a dark current compensation circuit is used to compensate photodiode output under dark lighting conditions for output voltage stability with low temperature variation. The gain of the postamplifier can be adjusted for fine adjustment of the sensitivity. The gain adjustment range is 1 to 4 times, set using 4 adjustment bits. Also, a built-in offset cancel circuit is used to provide low offset voltage at the output. The output voltage at the time of optical irradiation nothing outputs 0.1VDD, and calls this dark voltage. The maximum output voltage at the time of optical irradiation is 0.7VDD. The device can be addressed using address pin control. This function allows the transimpedance and gain settings to be adjusted for each device independently, when multiple devices are connected in parallel. An output enable control (OE) is used for output control. [Address and A[2:0] setting] Address [000] [001] [010] [011] [100] [101] [110] [111] A2 setting VSS VSS VSS VSS VDD VDD VDD VDD A1 setting VSS VSS VDD VDD VSS VSS VDD VDD A0 setting VSS VDD VSS VDD VSS VDD VSS VDD Serial Interface The SM3320A use a 3-wire serial interface (SE, CLK, DATA) to access the device and to set an internal register to control device operation. Note that extraneous signal input on the serial interface pins must be avoided when not reading/writing data to the device to prevent incorrect operation. Internal Register Structure The device read/write mode, address, preamplifier transimpedance, and postamplifier gain are set in the internal register. The device can be accessed for writing data to the register when the A[2:0] address write data bits match the setting of the address control inputs (A2 to A0). RW R/W A2 Adress Address A1 Data A0 D11 D10 D9 D8 - - - D6 D5 D4 D3 Preamplifier transimpedance Don't care Address Adress D7 Feedback capacitance - CS1 CS0 D2 D1 D0 Postamplifier gain Conversion time TS1 TS0 GS3 GS2 GS1 GS0 (1) RW Read/Write mode set bit. Set to “1” for read mode, and to “0” for write mode. (2) Address A[2:0] (A2 to A0) Address bits. (3) Preamplifier transimpedance CS[1:0] (D7 to D6) and TS[1:0] (D5 to D4) Preamplifier transimpedance setting bits (4) Postamplifier gain GS[3:0] (D3 to D0) Postamplifier gain setting bits SEIKO NPC CORPORATION - 8 SM3320A [Adjustment bit assignment] CS[1:0] Preamplifier feedback capacitance CS1 CS0 0 0 0 1 1 0 1 1 TS[1:0] Preamplifier conversion time TS1 TS0 0 0 0 1 1 0 1 1 Capacitance (pF) 20.0 10.0 5.0 2.5 GS[3:0] Time (µs) 20 40 80 160 GS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Postamplifier gain GS2 GS1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 GS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Gain (times） 1.00 1.08 1.17 1.27 1.38 1.50 1.63 1.78 1.94 2.13 2.33 2.57 2.85 3.17 3.55 4.00 OUT pin Control The OUT pin is controlled by the level of the OE control pin. OE pin OUT pin Condition ≥ 0.8VDD Output enable Normal operation output when A[2:0] write data matches the setting of the address control inputs. Open Output enable Normal operation output ≤ 0.2VDD Output disable SEIKO NPC CORPORATION - 9 SM3320A Gain Setting (Writing Data to the Register, OE = LOW or Open) If OE is LOW or open circuit, serial interface operation starts for setting all data bits in the register when SE goes HIGH. 1 read/write mode bit (write mode=0), 3 address bits, and 12 write data bits are transferred in sequence. If the address data bits match the address control pin settings, the write data is loaded into the register, the write data becomes valid, and then serial interface operation ends when SE goes LOW. Note that data will be corrupted if there are less than or more than 16 clock pulses received during serial data transfer. Register write (OE = LOW) "L" OE SE DATA R/W A2 A1 A0 - - - - CS1 CS0 TS1 TS0 GS3 GS2 GS1 GS0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CLK Register write (OE = Open) OE (OPEN) "L" SE DATA R/W A2 A1 A0 - - - - CS1 CS0 TS1 TS0 GS3 GS2 GS1 GS0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CLK OUT (Hi-Z) Analog Output Control (Writing Data to the Register, OE = HIGH) If OE is HIGH, serial interface operation starts when SE goes HIGH. 1 read/write mode bit (write mode=0), 3 address bits, and 4 dummy data bits are transferred in sequence. The address data becomes valid and serial interface operation ends when SE goes LOW. If the address data bits match the address control pin settings, the output of the addressed device is enabled. If the output was already enabled and the address data does not match the address pin setting, the output is disabled. It is judged as address disagreement and be output disable state if there are less than or more than 8 clock pulses received during serial data transfer. In addition, sequential write cycles to the register are permitted while OE is HIGH. Register write (OE = HIGH) OE SE DATA R/W A2 A1 A0 - - - - 1 2 3 4 5 6 7 8 CLK OUT (Hi-Z) SEIKO NPC CORPORATION - 10 SM3320A Reading Data from the Register (OE = LOW or Open) The serial interface operation starts when SE goes HIGH. If OE is open circuit or LOW, 1 read/write mode bit (read mode=1), 3 address bits, and 4 dummy data bits are transferred in sequence. The address control pin setting is compared with the address register setting on the falling edge of the CLK8. If the settings match, the data in the 8-bit analog adjustment code register is read out in sequence. On the serial interface, the GS0 data bit is transferred on the CLK15 falling edge of the clock, and then any data bits transferred between the CLK16 falling edge of the clock and the falling edge on SE are undefined data. Serial interface operation ends when SE goes LOW, and the DATA terminal reverts to an input. Make sure there are not less than nor more than 16 input pulses on the CLK clock. If the number of clock pulses is incorrect, incorrect data may be written to the register or read from the register. Register read SE DATA R/W A2 A1 A0 - - - - CS1 CS0 TS1 TS0 GS3 GS2 GS1 GS0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 - CLK SEIKO NPC CORPORATION - 11 SM3320A STANDARD CIRCUIT 10μF VSS REF A0 A1 A2 OUT SM3320A ADC DATA OE CLK SE VDD CPU In the case of address [000] setting Mount a ceramic chip capacitor that is larger than 10μF proximal to IC between VDD and VSS. The rating value of electrical characteristics each parameter corresponds to the result measured in the standard circuit. SEIKO NPC CORPORATION - 12 SM3320A TYPICAL APPLICATION CIRCUIT These typical application circuits are reference circuit diagram on use, and are not circuits which our company guarantees. This company accepts no responsibility for use of products in any way about the damage etc. Devices should only be used after thorough evaluation under actual operating conditions. SM3320A IC3 VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD SM3320A IC2 VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD SM3320A IC1 VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD Circuit 1 ADC ADC CPU Timing Diagram OE SE IC1 IC2 IC3 IC1 IC2 IC3 DATA CLK （光照射） (Optical irradiation) (OFF) (ON) Rti OUT(IC1) (Hi-Z) OUT(IC2) (Hi-Z) OUT(IC3) (Hi-Z) OUT(ALL) OUT合成 (Hi-Z) SEIKO NPC CORPORATION - 13 SM3320A VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD DATA OE CLK SE VDD VSS REF A0 A1 A2 OUT DATA OE CLK SE VDD DATA OE CLK SE VDD VSS REF A0 A1 A2 OUT SM3320A IC A8 DATA OE CLK SE VDD SM3320A IC A2 DATA OE CLK SE VDD SM3320A IC A1 CPU ADC ADC Circuit 2 SM3320A IC B8 VSS REF A0 A1 A2 OUT SM3320A IC B2 VSS REF A0 A1 A2 OUT VSS REF A0 A1 A2 OUT SM3320A IC B1 Timing Diagram OE(A) OE(B) SE(A) SE(B) IC A1 IC A8 IC B1 IC B8 IC A1 DATA IC A2 IC A3 IC A1 IC A2 IC A3 CLK (Optical（光照射） irradiation) (OFF) (ON) Rti OUT(IC A1) (Hi-Z) OUT(IC A2) (Hi-Z) OUT(IC B1) (Hi-Z) OUT(IC B2) (Hi-Z) SEIKO NPC CORPORATION - 14 SM3320A Please pay your attention to the following points at time of using the products shown in this document. 1. The products shown in this document (hereinafter ”Products”) are designed and manufactured to the generally accepted standards of reliability as expected for use in general electronic and electrical equipment, such as personal equipment, machine tools and measurement equipment. The Products are not designed and manufactured to be used in any other special equipment requiring extremely high level of reliability and safety, such as aerospace equipment, nuclear power control equipment, medical equipment, transportation equipment, disaster prevention equipment, security equipment. The Products are not designed and manufactured to be used for the apparatus that exerts harmful influence on the human lives due to the defects, failure or malfunction of the Products. If you wish to use the Products in that apparatus, please contact our sales section in advance. In the event that the Products are used in such apparatus without our prior approval, we assume no responsibility whatsoever for any damages resulting from the use of that apparatus. 2. NPC reserves the right to change the specifications of the Products in order to improve the characteristics or reliability thereof. 3. The information described in this document is presented only as a guide for using the Products. No responsibility is assumed by us for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of the third parties. Then, we assume no responsibility whatsoever for any damages resulting from that infringements. 4. The constant of each circuit shown in this document is described as an example, and it is not guaranteed about its value of the mass production products. 5. In the case of that the Products in this document falls under the foreign exchange and foreign trade control law or other applicable laws and regulations, approval of the export to be based on those laws and regulations are necessary. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SEIKO NPC CORPORATION 1-9-9, Hatchobori, Chuo-ku, Tokyo 104-0032, Japan Telephone: +81-3-5541-6501 Facsimile: +81-3-5541-6510 http://www.npc.co.jp/ Email:[email protected] ND13001-E-00 2013.01 SEIKO NPC CORPORATION - 15