4.7 x 4.27mm2 – FDP027N08 MOSFET Bare Die

FDP027N08
N-Channel PowerTrench® Mosfet
Chip
80V, 223A, 2.7mΩ
Part
V(BR)DSS
FDP027N08
80V
IDn
RDS(on) TYP
223A
2.21mΩ
1
Die Size
4.3 x 4.7 mm
2
See page 2 for ordering part numbers & supply formats
Features
Applications
•
High density DC / DC Converters
•
High Power & Current Handling Capability
•
AC Motor Drives
•
Low RDS (on) per mm2
•
Low Gate Charge
Maximum Ratings
Symbol
Parameter
Ratings
Units
VDSS
Drain to Source Voltage
80
V
VGSS
Gate to Source Voltage
±20
V
ID
Drain Current
IDM
Drain Current
TJ, TSTG
2
3
Continuous (TC = 25°C)
223
Continuous (TC = 100°C)
158
Pulsed
892
Operation Junction & Storage Temperature
EAS
Single Pulsed Avalanche Energy
dv/dt
Peak Diode Recovery dv/dt
4
4
A
-55 to 175
°C
L=3mH, IAS = 24.72A, RG = 25Ω
917
mJ
ISD≤100A, di/dt≤200A/µs
VDD≤BVDSS, Starting TJ = 25°C
6.0
V/ns
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
BVDSS
Drain to Source Voltage
ID =250µA, VGS = 0V TC = 25°C
80
-
-
V
VGS(th)
Gate threshold Voltage
VGS = VDS, ID =250µA
2.5
-
4.5
V
IDSS
Zero Gate Voltage Drain Current
VDS = 64V, VGS = 0V
-
-
1
µA
VDS = 64V, TC = 150°C
-
-
500
VGS = ±20V, VDS = 0V
-
-
±100
nA
VGS = 10V, ID = 100A
-
2.21
2.7
mΩ
IGSS
Gate to Body Leakage Current
RDS(on)
Drain to Source On Resistance
1
1.
2.
3.
Notes:
Defined by chip design, not subject to production test at wafer level
Calculated continuous current based on the maximum allowable junction temperature. Performance will vary
based on assembly technique, wire bond configuration and substrate choice
Repetitive Rating: Pulse width limited by maximum junction temperature
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Page1
Static Characteristics, TJ = 25°C unless otherwise noted
Dynamic Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
VDS = 10V, ID = 100A
-
227
-
S
-
10170
13530
pF
-
1670
2220
pF
-
35
-
pF
-
3025
-
pF
gFS
Forward Transconductance
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss(er)
Energy Related Output Capacitance
VDS =40V, VGS = 0V
f = 1MHz
VDS =40V, VGS = 0V
Typ
Max
Units
Qg(tot)
Total Gate Charge at 10V
-
137
178
nC
Qgs
Gate to Source Gate Charge
-
56
-
nC
Qgs2
Gate Charge Threshold to Plateau
-
25
-
nC
Qgd
Gate to Drain “Miller” Charge
VDS =40V, ID = 100A
VGS = 10V
-
28
-
nC
ESR
Equivalent Series Resistance (G-S)
f = 1MHz
-
2.4
-
Ω
Min
Typ
Max
Units
-
47
104
ns
-
66
142
ns
-
87
184
ns
-
41
92
ns
Switching Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Test Conditions
VDD = 40V, ID = 100A
5
VGS = 10V, RGEN = 4.7Ω
Drain-Source Diode Characteristics4, TJ = 25°C unless otherwise noted
Symbol
Parameter
IS
Test Conditions
Maximum Continuous Drain to Source Diode Forward Current
ISM
Maximum Pulsed Drain to Source Diode Forward Current
VSD
2
Min
Typ
Max
Units
-
-
223
A
-
-
892
A
-
1.3
V
Drain to Source Diode Forward Voltage
VGS = 0V, ISD = 100A
-
trr
Reverse Recovery Time
80
-
ns
Reverse Recovery Charge
VGS = 0V, ISD = 100A, VDD = 40V
dIF/dt = 100A/μs
-
Qrr
-
112
-
nC
4.
5.
Notes:
Characterised by design & tested at component level, not subject to production test at wafer level
Essentially Independent of Operating Temperature Typical Characteristics
Ordering Guide
Part Number
Format
Detail / Drawing
FDP027N08MW
FDP027N08MF
FDP027N08MD
Un-sawn wafer, electrical rejects inked
Page 3
Sawn wafer on film-frame
Page 4
Singulated die / chips in waffle pack
Page 4
Page2
Note: Singulated Die / Chips can also be supplied in Pocket Tape or SurfTape® on request
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Die Drawing
457.5um
Mechanical Data
Parameter
Units
Chip Dimensions Un-sawn
4267 X 4699
µm
Chip Thickness (Nominal)
200
µm
Gate Pad Size
457 X 327
µm
Wafer Diameter
150 (subject to change)
mm
Saw Street
60 (subject to change)
µm
Wafer orientation on frame
Wafer notch parallel with frame flat
Topside Metallisation & Thickness
Al
Backside Metallisation & Thickness
Ti-V/Ni-Ag
5
µm
0.65
µm
Unpassivated
Recommended Die Attach Material
Soft Solder or Conductive Epoxy
Recommended Wire Bond - Gate
Al 125µm X1
Recommended Wire Bond – Source
Al 380µm X2
Page3
Topside Passivation
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Sawn Wafer on Film-Frame – Dimensions (inches)
Die in Waffle Pack – Dimensions (mm)
A
X
X = 5.31mm ±0.13mm pocket size
Y = 5.31mm ±0.13mm pocket size
Z = 0.41mm ±0.05mm pocket depth
A = 5° ±1/2° pocket draft angle
No Cross Slots
Array = 7 X 7 (49)
Y
Z
X
OVERALL TRAY SIZE
Size = 50.67mm ±0.25mm
Height = 3.94mm ±0.13mm
Flatness = 0.30mm
DISCLAIMER THE INFORMATION HEREIN IS GIVEN TO DESCRIBE CERTAIN COMPONENTS AND SHALL NOT BE CONSIDERED AS WARRANTED CHARACTERISTICS. NO
RESPONSIBILITY IS ASSUMED FOR ITS USE; NOR FOR ANY INFRINGEMENT OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES WHICH MAY RESULT FROM ITS USE. NO LICENSE IS
GRANTED BY IMPLICATION OR OTHERWISE UNDER ANY PATENT OR PATENT RIGHTS OF EITHER MICROSS COMPONENTS OR FAIRCHILD SEMICONDUCTOR CORPORATION.
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR
DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY
ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND
CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
(a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use
provided in the labelling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Further Information - Contact your Micross sales office or email your enquiry to [email protected]
©2014 Fairchild Semiconductor Corporation & Micross Components
Page4
1. Life support devices or systems are devices or systems which,
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