HVV1012-250 Datasheet ASI Rev 0 p1

FEATURES
GE
PACKAGE
!
Silicon MOSFET Technology
Operation from 24V to 50V
High Power Gain
Extreme Ruggedness
Internal Input and Output Matching
Excellent Thermal Stability
All Gold Bonding Scheme
Pb-free and RoHS Compliant
TYPICAL PERFORMANCE
MODE
Class AB
FREQUENCY
VDD
IDQ
Power
GAIN
EFFICIENCY
IRL
(MHz)
(V)
(mA)
(W)
(dB)
(%)
(dB)
1150
50
100
250
19.5
48
20:1
Table 1: Typical RF Performance in broadband text fixture at 25°C temperature with
RF pulse conditions of pulse width = 10 s and pulse duty cycle = 1%.
DESCRIPTION
The high power HVV1012-2 50 device is an enhancement mode RF MOSFET power
transistor designed for pulsed applications in the L-Band from 1025MHz to 1150MHz. The
high voltage MOSFET technology produces over 2 50W of pulsed output power while
offering high gain, high efficiency, and ease of matching with a 50 V supply. The vertical
device structure assures high reliability and ruggedness as the device is specified to
withstand a 20:1 VSWR at all phase angles under full rated output power.
ORDERING INFORMATION
Device Part Number: HVV1012- 250
Evaluation Kit Part Number: HVV1012- 250-EK
REV. A
7525 ETHEL AVENUE
NORTH HOLLYWOOD, CA 91605 (818) 982-1200
Specifications are subject to change without notice.
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ELECTRICAL CHARACTERISTICS
Symbol Parameter
Conditions
VBR(DSS)
Drain-Source Breakdown
VGS=0V,ID=5mA
IDSS
Drain Leakage Current
VGS=0V,VDS=48V
IGSS
G P1
IRL1
Gate Leakage Current
Power Gain
Input Return Loss
VGS=5V,VDS=0V
F=1150MHz
F=1150MHz
F=1150MHz
VDD=50V,IDQ=100mA
VDD=5V, ID=300 A
1
D
VGS(Q)2
VTH
Gate Quiescent Voltage
Threshold Voltage
Min
Max
Unit
95
Typical
102
-
V
-
50
200
A
17.5
46
1.1
0.7
1
19.5
-7
48
1.45
1.2
5
-4
1.8
1.7
A
dB
dB
%
V
V
PULSE CHARACTERISTICS
Symbol Parameter
Conditions
Min
Typical
Max
Unit
Tr
Rise Time
F=1150MHz
-
<40
50
nS
Tf
PD1
Fall Time
F=1150MHz
-
<15
50
nS
Pulse Droop
F=1150MHz
-
0.25
0.5
dB
1
1
THERMAL CHARACTERISTICS
RUGGEDNESS PERFORMANCE
NOTE: All parameters measured under pulsed conditions at 250W output power measured at the 10%
point of the pulse with pulse width = 10╬╝sec, duty cycle = 1% and VDD = 50V, IDQ = 100mA in a broadband matched test xture.
2
NOTE: Amount of gate voltage required to attain nominal quiescent current.
1
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Demonstration Board Outline
Demonstration Circuit Board Picture
PACKAGE DIMENSIONS
DRAIN
GATE
ASI
PART NUMBER
JDATE CODE
inches
mm
SOURCE
Note: Drawing is not actual size.
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