>LL'('*#&(+
25 Watts, 50V, 1200-1400MHz
200!s, 10% Duty
DESCRIPTION
PACKAGE
The high power HVV1214-025 device is a high
voltage silicon enhancement mode RF transistor
designed for L-band pulsed radar applications
operating over the frequency range of 1200 MHz
and 1400 MHz.
FEATURES
High Power Gain
Excellent Ruggedness
50V Supply Voltage
ABSOLUTE MAXIMUM RATINGS
Symbol
VDSS
VGS
IDSX
PD2
TS
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Power Dissipation
Storage Temperature
TJ
Junction
Temperature
Value
95
-10, 10
2
116
-65 to
+150
200
Unit
V
V
A
W
°C
°C
THERMAL CHARACTERISTICS
Symbol
JC
1
Parameter
Thermal Resistance
Max
1.5
Unit
°C/W
The device resides in the SM200 surface mount
package with a ceramic lid.
RUGGEDNESS
The HVV1214-025 device is capable of
withstanding
an
output
load
mismatch
corresponding to a 20:1 VSWR at rated output
power over all phase angles and operating
voltage across the frequency band of operation.
Symbol
LMT1
Parameter
Load
Mismatch
Tolerance
Test Condition
POUT = 25W
Max
20:1
Units
VSWR
F = 1300 MHz
ELECTRICAL CHARACTERISTICS
Symbol
VBR(DSS)
IDSS
IGSS
GP1
IRL1
džD1
PD1
VGS(Q)
VTH
1
2
Parameter
Drain-Source Breakdown
Drain Leakage Current
Gate Leakage Current
Power Gain
Input Return Loss
Drain Efficiency
Pulse Droop
Gate Quiescent Voltage
Threshold Voltage
Conditions
VGS=0V,ID=2mA
VGS=0V,VDS=50V
VGS=5V,VDS=0V
POUT=25W, F=1300 MHz
POUT=25W, F=1300 MHz
POUT=25W, F=1300 MHz
POUT=25W, F=1300 MHz
VDD=50V, IDQ=15mA
VDD=5V, ID=300uA
Min
95
19
40
1.0
0.7
Typ
102
15
2
20.5
-12
42
0.3
1.4
1.2
Max
50
10
-8
0.6
1.7
1.7
Units
V
!A
!A
dB
dB
%
dB
V
V
Under Pulse Conditions: Pulse Width = 200!s, Pulse Duty Cycle = 10% at VDD = 50V, IDQ = 15mA
Rated at TCASE = 25°C
7525 ETHEL AVENUE
NORTH HOLLYWOOD, CA 91605 (818) 982-1200
WWW.ADSEMI.COM
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PACKAGE DIMENSIONS
.205+/-.008
[5.21+/-0.20]
2X
0.45+/-.005
[1.13+/-0.13]
DRAIN
.175+/-.008
[4.45+/-0.20]
.034+/-.005
[0.86+/-0.13]
SOURCE
2X
.020+/-.005
[0.51+/-0.13]
GATE
.007
[0.17]
3X
.192+/-.005
[4.88+/-0.13]
.088 +/- .008
.018
[0.45]
INCHES
[MM]
Note: Drawing is not actual size.
ASI Semiconductor, Inc. (ASI) reserves the right to make changes to information published in this
document at any time and without notice. This document supersedes and replaces all information
supplied prior to the publication hereof. Information in this document is believed to be accurate and
reliable. However, ASI does not give any representations or warranties, either express or implied, as to
the accuracy or completeness of such information and shall have no liability no liability for consequences
resulting from the use of such information. No license, either expressed or implied, is conveyed under
any ASI intellectual property rights, including any patent rights.
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