MAX3679A RELIABILITY REPORT FOR MAX3679AETJ+T PLASTIC ENCAPSULATED DEVICES December 22, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Richard Aburano Quality Assurance Manager, Reliability Engineering Maxim Integrated Products. All rights reserved. Page 1 MAX3679A Conclusion The MAX3679AETJ+T successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description V. ........Quality Assurance Information II. ........Manufacturing Information VI. .......Reliability Evaluation III. .......Packaging Information IV. .......Die Information .....Attachments I. Device Description A. General The MAX3679A is a low-jitter precision clock generator with the integration of three LVPECL and one LVCMOS outputs optimized for Ethernet applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) clock multiplier to generate high-frequency clock outputs for Ethernet applications. Maxim's proprietary PLL design features ultra-low jitter (0.36psRMS) and excellent power-supply noise rejection, minimizing design risk for network equipment. Maxim Integrated Products. All rights reserved. Page 2 MAX3679A II. Manufacturing Information A. Description/Function: +3.3V, Low-Jitter Crystal to LVPECL Clock Generator B. Process: MB3 C. Number of Device Transistors: 10769 D. Fabrication Location: USA E. Assembly Location: China, Malaysia, Taiwan and Thailand F. Date of Initial Production: August 11, 2009 III. Packaging Information A. Package Type: 32-pin TQFN 5x5 B. Lead Frame: Copper C. Lead Finish: 100% matte Tin D. Die Attach: Conductive E. Bondwire: Au (1.3 mil dia.) F. Mold Material: Epoxy with silica filler G. Assembly Diagram: #05-9000-3346 H. Flammability Rating: Class UL94-V0 I. Classification of Moisture Sensitivity per JEDEC standard J-STD-020-C Level 1 J. Single Layer Theta Ja: 47°C/W K. Single Layer Theta Jc: 1.7°C/W L. Multi Layer Theta Ja: 29°C/W M. Multi Layer Theta Jc: 1.7°C/W IV. Die Information A. Dimensions: 82.28 X 82.28 mils B. Passivation: BCB C. Interconnect: Al/0.5%Cu D. Backside Metallization: None E. Minimum Metal Width: Metal1 = 0.23 / Metal2 = 0.6 / Metal3 = 1.2 / Metal4 = 4 microns (as drawn) F. Minimum Metal Spacing: Metal1 = 0.23 / Metal2 = 0.5 / Metal3 = 1.2 / Metal4 = 4 microns (as drawn) G. Bondpad Dimensions: H. Isolation Dielectric: SiO2 I. Die Separation Method: Wafer Saw Maxim Integrated Products. All rights reserved. Page 3 MAX3679A V. Quality Assurance Information A. Quality Assurance Contacts: Richard Aburano (Manager, Reliability Engineering) Don Lipps (Manager, Reliability Engineering) Bryan Preeshl (Vice President of QA) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate ( = 1 MTTF = = 11.5 x 10 ) is calculated as follows: 1.83 (Chi square value for MTTF upper limit) 192 x 4340 x 96 x 2 (where 4340 = Temperature Acceleration factor assuming an activation energy of 0.8eV) -9 = 11.5 F.I.T. (60% confidence level @ 25°C) The following failure rate represents data collected from Maxim's reliability monitor program. Maxim performs quarterly life test monitors on its processes. This data is published in the Reliability Report found at http://www.maxim-ic.com/qa/reliability/monitor. Cumulative monitor data for the MB3 Process results in a FIT Rate of 0.06 @ 25C and 1.05 @ 55C (0.8 eV, 60% UCL) B. E.S.D. and Latch-Up Testing (lot SWPZBQ001C, D/C 0917) The HQ13 die type has been found to have all pins able to withstand a HBM transient pulse of +/- 2500V per JEDEC JESD22-A114. Latch-Up testing has shown that this device withstands a current of +/- 250mA and overvoltage per JEDEC JESD78. Maxim Integrated Products. All rights reserved. Page 4 MAX3679A Table 1 Reliability Evaluation Test Results MAX3679AETJ+T TEST ITEM TEST CONDITION Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF FAILURES COMMENTS DC Parameters & functionality 48 48 0 0 SWPZBQ001B, D/C 0915 SWPZBQ002A, D/C 1013 Note 1: Life Test Data may represent plastic DIP qualification lots. Maxim Integrated Products. All rights reserved. Page 5