2N5196 - New Jersey Semiconductor

, JJnc.
J
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
TELEPHONE: (973) 376-2922
(212)227-6005
FAX: (973) 376-8960
2N5196/5197/5198/5199
Monolithic N-Channel JFET Duals
PRODUCT SUMMARY
Part Number
VGS(off) (V)
2N5196
-07 to -4
-50
2N5197
-0.7 to -4
-50
2N5198
-0.7(0-4
-50
2N5199
-0.7(0-4
-50
FEATURES
• Monolithic Design
• High Slew Rate
• Low Offset/Drift Voltage
• Low Gate Leakage: 5 pA
• Low Noise
• HighCMRR: 100 dB
V(BR)GSS Win (V)
gfs Min (mS)
1
1
1
1
IG Max(pA)
|VGsi - VGS2 Max (mV)
-15
5
-15
5
-15
10
-15
15
BENEFITS
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time
Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signal
APPLICATIONS
• Wideband Differential Amps
• High-Speed, Temp-Compensated,
Single-Ended Input Amps
• High Speed Comparators
• Impedance Converters
TO-71
DESCRIPTION
G2
The 2N5196/5197/5198/5199 JFET duals are designed for
high-performance differential amplification for a wide range of
precision test instrumentation applications. This series
features tightly matched specs, low gate leakage for accuracy,
and wide dynamic range with Ig guaranteed at VQQ = 20 V
Top View
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage
-50 V
Gate Current
Lead Temperature (1/15 from case for 10 sec.)
50mA
Storage Temperature
Operating Junction Temperature
300 C
. -65 to 200' C
-55 to 150 C
Power Dissipation .
Per Side3
Total"
250 mW
500 mW
Notes
a
Derate 2 mW/ C above 85' C
b
Derate 4 mW/ C above 85 C
NJ Semi-Conductors reserves the right to change test conditions, parameters limits and package dimensions without
notice information, furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going to
press. However NJ Semi-Conductors assumes no responsibility tor any errors or omissions discovered in its use. NJ
Semi-Conductors encourages customers to verify that datasheets are current before placing orders.
Quality Semi-Conductors
SPECIFICATIONS FOR 2N5196 AND 2N5197 (TA = 25 C UNLESS OTHERWISE NOTED)
Limits
2N5196
Parameter
2N5197
Typa Min Max Min Max
Symbol
Test Conditions
V(BR)GSS
|G = -1 (iA, VDS = o v
-57
-50
VQS(off)
VDS = 20 V, ID = 1 nA
~2
-0.7
-4
-0.7
VDS = 20 v, VGS = o v
VGS = -30 v, VDS = o v
3
0.7
7
0,7
Unit
Static
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Current"
Gate Reverse Current
loss
IGSS
T A =150'C
VDG = 20 v, |D = 200 (iA
Gate Operating Current
Gate-Source Voltage
IG
VGS
T A =125'C
VDG = 20 v, |D = 200 |iA
-50
-4
7
nnA
-10
-25
-25
PA
-20
-50
-50
nA
-5
-15
-15
PA
-0.8
-15
-15
nA
-1.5
-0.2
^3,8
-0,2
-3.8
V
2.5
1
4
1
4
mS
50
»S
1.6
mS
iiS
Dynamic
Common-Source
Forward Transconductance
9fs
Common-Source
Output Conductance
9os
Common-Source
Forward Transconductance
9fs
Common-Source
Output Conductance
9os
Common-Source
Input Capacitance
ciss
VDS = 20 v, VGS = o v
f = 1 kHz
VDS = 20 v, ID = 200 |iA
f = 1 kHz
VDS = 20 v, VGS = o v
50
2
0.8
0.7
1.6
07
1
4
4
3
6
6
1
2
2
9
20
20
nV/
\Hz
PF
Common-Source
Reverse Transfer Capacitance
p
urss
f = 1 MHz
Equivalent Input Noise Voltage
6n
VDS = 2° V VGS = o v, f = 1 kHz
Noise Figure
NF
f = 100Hz, R G = 1 0 M Q
vDS = 20 v, VGS = o v
0.5
0,5
dB
VDG = 20 V, ID = 200 ^A
5
5
mV
VDG = 20 V, ID = 200 |iA
TA = -55to125"C
5
10
HV/'C
Matching
Differential Gate-Source Voltage
Gate-Source Voltage Differential
Change with Temperature
Saturation Drain Current Ratio
lVGS1-VGS2l
AIVGS1-VGS2I
AT
'ossi
VDS " 20 V VGS ~ 0 V
0,98
095
1
095
1
0.99
0.97
1
0.97
1
'OSS2
Transconductance Ratio
9fs1
9fs2
Differential Output Conductance
Differential Gate Current
Common Mode Rejection Ratio0
VDS = 20 V, |D = 200 iiA
f - 1 kHz
01
1
1
iiS
VDG = 20V l D = 2 0 0 | i A ; T A = 1 2 5 ' C
0.1
5
5
nA
VDG = 1°to 20 v. ID = 200 |iA
100
I9os1-9os2l
I'd-y
CMRR
dB