Preliminary Datasheet LPA8302 3-Walts Mono Filter-free Class-D Audio Power Amplifier General Description Features The LPA8302 is a high efficiency, 3W mono class-D audio power amplifier. A low noise, filterless PWM architecture eliminates the output filter, reducing Unique Operating in a single 5V supply, LPA8302 is capable of driving 4Ω speaker load at a continuous average output of 3W/10% THD+N or 2W/1% THD+N. The LPA8302 has high efficiency with speaker load compared to a typical class D amplifier. With a 3.6V supply driving an 8Ω speaker, the efficiency for a 400mW power level is 88%.In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the LPA8302. The gain of LPA8302 is externally configurable which Scheme Reduces Efficiency at 3.6V With an 8-Ω Speaker: − 88% at 400 mW − 80% at 100 mW Low 2.4-mA Quiescent Current 0.5-µA Shutdown Current 2.5V to 5.5V Wide Supply Voltage Shutdown Pin has 1.8V Compatible Thresholds Optimized PWM Output Stage Eliminates LC Output Filter Improved PSRR (−72 dB) Eliminates Need for a Voltage Regulator Fully Differential Design Reduces RF Rectification and Eliminates Bypass Capacitor Improved CMRR Eliminates Two Input Coupling Capacitors Internally Generated 250-kHz Switching Frequency Integrated Pop and Click Suppression Circuitry MSOP-8 package RoHS compliant and 100% lead(Pb)-free allows independent gain control from multiple sources by summing signals from seperated sources. The LPA8302 is available in space-saving MSOP-8 packages. Order Information Typical Application Circuit LPA8302 □ □ □ F: Pb-Free Package Type C1 DIFFERENTIAL INPUT C1 VDD INTERNAL OSCILLATOR R1 R1 MS: MSOP-8 SHUTDOWN CS + PWM VO+ HBRIDGE VO- IN+ BIAS CIRCUITRY GND FILTER-FREE CLASS D PMP,PSP, Game, Cellular and Smart mobile phone PDA/DSC Data-Bank Marking Information Please see website. LPA8302–02 May.-2010 Email: [email protected] TO BATTERY IN- Applications EMI Emissions external component count, system cost, and simplifying design. Modulation www.lowpowersemi.com Page 1 of 14 Preliminary Datasheet LPA8302 Functional Pin Description P ac ka ge Typ e P in C o n f ig u r a t io n s MSOP-8 TOP VIEW SHUTDOWN LPA8302 1 NC 2 IN+ 3 IN- 4 8 9 GND VO- 7 GND 6 VDD 5 VO+ Pin Description Pin PIN DESCRIPTION SHUTDOWN 1 Shutdown terminal (active low logic) NC 2 No internal connection IN+ 3 Positive differential input IN- 4 Negative differential input VO+ 5 Negative BTL output VDD 6 Power supply GND 7 High-current ground VO- 8 Positive BTL output Function Block Diagram GAIN= 150KΩ R1 GAIN=2V/V VDD VDD + - 150KΩ IN- - - + + IN+ SHUTDOWN LPA8302–02 + 300KΩ TTL INPUT BUFFER May.-2010 BIASES AND REFERENCE GATE DRIVE VO- + + - 150KΩ SD DELITCH LOGIC RAMP GENERATOR Email: [email protected] DELITCH LOGIC GATE DRIVE STARTUP PROTECTION LOGIC VO+ GND OC DETECT www.lowpowersemi.com Page 2 of 14 Preliminary Datasheet LPA8302 Absolute Maximum Ratings Input Voltage to GND (VINA, VINB) --------------------------------------------------------------------------------------------------------------- 6V Adapter Voltage to GND (VADP) -------------------------------------------------------------------------------------------------------- 0.3V to 6V Supply Voltage, VDD -------------------------------------------------------------------------------------------------------------- Voltage at Any Input Pin ------------------------------------------------------------------------------------------------ Junction Temperature, TJMAX ----------------------------------------------------------------------------------------------------------- Storage Temperature Rang, Tstg ESD Susceptibility Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ------------------------------------------------------------ Thermal Resistance LPA8302–02 ----------------------------------------------------------------------------------------- -0.3 V to 6V -0.3 V to VDD +0.3V -65°C to 150°C ---------------------------------------------------------------------------------------------------------------------- θJA (TDFN) May.-2010 ---------------------------------------------------------------------------------------------------- Email: [email protected] www.lowpowersemi.com 150°C 2kV 260°C 47°C/W Page 3 of 14 Preliminary Datasheet LPA8302 Electrical Characteristics Parameter Symbol Output offset voltage VOS (measured differentially) PSRR Power supply rejection ration Common mode rejection ratio CMRR IQ Quiescent current ISHDN Shutdown Current ILIM P-Channel Current Limit RDS(ON) Static drain-source on-state resistance Switching frequency F(SW) Min. Vi=0V,Av=2V/V,VDD=2.5V to 5.5V VDD=2.5V to 5.5V VDD=2.5V to 5.5V,Vic=VDD/2 to 0.5V,Vin=VDd/2 to Vdd-0.8V dB µA 1 A VDD=5.5V, no load 400 VDD=3.6V, no load 500 VDD=2.5V, no load 700 THD+N=1%, F=1KHz,RL=8 VDD=3.6V,Inputs ac-grounded with Ci=2uF May.-2010 -77 0.5 F=1KHz,RL=8 LPA8302–02 dB VSHDN=0.35V, VDD=2.5V to 5.5V THD+N=10%, Start-up time from shutdown -80 2.06 Output power Zt mV VDD=2.5V, no load F=1KHz,RL=4 Common mode rejection ratio 25 2.40 THD+N=1%, CMRR 5 Unit VDD=3.6V, no load F=1KHz,RL=4 kSVR Max. 4.52 VDD=2.5V to 5.5V Supply ripple rejection ratio Typ. VDD=5.5V, no load THD+N=10%, PO LPA8302 Conditions VDD=3.6V, Vic=1Vpp 200 VDD=5.0V 3.0 VDD=3.6V 1.3 VDD=2.5V 0.64 VDD=5.0V 2.15 VDD=3.6V 1.06 VDD=2.5V 0.46 VDD=5.0V 1.67 VDD=3.6V 0.79 VDD=2.5V 0.39 VDD=5.0V 1.36 VDD=3.6V 0.64 VDD=2.5V 0.32 F=217Hz,V9ripple)=200m Vpp F=217Hz VDD=3.6 Email: [email protected] 250 www.lowpowersemi.com mA m 300 KHz W W W W -60 dB -55 dB 11.5 mS Page 4 of 14 Preliminary Datasheet LPA8302 Typical Operating Characteristics LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 5 of 14 Preliminary Datasheet LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com LPA8302 Page 6 of 14 Preliminary Datasheet LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com LPA8302 Page 7 of 14 Preliminary Datasheet LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com LPA8302 Page 8 of 14 Preliminary Datasheet LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com LPA8302 Page 9 of 14 Preliminary Datasheet LPA8302 Application Information The LPA8302 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that Table 1. Typical Component Values (1) CI is only needed for single-ended input or if VICM is not between 0.5 V and VDD – 0.8 V. CI = 3.3 nF (with RI = 150 kΩ) gives a high-pass corner frequency of 321 Hz. the common-mode voltage at the output is biased around VDD/2 regardless of the common-mode voltage at the input. The fully differential LPA8302 can still be used with a single-ended input; however, the LPA8302 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. Advantages of Fully Differential Amplifiers Input-coupling capacitors not required: The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. For example, if a codec has a middle supply lower than the middle supply of the LPA8302, the common-mode feedback circuit will adjust, and the LPA8302 Typical Application Schematic With Differential Input for a Wireless Phone outputs will still be biased at middle supply of the LPA8302. The inputs of the LPA8302 can be biased from 0.5V toVDD-0.8 V. If the inputs are biased outside of that range, input-coupling capacitors are required. Middle supply bypass capacitor, C(BYPASS), not required: The fully differential amplifier does not require a bypass capacitor. This is because any shift in the middle supply affects both positive and negative channels equally and cancels at the differential output. Typical Application Schematic With Differential Input and Input Better RF −immunity: -GSM handsets save power by turning on and shutting off the Capacitors RF transmitter at a rate of 217 Hz. The transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier. Component Selection It shows below the LPA8302 typical schematic with different inputs and there shows the LPA8302 with differential inputs and input capacitors below, and it shows below the LPA8302 with single-ended inputs. Differential inputs should be used whenever possible because the single-ended inputs are much Typical Application Schematic With Single-Ended Input more susceptible to noise. LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 10 of 14 Preliminary Datasheet LPA8302 Input Resistors (RI) The input capacitors and input resistors form a high-pass filter The input resistors (RI) set the gain of the amplifier according to with the corner frequency, fc, determined in equation (2). equation (1). The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the Resistor matching is very important in fully differential amplifiers. circuit. Speakers in wireless phones cannot usually respond The balance of the output on the reference voltage depends on well to low frequencies, so the corner frequency can be set to matched ratios of the resistors. CMRR, PSRR, and cancellation block low frequencies in this application. Equation (3) is of the second harmonic distortion diminish if resistor mismatch reconfigured to solve for the input coupling capacitance. occurs. Therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%. If the corner frequency is within the audio band, the capacitors Place the input resistors very close to the LPA8302 to limit should have a tolerance of ± 10% or better, because any noise injection on the high-impedance nodes. mismatch in capacitance causes an impedance mismatch at the For optimal performance the gain should be set to 2 V/V or corner frequency and below. lower. Lower gain allows the LPA8302 to operate at its best, For a flat low-frequency response, use large input coupling and keeps a high voltage at the input making the inputs less capacitors (1 µF). However, in a GSM phone the ground signal susceptible to noise. is fluctuating at 217 Hz, but the signal from the codec does not have the same 217 Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a Decoupling Capacitor (CS) The LPA8302 is a high-performance class-D audio amplifier that requires adequate power supply decoupling to ensure the 217 Hz hum. efficiency is high and total harmonic distortion (THD) is low. For Summing Input Signals higher frequency transients, spikes, or digital hash on the line, a Most wireless phones or PDAs need to sum signals at the audio good low equivalent-series-resistance (ESR) ceramic capacitor, power amplifier or just have two signal sources that need typically 1µF, placed as close as possible to the device VDD separate gain. The LPA8302 makes it easy to sum signals or lead works best. Placing this decoupling capacitor close to the use separate signal sources with different gains. Many phones LPA8302 is very important for the efficiency of the class-D now use the same speaker for the earpiece and ringer, where amplifier, because any resistance or inductance in the trace the wireless phone would require a much lower gain for the between the device and the capacitor can cause a loss in phone earpiece than for the ringer. PDAs and phones that have efficiency. For filtering lower-frequency noise signals, a 1 0µF or stereo headphones require summing of the right and left greater capacitor placed near the audio power amplifier would channels to output the stereo signal to the mono speaker. also help, but it is not required in most applications because of the high PSRR of this device. Summing Two Differential Input Signals Two extra resistors are needed for summing differential signals Input Capacitors (CI) (a total of 5 components). The gain for each input source can be The LPA8302 does not require input coupling capacitors if the set independently (see equations (4) and(5)). design uses a differential source that is biased from 0.5 V to VDD – 0.8 V (shown below). If the input signal is not biased within the recommended common –mode input range, if needing to use the input as a high pass filter (shown below), or if using a single-ended source (shown below), input coupling capacitors are required. If summing left and right inputs with a gain of 1 V/V, use LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 11 of 14 Preliminary Datasheet LPA8302 RI1 = RI2 = 300 k If summing a ring tone and a phone signal, set the ring-tone gain to Gain 2 = 2 V/V, and the phone gain to Gain 1 = 0.1 V/V. The resistor values would be. . . RI1=3MΩ, and=RI2=150kΩ Summing Two Single-Ended Input Signals Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner frequencies (fc 1 and fc2) for each input source can be set independently (see equations (9) through (12)). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the IN– terminal. The single-ended inputs must be driven by low impedance sources even if one of the inputs is not outputting an ac signal. LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 12 of 14 Preliminary Datasheet LPA8302 Layout Considerations As output power increases, interconnect resistance (PCB traces and wires) between the amplifiers, load and power supply create a voltage drop. The voltage loss on the traces between the LPA8302 and the load results is lower output power and decreased efficiency. Higher trace resistance between the supply and the LPA8302 has the same effect as a poorly regulated supply, increase ripple on the supply line also reducing the peak output power. The effects of residual trace resistance increases as output current increases due to higher output power, decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should be as wide as possible to minimize trace resistance. The use of power and ground planes will give the best THD+N performance. While reducing trace resistance, the use of power planes also creates parasite capacitors that help to filter the power supply line. The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the parasitic diodes to GND and VDD in each case. From an EMI stand- point, this is an aggressive waveform that can radiate or conduct to other components in the system and cause interference. It is essential to keep the power and output traces short and well shielded if possible. Use of ground planes, beads, and micro-strip layout techniques are all useful in preventing unwanted interference. As the distance from the LPA8302 and the speaker increase, the amount of EMI radiation will increase since the output wires or traces acting as antenna become more efficient with length. What is acceptable EMI is highly application specific. Ferrite chip inductors placed close to the LPA8302 may be needed to reduce EMI radiation. The value of the ferrite chip is very application specific. Ferrite chip inductors placed close to the LPA8302 may be needed to reduce EMI radiation. The value of the ferrite chip is very application specific LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 13 of 14 Preliminary Datasheet LPA8302 Package Information LPA8302–02 May.-2010 Email: [email protected] www.lowpowersemi.com Page 14 of 14